CN107064774B

CN107064774B - Multipath extremum comparison and positioning circuit and chip based on high-speed comparator array

Info

Publication number: CN107064774B
Application number: CN201710249310.0A
Authority: CN
Inventors: 俞德军; 陈远文; 骆军
Original assignee: Jiangyin Yuanlingxinkuang Microelectronics Technology Co ltd
Current assignee: Jiangyin Yuanlingxinkuang Microelectronics Technology Co ltd
Priority date: 2017-04-17
Filing date: 2017-04-17
Publication date: 2023-06-27
Anticipated expiration: 2037-04-17
Also published as: CN107064774A

Abstract

The invention discloses a multipath extremum comparison and positioning circuit and chip based on a high-speed comparator array, and belongs to the technical field of integrated circuits. The circuit comprises a plurality of comparison units and a logic unit which are sequentially connected, wherein the plurality of comparison units at least comprises three comparison units, namely a first comparison unit, a second comparison unit and a third comparison unit. The invention screens the multipath signals for multiple times through the high-speed comparator array, can obtain extreme values in the multipath signals, such as the highest voltage value and the lowest voltage value, can judge the highest voltage value and the lowest voltage value of overvoltage or undervoltage, and simultaneously positions the overvoltage or undervoltage channels, and has the advantages of high response speed, high precision and reliable positioning.

Description

Multipath extremum comparison and positioning circuit and chip based on high-speed comparator array

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a multipath extremum comparison and positioning circuit and chip based on a high-speed comparator array.

Background

In integrated circuit products, there are usually multiple output channels, and there is a certain accuracy requirement for the voltage or current of each output channel, so it is necessary to monitor and control these channels in real time, and find the lowest voltage value in all channels, as the feedback voltage signal in the feedback loop. Meanwhile, the lowest voltage value and the highest voltage value of all channels are needed to be found out and used as comparison signals of undervoltage protection and overvoltage protection.

However, it is a difficult problem how to quickly and accurately find the lowest voltage value and the highest voltage value in all channels, and to be able to locate the channel in which the lowest voltage value and the highest voltage value are located.

Disclosure of Invention

In order to solve the problems in the prior art, the embodiment of the invention provides a multipath extremum comparison and positioning circuit and a chip based on a high-speed comparator array. The technical scheme is as follows:

in one aspect, a multi-way extremum comparing and positioning circuit based on a high-speed comparator array is provided, which comprises a plurality of comparing units and a logic unit which are sequentially connected, wherein the plurality of comparing units at least comprises three comparing units, namely a first comparing unit, a second comparing unit and a third comparing unit;

the first comparison unit inputs multiple paths of voltage signals, compares the voltage levels of the input multiple paths of voltage signals, outputs the voltage signals to the second comparison unit, and outputs logic signals to the logic unit;

the second comparison unit compares the voltage of the input voltage signal, outputs the voltage signal to the third comparison unit and outputs a logic signal to the logic unit;

the third comparison unit compares the voltage of the input voltage signal, outputs a high voltage signal and a low voltage signal to the logic unit, and outputs a logic signal to the logic unit;

the logic unit performs logic processing on the input logic signals, the high-voltage signals and the low-voltage signals and outputs overvoltage positioning signals and undervoltage positioning signals.

Further, the first comparing unit includes four identical first comparators, each of the first comparators compares two input voltage signals, outputs one voltage signal with a high voltage from a high voltage output terminal to the second comparing unit, outputs one voltage signal with a low voltage from a low voltage output terminal to the second comparing unit, and simultaneously, outputs a logic signal from a logic signal output terminal of the first comparator to the logic unit.

Further, the second comparing unit includes two identical high voltage comparators and two identical low voltage comparators, the high voltage comparators compare two voltage signals output from the high voltage output end of the first comparator, and output one voltage signal with high voltage to the third comparing unit, meanwhile, the logic signal output end of the high voltage comparator outputs a logic signal to the logic unit; the low voltage comparator compares two paths of voltage signals output from the low voltage output end of the first comparator, outputs one path of voltage signals with low voltage to the third comparison unit, and meanwhile, the logic signal output end of the low voltage comparator outputs logic signals to the logic unit.

Further, the third comparing unit includes a highest value comparator and a lowest value comparator, the highest value comparator compares the voltage signals output by the two high voltage comparators and outputs a high voltage signal to the logic unit, and meanwhile, the logic signal output end of the highest value comparator outputs a logic signal to the logic unit; the lowest value comparator compares the voltage signals output by the two low voltage comparators and outputs a low voltage signal to the logic unit, and meanwhile, the logic signal output end of the lowest value comparator outputs a logic signal to the logic unit.

Further, the logic unit compares the high voltage signal with a first reference voltage to generate a first reference signal, performs logic processing on the first reference signal and the logic signal, and outputs an overvoltage positioning signal; and the logic unit compares the low-voltage signal with a second reference voltage to generate a second reference signal, performs logic processing on the second reference signal and the logic signal, and outputs an undervoltage positioning signal.

On the other hand, the chip comprises a multi-way extremum comparing and positioning circuit based on a high-speed comparator array, wherein the multi-way extremum comparing and positioning circuit based on the high-speed comparator array comprises a plurality of comparing units and logic units which are sequentially connected, and the plurality of comparing units at least comprises three comparing units, namely a first comparing unit, a second comparing unit and a third comparing unit;

The technical scheme provided by the embodiment of the invention has the beneficial effects that:

the embodiment of the invention screens the multipath signals for multiple times through the high-speed comparator array, can obtain extreme values in the multipath signals, such as the highest voltage value and the lowest voltage value, can judge the highest voltage value and the lowest voltage value of overvoltage or undervoltage, and simultaneously positions the overvoltage or undervoltage channels, and has the advantages of high response speed, high precision and reliable positioning.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a multi-way extremum comparing and locating circuit based on a high-speed comparator array according to an embodiment of the present invention;

FIG. 2 is a circuit diagram of an extremum comparing portion of a multi-way extremum comparing and locating circuit based on a high-speed comparator array according to an embodiment of the present invention;

FIG. 3 is a circuit diagram of a channel locating portion of a high-speed comparator array-based multi-way extremum comparison and locating circuit according to an embodiment of the present invention;

fig. 4 is a circuit diagram of a comparator in a multi-way extremum comparing and locating circuit based on a high-speed comparator array according to an embodiment of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.

Example 1

The embodiment of the invention provides a multipath extremum comparing and positioning circuit based on a high-speed comparator array, which is shown in fig. 1, and comprises a plurality of comparing units and a logic unit 40 which are sequentially connected, wherein the plurality of comparing units at least comprises three comparing units, namely a first comparing unit 10, a second comparing unit 20 and a third comparing unit 30;

the first comparing unit 10 inputs multiple voltage signals, compares the voltage levels of the input multiple voltage signals, outputs a voltage signal to the second comparing unit 20, and outputs a logic signal to the logic unit 40;

the second comparing unit 20 compares the voltage of the input voltage signal, and outputs a voltage signal to the third comparing unit 30 and a logic signal to the logic unit 40;

the third comparing unit 30 compares the voltage of the input voltage signal, and outputs a high voltage signal and a low voltage signal to the logic unit 40, and outputs a logic signal to the logic unit 40;

the logic unit 40 performs logic processing on the input logic signal, high voltage signal and low voltage signal, and outputs an over-voltage positioning signal and an under-voltage positioning signal.

Specifically, the multiple comparing units compare the input multiple channel voltage signals for multiple times according to the voltage levels until the highest voltage value and the lowest voltage value in the multiple channel voltage signals are compared, namely the final high voltage signal and the final low voltage signal, and the logic unit carries out logic processing on the high voltage signal, the low voltage signal and the logic signal output by each comparing unit to output an overvoltage positioning signal and an undervoltage positioning signal. The over-voltage or under-voltage positioning signal can indicate which channel is over-voltage or under-voltage.

It should be noted that the number of comparing units included in the extremum comparing and positioning circuit is determined by the number of channels.

For example, when the number of channels is 8, the extremum comparing and positioning circuit includes three comparing units, wherein the first comparing unit 10 compares the 8 signals for the first time, outputs 4 signals with higher voltages and 4 signals with lower voltages to the second comparing unit 20, the second comparing unit 20 outputs 2 signals with higher voltages among the 4 signals with higher voltages and 2 signals with lower voltages among the 4 signals with lower voltages to the third comparing unit 30 after comparison, and the third comparing unit 30 outputs the highest voltage and the lowest voltage among the signals with lower voltages after comparison.

For another example, when the number of channels is 16, the extremum comparing and positioning circuit includes four comparing units, at this time, only one comparing unit needs to be newly added before the third comparing unit, at this time, the first comparing unit 10 outputs 8 signals with higher voltage and 8 signals with lower voltage, the second comparing unit 20 outputs 4 signals with higher voltage and 4 signals with lower voltage among the 8 signals with higher voltage and the 8 signals with lower voltage to the newly added comparing unit, after the newly added comparing unit further compares, the 2 signals with higher voltage and the 2 signals with lower voltage are output to the third comparing unit 30, and the third comparing unit 30 outputs the highest voltage value and the lowest voltage value thereof after comparing.

For other channel numbers, the comparison is performed multiple times with reference to the above concept until the final voltage maximum and voltage minimum are compared.

The specific signal processing procedure of the polar value comparing and positioning circuit will be specifically described below by taking 8 voltage signals as an example.

Referring to fig. 2, in the present embodiment, the first comparing unit 10 includes four identical first comparators, each of which compares two input voltage signals and outputs one voltage signal having a high voltage from a high voltage output terminal (L output terminal) to the second comparing unit 20 and outputs one voltage signal having a low voltage from a low voltage output terminal (S output terminal) to the second comparing unit 20, and at the same time, a logic signal output terminal of the first comparator outputs a logic signal to the logic unit.

In this embodiment, the comparator COMP includes a positive input end, a negative input end, an L output end, an S output end, and a logic signal output end SK, where the positive input end and the negative input end are respectively connected to one FB voltage signal, after being compared by the comparator COMP, one FB signal with a higher voltage is output from the L output end, one FB signal with a lower voltage is output from the S output end, and at the same time, the logic signal output end SK outputs the logic signal SK, when the FB signal connected to the positive input end is higher than the FB signal connected to the negative input end, the output logic signal SK is a logic "1" signal, and when the FB signal connected to the positive input end is lower than the FB signal connected to the negative input end, the output logic signal SK is a logic "0" signal.

Specifically, the first comparing unit 10 includes four comparators COMP1 to COMP4, which are inputted with eight signals FB1 to FB8 in total, and compare the 8 FB voltages two by two, and select 4 higher values and 4 lower values. Taking COMP1 as an example, after COMP1 comparison, FB1 and FB2 have been compared, a higher voltage value in FB1 and FB2 is output from the L output terminal to COMP5 of the second comparing unit 20, and a lower voltage value in FB1 and FB2 is output from the S output terminal to COMP6 of the second comparing unit 20, while COMP1 outputs the logic signal SK1 to the logic unit 40. By analogy, a total of 4 higher values and 4 lower values are output, as well as 4 logic signals SK1-SK4.

Referring again to fig. 2, in the present embodiment, the second comparing unit 20 includes two identical high voltage comparators and two identical low voltage comparators, the high voltage comparators compare two voltage signals output from the output terminal of the first comparator L and output one voltage signal with a high voltage to the third comparing unit 30, and meanwhile, the logic signal output terminal of the high voltage comparator outputs a logic signal to the logic unit 40; the low voltage comparator compares two voltage signals output from the output end of the first comparator S, and outputs one voltage signal with a low voltage to the third comparing unit 30, and at the same time, the logic signal output end of the low voltage comparator outputs a logic signal to the logic unit 40.

Specifically, the second comparator unit 20 also includes four comparators, where COMP5 and COMP7 are high voltage comparators and COMP6 and COMP8 are low voltage comparators. By further comparing the 4 voltage higher values and the 4 voltage lower values output by the first comparator unit 10, 2 higher values and 2 lower values are selected. Taking the high voltage comparator COMP5 as an example, the higher values output by COMP1 and COMP2 are compared by COMP5, wherein the higher values are output from the L output terminal of COMP5 to COMP9 of the third comparing unit 30, and at the same time COMP5 outputs the logic signal SK5. By analogy, 2 higher values, 2 lower values and 4 logical signal values SK5, SK8, SK6, SK9 are selected in total.

It should be noted that the comparator of the second comparing unit 20 is the same as the comparator of the first comparing unit 10, except that the output terminal of the comparator L, S in the first comparing unit 10 is connected to the subsequent circuit, and only one output terminal of the comparator L, S in the second comparing unit 20 is selected to be connected to the subsequent circuit.

Referring to fig. 2 again, in the present embodiment, the third comparing unit 30 includes a highest value comparator and a lowest value comparator, where the highest value comparator compares the voltage signals output by the two high voltage comparators and outputs a high voltage signal to the logic unit 40, and at the same time, the logic signal output end of the highest value comparator outputs a logic signal to the logic unit 40; the minimum comparator compares the voltage signals output by the two low voltage comparators and outputs a low voltage signal to the logic unit 40, and at the same time, the logic signal output end of the minimum comparator outputs a logic signal to the logic unit 40.

Specifically, the third comparing unit 30 includes two comparators, namely, a highest value comparator COMP9 and a lowest value comparator COMP10, and the third comparing unit 30 includes a comparator similar to the second comparing unit 20, and only one output terminal of the comparator L, S is selected to be connected to a subsequent circuit. Taking the highest value comparator COMP9 as an example, after comparing the higher voltage values output by COMP5 and COMP7 with COMP9, the higher voltage signal max_sel is output from the L output terminal of COMP9 to the logic unit 40, and COMP9 outputs the logic signal SK7 to the logic unit 40. For the lowest value comparator COMP10, the voltage lower values output by COMP6 and COMP8 are compared by COMP10, wherein the lower value, i.e. the low voltage signal min_sel, is output from the S output terminal of COMP10 to logic unit 40, while COMP10 outputs logic signal SK10 to logic unit 40.

Referring to fig. 3, in the present embodiment, the logic unit 40 compares the high voltage signal with a first reference voltage, generates a first reference signal, logically processes the first reference signal and the logic signal, and outputs an overvoltage positioning signal; the logic unit 40 compares the low voltage signal with a second reference voltage to generate a second reference signal, performs logic processing on the second reference signal and the logic signal, and outputs an under-voltage positioning signal.

Specifically, the LOGIC unit 40 includes two comparators COMP11 and COMP12 and a LOGIC module. The hardware structure of the comparators COMP11 and COMP12 is the same as COMP1-COMP10, and since the logic processing is performed next, the logic unit 40 only needs to connect the logic signal output terminal with the subsequent circuit, and the L output terminal and the S output terminal are not used any more, see fig. 2 and fig. 3, and for distinguishing, the comparator COMP in fig. 2 and fig. 3 uses different schematic symbols. For the LOGIC module, the LOGIC module can perform LOGIC processing according to a set LOGIC relationship, such as a LOGIC truth table.

In this embodiment, the comparator COMP and the LOGIC module capable of implementing the corresponding functions in this embodiment are both related art, for example, referring to fig. 4, fig. 4 shows a comparator capable of implementing the function COMP11 in fig. 3, where INN and INP are two input terminals of the comparator, corresponding to the positive and negative input terminals of COMP11, the comp_out output terminal corresponds to the LOGIC signal output terminal of COMP11, and when the INN voltage is higher than INP, the output signal comp_out is inverted from low level to high level; m1 and M2 play a positive feedback acceleration role, and can accelerate the overturning action; GND is the ground terminal, VDD is the power-on terminal, EN is the enable signal for turning on or off the comparator,

referring again to fig. 3, in the present embodiment, COMP11 compares the high voltage signal max_sel with the first reference voltage VREF1, outputs the first reference signal OV, and the LOGIC module logically processes the first reference signal OV and the LOGIC signals output from the first to third comparing units, and outputs the overvoltage positioning signal OVx; COMP12 compares the low voltage signal min_sel with the second reference voltage VREF2 to output a second reference signal UV, and the LOGIC module logically processes the second reference signal UV and the LOGIC signals output from the first to third comparison units to output an under-voltage positioning signal UVx.

For an over-voltage condition, VREF1 is a first reference voltage, i.e., an over-voltage threshold at over-voltage, such as 2V, for which the channel is over-voltage, assuming that the channel voltage exceeds the over-voltage threshold. When the high voltage signal max_sel selected by COMP11 is higher than VREF1, the channel where the high voltage signal max_sel is located is over-voltage, at this time, the output first reference signal OV is turned from low level to high level, the LOGIC module performs LOGIC processing based on the LOGIC truth table of SK1-SK7 under the triggering of the first reference signal OV of high level, and outputs the over-voltage positioning signal OVx, so as to position the over-voltage channel, for example, when OVx is OV1, the channel where FB1 is located is over-voltage. And OVx of the channel toggles from low to high, thereby shutting off the channel. When the selected MAX_SEL is lower than VREF1, the output first reference signal OV is low, and all channels are not over-pressed because the highest high voltage signal in all channel voltages is not over-pressed, at this time, the first reference signal OV continues to keep low, and the LOGIC module does not act.

For an under-voltage condition, VREF2 is a second reference voltage, i.e., an under-voltage threshold at under-voltage, e.g., 0.1V, and the channel is under-voltage if the channel voltage is below the over-voltage threshold. When the low voltage signal min_sel selected by COMP12 is lower than VREF2, the channel where the low voltage signal min_sel is located is under-voltage, at this time, the output second reference signal UV is turned from low level to high level, the LOGIC module performs LOGIC processing based on the LOGIC truth tables of SK1-SK4 and SK8-SK10 under the triggering of the second reference signal UV at high level, and outputs the under-voltage positioning signal UVx, so as to position the under-voltage channel, for example, when UVx is UV1, indicating that the channel where FB1 is located is under-voltage. And UVx of the channel toggles from low to high, thereby shutting off the channel. When the selected MIN_SEL is higher than VREF2, the output second reference signal UV is low, and since the low voltage signal with the lowest voltage in all channels is not undervoltage, all channels are not undervoltage, at this time, the second reference signal UV continues to keep low, and the LOGIC module does not act.

Referring to Table one, a logical truth table for determining an overpressure condition is shown.

List one

MAX_FB

SK1

SK2

SK3

SK4

SK5

SK6

SK7

FB1

1

x

1

x

1

FB2

0

x

1

x

1

FB3

x

1

x

0

x

1

FB4

x

0

x

0

x

1

FB5

x

1

x

1

0

FB6

x

0

x

1

0

FB7

x

1

x

0

FB8

x

0

x

0

In table one, x represents an arbitrary value. The LOGIC module can locate the overvoltage channel by the LOGIC signal values of SK1-SK 7. Taking the channel overvoltage of FB4 as an example, when the channel overvoltage of FB4 is present, the logic signal values of SK1-SK7 are sk2=0, sk5=0, sk7=1, sk1, SK3, SK4, SK6 are x, that is, when sk2=0, sk5=0, sk7=1, sk1, SK3, SK4, SK6 are x, the channel overvoltage of FB4 is present.

For the case of channel under-voltage, the generation principle of the channel over-voltage corresponding logic is the same, and the logic is inverted, so that the description is omitted.

It should be noted that, in the initial state, all OVx channels default to low level, when the circuit is powered on and enters a real-time detection state, the circuit selects the high voltage signal of the channel with the maximum value to compare with the first reference signal, if the high voltage signal still does not exceed the first reference signal, namely, the overvoltage threshold value, then the channel and the rest channels keep in low level state, namely, normal working state; if the high voltage signal exceeds the over-voltage threshold, then the OVx corresponding to this maximum channel goes from low to high, closing the output channel, while the other channels continue to remain low, but then the high voltage signal is selected again in the remaining channels, the over-voltage comparison is performed again, and so on.

Example two

The embodiment of the invention provides a chip, which comprises a multi-way extremum comparing and positioning circuit based on a high-speed comparator array, wherein the multi-way extremum comparing and positioning circuit based on the high-speed comparator array comprises a plurality of comparing units and logic units which are sequentially connected, wherein the plurality of comparing units at least comprises three comparing units, namely a first comparing unit, a second comparing unit and a third comparing unit;

the first comparison unit inputs multiple paths of voltage signals, compares the voltage levels of the input multiple paths of voltage signals, outputs voltage signals to the second comparison unit, and outputs logic signals to the logic unit;

In this embodiment, the first comparing unit includes four identical first comparators, each of which compares two input voltage signals, outputs one voltage signal with a high voltage from a high voltage output terminal to the second comparing unit, outputs one voltage signal with a low voltage from a low voltage output terminal to the second comparing unit, and simultaneously outputs a logic signal from a logic signal output terminal of the first comparator to the logic unit.

In this embodiment, the second comparing unit includes two identical high voltage comparators and two identical low voltage comparators, the high voltage comparators compare two voltage signals output from the high voltage output terminal of the first comparator, and output one voltage signal with a high voltage to the third comparing unit, and at the same time, the logic signal output terminal of the high voltage comparator outputs a logic signal to the logic unit; the low voltage comparator compares two paths of voltage signals output from the low voltage output end of the first comparator, outputs one path of voltage signals with low voltage to the third comparison unit, and meanwhile, the logic signal output end of the low voltage comparator outputs logic signals to the logic unit.

In this embodiment, the third comparing unit includes a highest value comparator and a lowest value comparator, where the highest value comparator compares the voltage signals output by the two high voltage comparators and outputs a high voltage signal to the logic unit, and at the same time, the logic signal output end of the highest value comparator outputs a logic signal to the logic unit; the lowest value comparator compares the voltage signals output by the two low voltage comparators and outputs a low voltage signal to the logic unit, and meanwhile, the logic signal output end of the lowest value comparator outputs a logic signal to the logic unit.

In this embodiment, the logic unit compares the high voltage signal with a first reference voltage to generate a first reference signal, performs logic processing on the first reference signal and the logic signal, and outputs an overvoltage positioning signal; and the logic unit compares the low-voltage signal with a second reference voltage to generate a second reference signal, performs logic processing on the second reference signal and the logic signal, and outputs an undervoltage positioning signal.

The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.

The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.

The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.

Claims

1. The multi-path extremum comparing and positioning circuit based on the high-speed comparator array is characterized by comprising a plurality of comparing units and a logic unit which are sequentially connected, wherein the plurality of comparing units at least comprise three comparing units, namely a first comparing unit, a second comparing unit and a third comparing unit;

the logic unit performs logic processing on the input logic signals, the high-voltage signals and the low-voltage signals and outputs overvoltage positioning signals and undervoltage positioning signals;

the first comparison unit comprises four identical first comparators, each first comparator compares two input voltage signals, one voltage signal with high voltage is output to the second comparison unit from a high voltage output end, one voltage signal with low voltage is output to the second comparison unit from a low voltage output end, and meanwhile, a logic signal output end of the first comparator outputs a logic signal to the logic unit;

specific:

the first comparison unit comprises four comparators COMP1-COMP4, eight paths of FB1-FB8 signals are input in total, and the four comparators COMP are used for comparing 8 FB voltages pairwise to select 4 higher values and 4 lower values;

after the comparison of the FB1 and the FB2 by the COMP1, the higher voltage value in the FB1 and the FB2 is output to the COMP5 of the second comparison unit from the L output end, the lower voltage value in the FB1 and the FB2 is output to the COMP6 of the second comparison unit from the S output end, meanwhile, the COMP1 outputs a logic signal SK1 to the logic unit, and the like, and 4 higher values and 4 lower values and 4 logic signals SK1-SK4 are output in total;

the comparator COMP comprises a positive input end, a negative input end, an L output end, an S output end and a logic signal output end SK, wherein the positive input end and the negative input end are respectively connected with one path of FB voltage signal, after comparison by the comparator COMP, one path of FB signal with higher voltage is output from the L output end, one path of FB signal with lower voltage is output from the S output end, meanwhile, the logic signal output end SK outputs the logic signal SK, when the FB signal connected with the positive input end is higher than the FB signal connected with the negative input end, the output logic signal SK is a logic '1' signal, and when the FB signal connected with the positive input end is lower than the FB signal connected with the negative input end, the output logic signal SK is a logic '0' signal;

the second comparison unit comprises two identical high-voltage comparators and two identical low-voltage comparators, the high-voltage comparators compare two paths of voltage signals output from the high-voltage output ends of the first comparators and output one path of voltage signals with high voltage to the third comparison unit, and meanwhile, the logic signal output ends of the high-voltage comparators output logic signals to the logic unit; the low-voltage comparator compares two paths of voltage signals output from the low-voltage output end of the first comparator, outputs one path of voltage signals with low voltage to the third comparison unit, and meanwhile, the logic signal output end of the low-voltage comparator outputs logic signals to the logic unit; the third comparison unit comprises a highest value comparator and a lowest value comparator, the highest value comparator compares the voltage signals output by the two high voltage comparators and outputs high voltage signals to the logic unit, and meanwhile, the logic signal output end of the highest value comparator outputs logic signals to the logic unit; the lowest value comparator compares the voltage signals output by the two low voltage comparators and outputs a low voltage signal to the logic unit, and meanwhile, the logic signal output end of the lowest value comparator outputs a logic signal to the logic unit; the logic unit compares the high voltage signal with a first reference voltage to generate a first reference signal, and performs logic processing on the first reference signal and logic signals output by the first comparison unit, the second comparison unit and the third comparison unit to output an overvoltage positioning signal; the logic unit compares the low voltage signal with a second reference voltage to generate a second reference signal, and performs logic processing on the second reference signal and logic signals output by the first comparison unit, the second comparison unit and the third comparison unit to output an undervoltage positioning signal.

2. The chip is characterized by comprising a multi-path extremum comparing and positioning circuit based on a high-speed comparator array, wherein the multi-path extremum comparing and positioning circuit based on the high-speed comparator array comprises a plurality of comparing units and a logic unit which are sequentially connected, and the plurality of comparing units at least comprise three comparing units, namely a first comparing unit, a second comparing unit and a third comparing unit;

the first comparison unit comprises four identical first comparators, each first comparator compares two input voltage signals, one voltage signal with high voltage is output to the second comparison unit from a high voltage output end, one voltage signal with low voltage is output to the second comparison unit from a low voltage output end, meanwhile, a logic signal output end of the first comparator outputs a logic signal to the logic unit,

specific:

the second comparison unit comprises two identical high-voltage comparators and two identical low-voltage comparators, the high-voltage comparators compare two paths of voltage signals output from the high-voltage output ends of the first comparators and output one path of voltage signals with high voltage to the third comparison unit, and meanwhile, the logic signal output ends of the high-voltage comparators output logic signals to the logic unit; the low-voltage comparator compares two paths of voltage signals output from the low-voltage output end of the first comparator, outputs one path of voltage signals with low voltage to the third comparison unit, and meanwhile, the logic signal output end of the low-voltage comparator outputs logic signals to the logic unit;

the third comparison unit comprises a highest value comparator and a lowest value comparator, the highest value comparator compares the voltage signals output by the two high voltage comparators and outputs high voltage signals to the logic unit, and meanwhile, the logic signal output end of the highest value comparator outputs logic signals to the logic unit; the lowest value comparator compares the voltage signals output by the two low voltage comparators and outputs a low voltage signal to the logic unit, and meanwhile, the logic signal output end of the lowest value comparator outputs a logic signal to the logic unit;

the logic unit compares the high voltage signal with a first reference voltage to generate a first reference signal, and performs logic processing on the first reference signal and logic signals output by the first comparison unit, the second comparison unit and the third comparison unit to output an overvoltage positioning signal; the logic unit compares the low voltage signal with a second reference voltage to generate a second reference signal, and performs logic processing on the second reference signal and logic signals output by the first comparison unit, the second comparison unit and the third comparison unit to output an undervoltage positioning signal.