CN107045425B - Implementation method of high-precision time-measuring subsystem - Google Patents

Abstract

The invention discloses a method for realizing a time subsystem of a high-precision meter, which comprises the following stepsIs characterized in that two hardware timers, namely a hardware timer T0 and a hardware timer T1 are arranged, the two hardware timers respectively and independently work, and T0_realAnd T1_realAnd C0_reloadAnd C1_reloadForming a differential relationship; when the microprocessor core needs to read the timing output T of the current subsystem_currentAt this time, the timing output value T0 of the hardware timer 0 is read_currentAnd the current timing output value T1 of the hardware timer 1_currentWhen T0_current＝T1_currentWhen, T_currentIs T0_currentOr T1_current(ii) a When T0_current！＝T1_currentAccording to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe difference relation of the sub-system is judged and obtained_current. By adopting the differential timing of the two hardware timers in the solid state disk main controller, the timing data can be accurately acquired when the multi-core asynchronous access timing subsystem is ensured, and the precision of the timing subsystem is improved to the pure hardware precision of the timers.

Description

Implementation method of high-precision time-measuring subsystem

Technical Field

The invention relates to the field of chip design, in particular to a method for realizing a high-precision time-measuring subsystem of various main control chips with high requirements on a timing system.

Background

Based on performance considerations, a main control chip in a solid state disk usually adopts a plurality of processor cores, and a plurality of hardware timer resources are shared among multiple cores; the hardware timer works as follows: automatic loading of preset time length value T after initialization of hardware timer_initcountAfter the value is gradually decreased to 0, the timer hardware is automatically loaded with T again_initcountAnd triggering the interrupt, and working in a circulating way to trigger the interrupt at regular time. A solid state disk timing subsystem is generally realized by combining software and hardware, and FIG. 1 is a timing work schematic diagram of a conventional timing subsystem, wherein after a hardware Timer HW Timer 0 is triggered and interrupted, a processor core enters an interrupt service program to increment the number of times of Timer reloading C_reload(ii) a Timer real-time value T read back by processor core_realThe current time value is T_current＝T₀+T_real,T_0＝T_initcountX C_reload. Under normal conditions, the precision of the timing subsystem is required to be the pure hardness of a timerPiece precision; but when the timing subsystem is in the metering blind zone (the metering blind zone is: heavy load T of hardware timer)_initcountAnd triggering the interrupt until the interrupt service routine is completed C_reloadBefore the value is incremented), C read by another processor core_reloadThe value will be 1 less than the actual value, i.e. T calculated by the timing subsystem_currentThe value is smaller than the actual value by T_initcount，Causing the accuracy of the timing subsystem to be reduced to T_initcount,Compared with a timer, the precision of pure hardware is different by thousands of times.

Disclosure of Invention

Aiming at the defects, the invention aims to solve the problem that the timing precision of the timing subsystem is reduced when a metering blind area occurs.

In order to achieve the above object, the present invention provides a method for implementing a high-precision time counting subsystem, which is characterized in that two hardware timers, namely a hardware timer T0 and a hardware timer T1, are provided, the two hardware timers respectively and independently operate, and T0_realAnd T1_realAnd C0_reloadAnd C1_reloadForming a differential relationship; t0_realReal-time value of hardware timer T0, T1_realReal-time value of hardware timer T1, C0_reloadThe number of times of reloading of the hardware timer T0, C1_reloadThe number of times of reloading of the hardware timer T1; when the microprocessor core needs to read the timing output T of the current subsystem_currentAt this time, the timing output value T0 of the hardware timer 0 is read_currentAnd the current timing output value T1 of the hardware timer 1_currentWhen T0_current＝T1_currentWhen, T_currentIs T0_currentOr T1_current(ii) a When T0_current！＝T1_currentAccording to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe difference relation of the sub-system is judged and obtained_current。

The high-precision timing subsystem is realized according to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe difference relation of the sub-system is judged and obtained_currentThe judgment is carried out according to the following method:

(1))T1_real＝T0_real+T_initcountand C0_reload＝2C1_reloadThen T_current＝2T_initcountX C1_reload+T1_real；

(2)T1_real＝T0_realAnd C0_reload＝2C1_reload1 is then T_current＝2T_initcountX C1_reload+T1_real；

(3)T1_real＝T0_realAnd C0_reload＝2C1_reloadThen T_current＝2T_initcountX C1_reload+T1_real；

(4)T1_real＝T0_realAnd C0_reload＝2C1_reload+1 is T_current＝2T_initcountX(C1_reload+1)+T1_real；

(5)T1_real＝T0_realAnd C0_reload＝2C1_reload+2 is T_current＝2T_initcountX(C1_reload+1)+T1_real；

(6) If T1 fails to satisfy the above condition, it is determined that the timing subsystem is abnormal in timing, and the timing subsystem is required to be reset.

According to the method, two hardware timers in the solid state disk main controller are used for differential timing, so that the timing data can be accurately acquired when the multi-core asynchronous access timing subsystem is ensured, and the precision of the timing subsystem is improved to the pure hardware precision of the timers.

Drawings

FIG. 1 is a schematic diagram of a conventional timing subsystem timing operation;

FIG. 2 is a schematic diagram of the timing operation of the high accuracy timing subsystem.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 2 is a schematic diagram of the timing operation of the high-precision timing subsystem, which is described by taking a solid state disk as an example, and two hardware timers and an interrupt service routine thereof in the solid state disk host controller are respectively a hardware Timer 0HW Timer 0 and a hardware Timer 1HW Timer 1 for completing the timing operation. Hardware timer 0 automatic reload period is T_initcount，The current time value calculated by the microprocessor core is T0_current＝T_initcountX C0_reload+T0_real(ii) a The automatic overload period of the hardware timer 1 is 2T_initcount，The current time value calculated by the microprocessor core is T1_current＝2T_initcountX C1_reload+T1_real。

When T0_currentAnd T1_currentThe numerical values are consistent, and the value T is output in timing_current＝2T_initcountX C1_reload+T1_real；

When T0_currentAnd T1_currentIf the values are not consistent, the timing subsystem may be in a metering pseudo-blind zone, which may be determined according to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe formed difference relationship identifies the metering pseudo-blind area and deduces the real timing output value T_current：

(1) If the timing subsystem is in the metering pseudo-blind area 1, T0 is detected because the hardware timer 1 is not overloaded_real、T1_realAnd C1_reloadThe values are all true values, C0_reloadLess than 1 than the true value.

When T1_realEqual to T0_real+T_initcountAnd C0_reloadEqual to 2C1_reloadThe timing subsystem can be identified to be in a metering pseudo-blind area 1; output value T of timing subsystem_current＝2T_initcountX C1_reload+T1_real；

(2) If the timing subsystem is in the metering pseudo-blind area 0, at the moment, the hardware timer 0 and the hardware timer 1 are overloaded, T0_real、T1_realThe values being true values, C0_reload、C1_reloadMay be less than 1 than the true value.

When T1_realEqual to T0_realAnd C0_reloadEqual to 2C1_reload-1 can identify that the timing subsystem is in metering pseudo-blind zone 0, and C0_reloadIncomplete increment, 1 less than true value, C1_reloadCompleting increment and obtaining a true value; output value T of timing subsystem_current＝2T_initcountX C1_reload+T1_real；

When T1_realEqual to T0_realAnd C0_reloadEqual to 2C1_reloadIt can be identified that the timing subsystem is in non-metering pseudo-blind zone 0, and C0_reloadComplete increment, true value, C1_reloadCompleting increment and obtaining a true value; output value T of timing subsystem_current＝2T_initcountX C1_reload+T1_real；

When T1_realEqual to T0_realAnd C0_reloadEqual to 2C1_reload+1 may identify that the timing subsystem is in metering pseudo-blind zone 0, and C0_reloadIncomplete increment, 1 less than true value, C1_reloadIncomplete increment is 1 less than the true value; output value T of timing subsystem_current＝2T_initcountX(C1_reload+1)+T1_real；

When T1_realEqual to T0_realAnd C0_reloadEqual to 2C1_reload+2 may identify that the timing subsystem is in metering pseudo-blind zone 0, and C0_reloadComplete increment, true value, C1_{read none}Finishing increasing and reducing the value by 1 compared with the true value; output value T of timing subsystem_current＝2T_initcountX(C1_reload+1)+T1_real；

(3) Situations other than those described above may be considered as a timing subsystem exception, requiring the timing subsystem to be reset.

In summary, the timing subsystem can be based on T0_real、T1_real、C0_reload、C1_reloadUsing T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe formed differential relation effectively identifies the metering pseudo-blind area, accurately judges the working state of the hardware timer and deduces a real timing output value T_current。

While the invention has been described with reference to a particular embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (1)

1. A method for realizing a high-precision time counting subsystem is characterized in that two hardware timers, namely a hardware timer T0 and a hardware timer T1 are arranged, the two hardware timers respectively and independently work, and T0_realAnd T1_realAnd C0_reloadAnd C1_reloadForming a differential relationship; t0_realReal-time value of hardware timer T0, T1_realReal-time value of hardware timer T1, C0_reloadThe number of times of reloading of the hardware timer T0, C1_reloadThe number of times of reloading of the hardware timer T1; when the microprocessor core needs to read the timing output T of the current subsystem_currentAt this time, the timing output value T0 of the hardware timer 0 is read_currentAnd the current timing output value T1 of the hardware timer 1_currentWhen T0_current＝T1_currentWhen, T_currentIs T0_currentOr T1_current(ii) a When T0_current！＝T1_currentAccording to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe difference relation of the sub-system is judged and obtained_current(ii) a Said is according to T0_realAnd T1_realAnd C0_reloadAnd C1_reloadThe difference relation of the sub-system is judged and obtained_currentAccording to the following methodAnd (4) line judgment:

(1)T1_real＝T0_real+T_initcountand C0_reload＝2C1_reloadThen T_current＝2T_initcountX C1_reload+T1_real；

(2)T1_real＝T0_realAnd C0_reload＝2C1_reload1 is then T_current＝2T_initcountX C1_reload+T1_real；

(3)T1_real＝T0_realAnd C0_reload＝2C1_reloadThen T_current＝2T_initcountX C1_reload+T1_real；

(4)T1_real＝T0_realAnd C0_reload＝2C1_reload+1 is T_current＝2T_initcountX(C1_reload+1)+T1_real；

(5)T1_real＝T0_realAnd C0_reload＝2C1_reload+2 is T_current＝2T_initcountX(C1_reload+1)+T1_real；

(6) If T1 fails to satisfy the above condition, it is determined that the timing subsystem is abnormal in timing, and the timing subsystem is required to be reset.

Images