CN107026872B - Method for preventing user personal information from being decoded - Google Patents
Method for preventing user personal information from being decoded Download PDFInfo
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- CN107026872B CN107026872B CN201710347266.7A CN201710347266A CN107026872B CN 107026872 B CN107026872 B CN 107026872B CN 201710347266 A CN201710347266 A CN 201710347266A CN 107026872 B CN107026872 B CN 107026872B
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000003860 storage Methods 0.000 claims abstract description 78
- 238000012795 verification Methods 0.000 claims abstract description 38
- 238000012544 monitoring process Methods 0.000 claims abstract description 20
- 230000002265 prevention Effects 0.000 claims abstract description 14
- 238000013500 data storage Methods 0.000 claims abstract description 7
- 239000011159 matrix material Substances 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 claims description 11
- 238000001514 detection method Methods 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 4
- 125000004122 cyclic group Chemical group 0.000 claims description 3
- 238000002360 preparation method Methods 0.000 claims description 3
- 238000004891 communication Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
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- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
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- 238000009826 distribution Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000010079 rubber tapping Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/12—Applying verification of the received information
- H04L63/123—Applying verification of the received information received data contents, e.g. message integrity
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
- H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/08—Network architectures or network communication protocols for network security for authentication of entities
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1441—Countermeasures against malicious traffic
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
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Abstract
A method of preventing personal information of a user from being deciphered, comprising: inputting personal user information through the energy-saving monitoring switch; carrying out information security verification on the input personal user information; carrying out integrity verification on the personal user information after the security verification; carrying out anti-deciphering pre-operation on the personal user information subjected to integrity verification; performing anti-deciphering operation on the personal user information subjected to integrity verification; selecting a data storage mode; and storing the personal user information subjected to the deciphering prevention operation into a local or remote storage according to the storage mode. The method can obviously improve the difficulty of decoding the personal information of the user and reduce the decoding probability; the space of a carrier storing the personal information of the user is not excessively occupied, and the subsequent information access speed of a user personal information operator with proper authority is improved; meanwhile, the whole circuit is more compact, the occupied physical space is smaller, and the power consumption of the whole system can be effectively reduced.
Description
Technical Field
The present invention relates generally to the field of electrical digital data processing, and more particularly to a method for preventing the deciphering of a user's personal information.
Background
With the rapid development of industry and informatization, data has become a center of information nowadays, and various types of data are spread all over the world, including communication data, business data, administrative data, military data, and the like. Such large-scale, high-speed transmission, diversification, and wide-distribution storage of complex data sets have different values for different operators. Among these data, the personal information of the user has specificity, and the information object thereof is peripheral information related to the personal of the user in a specific scene, wherein, both information which can be disclosed or is desired to be disclosed is included, such as that a star wants to achieve the promotion of popularity through the disclosure and diffusion of the personal information; but also includes information which can be publicly kept secret, such as information for setting open accessible personal micro blogs, log records and the like; in particular, information that the user himself is sensitive and unwilling to disclose is included, which includes personal privacy data, personal communication data, personal identification data, personal belonging information data, etc. that are managed and used.
With diversification and increasing convenience of storage media, information which is sensitive and unwilling to be disclosed by a user person is often stored on a personal portable terminal or encrypted in a public network space, and the like. However, the storage is involved, and higher requirements are necessarily put on the security and integrity protection of data. Since unauthorized persons or organizations can pretend to be valid users to gain access to important resources or gain authority by cracking public network spaces, thereby posing a threat to users' personal information. In recent years, events causing loss and disoperation to users due to deciphered personal information of the users are not a group, for example, orders of millions of hotel customers, user names, identity cards, mobile phone numbers, room numbers, house types, house opening time, house returning time, home addresses, four last digits of credit cards, credit card expiration dates, mails and a great deal of sensitive information are leaked from a plurality of famous chain hotels in China due to security holes. In addition, the mail and password information of time warner are stolen; the credit-integrity life insurance company leaks sensitive information such as tens of thousands of customer bank card numbers, passwords, address of an issuer, identity cards and the like; multiple iOS applications in the apple application store are under attack; the MongoDB database causes the leakage of important information of 5800 ten thousand business users due to the lack of effective safety protection measures, including information such as names, IP addresses, mail account numbers, professions, vehicle data, dates of birth, and the like. The deciphering party deciphers and steals personal information such as client names, birthdays, email addresses, medical insurance numbers and the like through a means, and great risks and losses are brought to users.
Although the management party of the personal information of the user tries various means to prevent the personal information, the vulnerability still exists and the security is not high. Such as by timing detection to attack the carrier storing the user's personal information, but there are also vulnerabilities and deficiencies. The iron tapping needs to be hard per se, and also needs to start with the theme of effective anti-deciphering of the personal data of the user, so that the difficulty of deciphering the personal information of the user is obviously improved, and the deciphering probability is reduced; the space of a carrier storing the personal information of the user is not excessively occupied, and the subsequent information access speed of a user personal information operator with proper authority is improved; compared with the prior art, the circuit has the advantages that an additional detection circuit is not needed, and a power circuit, a clock circuit, a driving circuit and grounding layout wiring required by the detection circuit are not needed, so that the whole circuit is more compact, the occupied physical space is smaller, and the power consumption is lower.
Disclosure of Invention
One of the objectives of the present invention is to provide a method for preventing the personal information of the user from being decoded, which can significantly improve the difficulty of decoding the personal information of the user and reduce the decoding probability; the space of a carrier storing the personal information of the user is not excessively occupied, and the subsequent information access speed of a user personal information operator with proper authority is improved; meanwhile, the whole circuit is more compact, the occupied physical space is smaller, and the power consumption of the whole system can be effectively reduced.
The technical scheme adopted by the invention to solve the technical problems is as follows: a method of preventing personal information of a user from being deciphered, comprising: in step S1, personal user information is input through the energy saving monitoring switch; in step S2, information security verification is performed on the input personal user information; in step S3, performing integrity verification on the security-verified individual user information; in step S4, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification; in step S5, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification; in step S6, a data storage method is selected; and in step S7, storing the personal user information after the anti-deciphering prediction operation in a local or remote storage according to the storage mode.
According to another aspect of the present invention, the inputting of the individual user information through the energy saving monitoring switch in step S1 includes: inputting the personal user information into an energy-saving monitoring switch, and transmitting a control signal through monitoring and judging so as to monitor, detect and input the personal user information; wherein the energy saving monitoring switch comprises: the personal user information input is coupled with a first resistor and a fourth resistor, the other end of the first resistor is coupled with a second resistor, a third resistor, a first electrode of a third transistor and a second electrode of a fourth transistor, wherein the other end of the second resistor is coupled with a negative input end of a first operational amplifier, the other end of the third resistor is coupled with a positive output end of the first operational amplifier, the second electrode of the third transistor is coupled with a positive power supply end of the first operational amplifier, the first electrode of the fourth transistor is coupled with a negative power supply end of the first operational amplifier, the positive input end of the first operational amplifier is coupled with a first fixed voltage, the difference between the first fixed voltage and the negative power supply end of the first operational amplifier is less than half of the difference between the positive power supply end of the first operational amplifier and the negative power supply end of the first operational amplifier, the other end of the fourth resistor is coupled with a fifth resistor, a sixth resistor, the other end of the sixth resistor is coupled with a seventh resistor, and the second resistor, An eighth resistor, a first pole of the first transistor, a second pole of the second transistor, another end of the seventh resistor being coupled to the negative input terminal of the second operational amplifier, another end of the eighth resistor being coupled to the negative output terminal of the second operational amplifier, a second pole of the first transistor being coupled to the positive power supply terminal of the second operational amplifier, a first pole of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, a positive input terminal of the second operational amplifier being coupled to a second fixed voltage, the difference between the second fixed voltage and the negative power supply terminal being less than half the difference between the positive power supply terminal and the negative power supply terminal of the second operational amplifier, another end of the fifth resistor, another end of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, an output terminal of the first operational amplifier being coupled to a control terminal of the fifth transistor, a first terminal of the fifth transistor being coupled to the personal user information input, a second terminal of the fifth transistor being coupled to the personal user information input for verification use, the output end of the second operational amplifier is coupled to the control end of a sixth transistor, the first end of the sixth transistor is coupled to the personal user information input, the second end of the sixth transistor is coupled to the personal user information input for verification use, the output ends of the first operational amplifier and the second operational amplifier are output through an OR logic gate, and the output is coupled to an enabling signal of the anti-decoding party so as to enable the starting and the preparation of the anti-decoding party, the control party and the storage provider party.
According to another aspect of the present invention, the first poles of the first to fourth transistors may be positive input electrodes, and the second poles of the first to fourth transistors may be negative input electrodes. The first to fourth transistors may be two-terminal semiconductor devices, or the first to fourth transistors may be three-terminal semiconductor devices in which both terminals are shorted. The fifth transistor is an N-type semiconductor transistor, and the sixth transistor is a P-type semiconductor transistor. The positive power supply end of the first operational amplifier is coupled with the positive power supply end of the second operational amplifier, and the negative power supply end of the first operational amplifier is coupled with the negative power supply end of the second operational amplifier; the first fixed voltage and the second fixed voltage are in integral multiple relation with each other.
According to another aspect of the present invention, in step S4, the performing a deciphering prevention operation on the personal user information for integrity verification includes: the personal user information after the verification is processed by matrixing, the anti-decoding party divides the personal user information into a matrix of U × V according to the input bits, the element is Mi, and the matrix is marked as Matr, namely, Matr ═ M1, M2, … …, Mn ], where n ═ U × V, and U and V are both positive integers.
According to another aspect of the present invention, in step S5, the operation of preventing the integrity of the integrity-verified individual user information from being deciphered further comprises:
generating a key sequence Kij line by line, wherein i belongs to [1, V ], j belongs to [1, U ], and Kij in the sequence is:
and storing the Kij in the sequence;
performing exclusive-or operation on the key sequence Kij and each row to obtain a new sequence Matr '═ M1', M2 ', … …, Mn' ], and associating and storing the array and the Kij correspondingly, wherein max (x) represents taking the maximum value;
after calculating a U × V matrix, adding a flag value to the area of the associative memory, where the flag value is: mar is mod (T, n), wherein T is the number of elements of a preset ideal matrix and is a constant value;
and then, the operation is continuously executed for the next U × V matrix until the personal information of the user is completely input.
According to another aspect of the present invention, the selecting a data storage manner in step S6 includes: selecting local storage or adding remote storage, and then selecting direct storage or redundant storage;
if the local storage is selected, further determining whether the direct storage or the redundant storage is selected, if the direct storage is selected, storing the operated data in a local storage provider, if the direct storage is selected, further performing a storage redundant operation, and storing the redundant data in a specific area, wherein the specific area can be arranged in the vicinity of the area where the direct storage is located, or the specific area can be arranged in a dedicated redundant area of the storage provider; if the remote store is selected for addition, a similar operation is performed.
According to another aspect of the present invention, in step S7, the personal user information after the anti-deciphering prediction operation is stored in a local or remote storage according to the storage mode; wherein the remote storage in the storage provider can further process the data, including: and generating a first scrambling key, encrypting the personal user information by using the scrambling key, storing the personal user information in the first area, adding a cyclic redundancy check code in the area adjacent to the first area, and closing a key channel of the storage medium.
Drawings
Embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
fig. 1 illustrates a flowchart of a method of preventing a user's personal information from being deciphered, according to an exemplary embodiment of the present invention.
Detailed Description
In the following description, reference is made to the accompanying drawings that show, by way of illustration, several specific embodiments. It will be understood that: other embodiments are contemplated and may be made without departing from the scope or spirit of the present disclosure. The following detailed description is, therefore, not to be taken in a limiting sense.
Fig. 1 illustrates a flowchart of a method of preventing a user's personal information from being deciphered, according to an exemplary embodiment of the present invention.
In step S1, personal user information is input through the energy saving monitoring switch;
in step S2, information security verification is performed on the input personal user information;
in step S3, performing integrity verification on the security-verified individual user information;
in step S4, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification;
in step S5, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification;
in step S6, a data storage method is selected;
in step S7, the personal user information after the deciphering prevention operation is stored in a local or remote storage according to the storage mode.
Specifically, the input of the individual user information through the energy saving monitoring switch in step S1 may include, but is not limited to:
the personal user information is input to the energy-saving monitoring switch, and the monitoring and judgment are carried out to transmit the control signal so as to monitor, detect and input the personal user information.
Preferably, the power saving monitoring switch includes: the personal user information input is coupled with a first resistor and a fourth resistor, the other end of the first resistor is coupled with a second resistor, a third resistor, a first electrode of a third transistor and a second electrode of a fourth transistor, wherein the other end of the second resistor is coupled with a negative input end of a first operational amplifier, the other end of the third resistor is coupled with a positive output end of the first operational amplifier, the second electrode of the third transistor is coupled with a positive power supply end of the first operational amplifier, the first electrode of the fourth transistor is coupled with a negative power supply end of the first operational amplifier, the positive input end of the first operational amplifier is coupled with a first fixed voltage, the difference between the first fixed voltage and the negative power supply end of the first operational amplifier is less than half of the difference between the positive power supply end of the first operational amplifier and the negative power supply end of the first operational amplifier, the other end of the fourth resistor is coupled with a fifth resistor, a sixth resistor, the other end of the sixth resistor is coupled with a seventh resistor, and the second resistor, An eighth resistor, a first pole of the first transistor, a second pole of the second transistor, another end of the seventh resistor being coupled to the negative input terminal of the second operational amplifier, another end of the eighth resistor being coupled to the negative output terminal of the second operational amplifier, a second pole of the first transistor being coupled to the positive power supply terminal of the second operational amplifier, a first pole of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, a positive input terminal of the second operational amplifier being coupled to a second fixed voltage, the difference between the second fixed voltage and the negative power supply terminal being less than half the difference between the positive power supply terminal and the negative power supply terminal of the second operational amplifier, another end of the fifth resistor, another end of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, an output terminal of the first operational amplifier being coupled to a control terminal of the fifth transistor, a first terminal of the fifth transistor being coupled to the personal user information input, a second terminal of the fifth transistor being coupled to the personal user information input for verification use, the output end of the second operational amplifier is coupled to the control end of a sixth transistor, the first end of the sixth transistor is coupled to the personal user information input, the second end of the sixth transistor is coupled to the personal user information input for verification use, the output ends of the first operational amplifier and the second operational amplifier are output through an OR logic gate, and the output is coupled to an enabling signal of the anti-decoding party so as to enable the starting and the preparation of the anti-decoding party, the control party and the storage provider party.
Preferably, the first poles of the first to fourth transistors may be positive input electrodes, and the second poles of the first to fourth transistors may be negative input electrodes. More preferably, the first to fourth transistors may be two-terminal semiconductor devices, or the first to fourth transistors may be three-terminal semiconductor devices in which both ends are shorted.
Preferably, the ratio of the fourth resistance to the sixth resistance is not less than 9, preferably 14 or 19.
Preferably, the fifth transistor is an N-type semiconductor transistor, and the sixth transistor is a P-type semiconductor transistor.
Preferably, the positive power supply terminal of the first operational amplifier is coupled to the positive power supply terminal of the second operational amplifier, and the negative power supply terminal of the first operational amplifier is coupled to the negative power supply terminal of the second operational amplifier. The first fixed voltage and the second fixed voltage are in integral multiple relation with each other.
Through the operation of the step 1, the anti-deciphering party, the control party and the storage provider can enter a low power consumption state before and after data input through the monitoring, detection and input of the energy-saving monitoring switch with low power consumption, and only when the output ends of the first operational amplifier and the second operational amplifier are enabled through the output of the OR logic gate, the working state is entered, so that the power consumption of the whole system can be effectively reduced.
In step S2, the input personal user information is subjected to information security verification so that the user personal information itself does not affect the storage provider. Only the individual user information, which is verified by security, may proceed to step S2, otherwise, the process terminates.
In step S3, integrity verification is performed on the security-verified personal user information to ensure the integrity of the personal information of the user, so that subsequent data processing is more accurate and necessary, and if this step is lacked, loss of data due to channel reasons or external interference may result. Only the individual user information that passes the integrity verification may proceed to step S4, otherwise it terminates at this step.
In step S4, the operation of performing the deciphering prevention prediction on the personal user information subjected to the integrity verification includes: the personal user information after the verification is subjected to matrixing, that is, the anti-decoding party divides the personal user information into a matrix of U × V according to the input bits, the element is Mi, and marks the matrix as Matr, that is, Matr ═ M1, M2, … …, Mn ], where n ═ U × V, and U and V are both positive integers.
In step S5, the operation of anti-deciphering the individual user information for integrity verification further includes:
generating a key sequence Kij line by line, wherein i belongs to [1, V ], j belongs to [1, U ], and Kij in the sequence is:
and storing the Kij in the sequence;
exclusive-or operation is carried out on the key sequence Kij and each row to obtain a new sequence Matr '═ M1', M2 ', … …, Mn' ], the array and the Kij are stored in an associated mode, and max (×) represents that the maximum value is taken;
after calculating a U × V matrix, adding a flag value to the area of the associative memory, where the flag value is: mar is mod (T, n), wherein T is the number of elements of a preset ideal matrix and is a constant value;
and then, the operation is continuously executed for the next U × V matrix until the personal information of the user is completely input.
In step S6, the selecting the data storage method includes: selecting local storage or adding remote storage, and then selecting direct storage or redundant storage.
Preferably, if the local storage is selected, it is further determined whether the direct storage or the redundant storage, if the direct storage is selected, the data after the operation is stored in the local storage provider, if the direct storage is selected, the storage redundant operation is also performed, and the redundant data is stored in a specific area, which may be provided in the vicinity of the area where the aforementioned direct storage is located, or alternatively, the specific area may be provided in a dedicated redundant area of the storage provider. If the remote store is selected for addition, a similar operation is performed.
In step S7, the personal user information after the deciphering prevention operation is stored in a local or remote storage according to the storage mode.
And executing the storage operation according to the judgment of the previous step. Optionally, in this step, the remote storage in the storage provider may further process the data, including: and generating a first scrambling key, encrypting the personal user information by using the scrambling key, storing the personal user information in the first area, adding a cyclic redundancy check code in the area adjacent to the first area, and closing a key channel of the storage medium.
In summary, in the technical scheme of the present invention, by using a method for preventing the personal information of the user from being decoded, the power loss can be reduced, the power quality can be improved, the voltage imbalance can be reduced, the charging power offset can be reduced, the stability of the charging power grid can be further maintained, the utilization rate of the distributed power grid can be maximized, the power loss can be reduced, and the safety and the economy of the operation of the distributed power grid can be ensured.
It will be understood that: the examples and embodiments of the invention may be implemented in hardware, software, or a combination of hardware and software. As mentioned above, any body performing such a method may be stored in the form of volatile or non-volatile storage, for example a storage device like a ROM, whether erasable or rewritable or not, or in the form of memory, such as for example a RAM, a memory chip, a device or an integrated circuit or on an optically or magnetically readable medium such as for example a CD, a DVD, a disk or a tape. It will be understood that: storage devices and storage media are examples of machine-readable storage suitable for storing one or more programs that, when executed, implement examples of the present invention. Examples of the present invention may be conveyed electronically via any medium, such as a communications signal carried by a wired or wireless coupling, and the examples contain the same where appropriate.
It should be noted that: because the invention solves the technical problems that the difficulty of decoding the personal information of the user can be obviously improved and the decoding probability is reduced, the technical means which can be understood by technicians in the technical field of computers according to the teaching of the specification after reading the specification is adopted, the difficulty of decoding the personal information of the user can be obviously improved and the decoding probability is reduced; the space of a carrier storing the personal information of the user is not excessively occupied, and the subsequent information access speed of a user personal information operator with proper authority is improved; meanwhile, the whole circuit is more compact, the occupied physical space is smaller, and the power consumption of the whole system can be effectively reduced. Furthermore, the solution claimed in the appended claims has utility since it can be manufactured or used in industry.
The above description is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (3)
1. A method of preventing personal information of a user from being deciphered, comprising:
in step S1, personal user information is input through the energy saving monitoring switch;
in step S2, information security verification is performed on the input personal user information;
in step S3, performing integrity verification on the security-verified individual user information;
in step S4, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification;
in step S5, a deciphering prevention operation is performed on the personal user information subjected to the integrity verification;
in step S6, a data storage method is selected; and
in step S7, storing the personal user information after the deciphering prevention operation in a local or remote storage according to the storage mode;
wherein the inputting of the individual user information through the energy saving monitoring switch in step S1 includes: inputting the personal user information into an energy-saving monitoring switch, and transmitting a control signal through monitoring and judging so as to monitor, detect and input the personal user information;
wherein the energy saving monitoring switch comprises: the personal user information input is coupled with a first resistor and a fourth resistor, the other end of the first resistor is coupled with a second resistor, a third resistor, a first electrode of a third transistor and a second electrode of a fourth transistor, wherein the other end of the second resistor is coupled with a negative input end of a first operational amplifier, the other end of the third resistor is coupled with a positive output end of the first operational amplifier, the second electrode of the third transistor is coupled with a positive power supply end of the first operational amplifier, the first electrode of the fourth transistor is coupled with a negative power supply end of the first operational amplifier, the positive input end of the first operational amplifier is coupled with a first fixed voltage, the difference between the first fixed voltage and the negative power supply end of the first operational amplifier is less than half of the difference between the positive power supply end of the first operational amplifier and the negative power supply end of the first operational amplifier, the other end of the fourth resistor is coupled with a fifth resistor, a sixth resistor, the other end of the sixth resistor is coupled with a seventh resistor, and the second resistor, An eighth resistor, a first pole of the first transistor, a second pole of the second transistor, another end of the seventh resistor being coupled to the negative input terminal of the second operational amplifier, another end of the eighth resistor being coupled to the negative output terminal of the second operational amplifier, a second pole of the first transistor being coupled to the positive power supply terminal of the second operational amplifier, a first pole of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, a positive input terminal of the second operational amplifier being coupled to a second fixed voltage, the difference between the second fixed voltage and the negative power supply terminal being less than half the difference between the positive power supply terminal and the negative power supply terminal of the second operational amplifier, another end of the fifth resistor, another end of the second transistor being coupled to the negative power supply terminal of the second operational amplifier, an output terminal of the first operational amplifier being coupled to a control terminal of the fifth transistor, a first terminal of the fifth transistor being coupled to the personal user information input, a second terminal of the fifth transistor being coupled to the personal user information input for verification use, the output end of the second operational amplifier is coupled to the control end of a sixth transistor, the first end of the sixth transistor is coupled to the personal user information input, and the second end of the sixth transistor is coupled to the personal user information input for verification use, wherein the output ends of the first operational amplifier and the second operational amplifier are output through an OR logic gate, and the output is coupled to an enabling signal of the anti-decoding party so as to enable the starting and the preparation of the anti-decoding party, the control party and the storage provider;
wherein the first electrodes of the first to fourth transistors are one of positive input electrodes and negative input electrodes; the first to fourth transistors may be one of two-terminal or three-terminal semiconductor devices; the ratio of the fourth resistor to the sixth resistor is not less than 9; the fifth transistor is an N-type semiconductor transistor, and the sixth transistor is a P-type semiconductor transistor; the positive power supply end of the first operational amplifier is coupled with the positive power supply end of the second operational amplifier, and the negative power supply end of the first operational amplifier is coupled with the negative power supply end of the second operational amplifier;
through the operation of the step 1, the anti-deciphering party, the control party and the storage provider can enter a low power consumption state before and after data input through the monitoring, detection and input of the low power consumption energy-saving monitoring switch, and only enter a working state when the output ends of the first operational amplifier and the second operational amplifier are enabled through the output of the OR logic gate, so that the power consumption of the whole system can be effectively reduced;
in step S2, information security verification is performed on the input personal user information so that the user personal information itself does not affect the storage provider; only the personal user information passing the security verification can enter the step S2, otherwise, the step is terminated;
in step S3, integrity verification is performed on the security-verified personal user information to ensure the integrity of the personal information of the user, so that the subsequent data processing is more accurate and necessary, and if this step is lacked, loss of data due to channel reasons or external interference may result; step S4 may be entered only if the individual user information passes the integrity verification, otherwise, this step is terminated;
in step S4, the operation of performing the anti-deciphering prediction on the personal user information subjected to the integrity verification includes: performing matrixing processing on the personal user information after the verification, dividing the personal user information into a matrix of U × V by a decoding prevention party according to input bits, wherein an element is Mi, and marking the matrix as Matr, namely Matr ═ M1, M2, … …, Mn ], wherein n ═ U × V, and U and V are positive integers;
wherein in step S5, the operation of anti-deciphering the personal user information for integrity verification further comprises:
generating a key sequence Kij line by line, wherein i belongs to [1, V ], j belongs to [1, U ], and Kij in the sequence is:
and storing the Kij in the sequence;
performing exclusive-or operation on the key sequence Kij and each row to obtain a new sequence Matr '═ M1', M2 ', … …, Mn' ], and associating and storing the sequence and the Kij correspondingly, wherein max (x) represents that the maximum value is taken;
after calculating a U × V matrix, adding a flag value to the area of the associative memory, where the flag value is: mar is mod (T, n), wherein T is the number of elements of a preset ideal matrix and is a constant value;
and then, the operation is continuously executed for the next U × V matrix until the personal information of the user is completely input.
2. The method for preventing personal information of a user from being deciphered as claimed in claim 1, wherein the selecting the data storage manner in step S6 comprises: selecting local storage or adding remote storage, and then selecting direct storage or redundant storage;
if the local storage is selected, further determining whether the direct storage or the redundant storage is selected, if the direct storage is selected, storing the operated data in a local storage provider, if the direct storage is selected, further performing a storage redundant operation, and storing the redundant data in a specific area, wherein the specific area can be arranged in the vicinity of the area where the direct storage is located, or the specific area can be arranged in a dedicated redundant area of the storage provider; if the remote store is selected for addition, a similar operation is performed.
3. The method for preventing personal information of a user from being deciphered as claimed in claim 2, wherein in step S7, the personal information of the user after the deciphering prevention operation is stored in a local or remote storage according to a storage manner;
wherein the remote storage in the storage provider can further process the data, including: and generating a first scrambling key, encrypting the personal user information by using the scrambling key, storing the personal user information in the first area, adding a cyclic redundancy check code in the area adjacent to the first area, and closing a key channel of the storage medium.
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