CN107026615B - Two-point modulation circuit and working method thereof - Google Patents
Two-point modulation circuit and working method thereof Download PDFInfo
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- CN107026615B CN107026615B CN201710132698.6A CN201710132698A CN107026615B CN 107026615 B CN107026615 B CN 107026615B CN 201710132698 A CN201710132698 A CN 201710132698A CN 107026615 B CN107026615 B CN 107026615B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0941—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
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Abstract
The invention discloses a two-point modulation circuit and a working method thereof. The phase-locked loop phase error comprises a phase-locked loop phase error, a phase-locked loop phase error calculation module and a phase-locked loop phase error calculation module, wherein the phase-locked loop phase-. The invention can keep the output frequency of the reference crystal oscillator of the two-point modulation circuit and the frequency of the GPS signal second pulse signal synchronous.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a two-point modulation circuit and a working method thereof.
Background
In the modulation implementation mode of two-point modulation, one path of a baseband modulation signal directly modulates a voltage controlled oscillator VCO, and the other path of the baseband modulation signal controls the frequency of a reference crystal oscillator TCXO to carry out indirect modulation. Therefore, in the modulation process, the output frequency of the reference crystal oscillator TCXO is continuously changed due to the modulation.
Such devices employing two-point modulation schemes have had a number of applications both in the early days and at present. In the two-point modulation scheme, the change of the output frequency of the reference crystal oscillator TCXO is influenced by the baseband modulation signal, so that the actual frequency of the reference crystal oscillator TCXO cannot be obtained, and the output frequencies of the reference crystal oscillators TCXO of all devices are inconsistent. For example, in the application of the base station, the output frequencies of the reference crystal oscillators TCXO of the base stations modulated by two points are not consistent, which causes the radio frequency frequencies of the base stations to be inconsistent, and it is inconvenient for a user to re-adjust the frequency of the interphone when the user moves from the coverage of one base station to the coverage of another base station using the interphone.
Disclosure of Invention
The invention aims to overcome the technical problem that the output frequency of a reference crystal oscillator of the equipment adopting two-point modulation is not consistent at present, and provides a two-point modulation circuit and a working method thereof, which can keep the output frequency of the reference crystal oscillator of the two-point modulation circuit and the frequency of a GPS signal second pulse signal synchronous, thereby keeping the output frequency of the reference crystal oscillator of the equipment adopting two-point modulation consistent.
In order to solve the problems, the invention adopts the following technical scheme:
the invention relates to a two-point modulation circuit which comprises a voltage-controlled oscillator VCO, a first phase-locked loop PLL, a second phase-locked loop PLL, a first temperature compensation crystal oscillator TCXO, a second temperature compensation crystal oscillator TCXO, an error calculation module and an adder, wherein the input end of the voltage-controlled oscillator VCO and the first input end of the adder are used for receiving baseband modulation signals, the output end of the adder is electrically connected with the input end of the first temperature compensation crystal oscillator TCXO, the output end of the first temperature compensation crystal oscillator TCXO is electrically connected with the input end of the first phase-locked loop PLL and the input end of the second phase-locked loop PLL, the output end of the first phase-locked loop PLL is electrically connected with a control end of the voltage-controlled oscillator VCO, the output end of the voltage-controlled oscillator VCO is electrically connected with a feedback input end of the first phase-locked loop PLL, the output end of the second phase-locked loop PLL is electrically connected with the input end of the second temperature compensation crystal oscillator, The first input end of the error calculation module is electrically connected, the second input end of the error calculation module is used for receiving the GPS second pulse signal, and the output end of the error calculation module is electrically connected with the second input end of the adder.
In the technical scheme, a voltage controlled oscillator VCO, a first temperature compensated crystal oscillator TCXO and a first phase locked loop PLL form a traditional two-point modulation circuit. The first temperature compensation crystal oscillator TCXO outputs a reference clock signal, the reference clock signal comprises a modulation signal, the second phase-locked loop PLL can filter the modulation signal due to the low-pass characteristic of the phase-locked loop, the second phase-locked loop PLL filters the modulation signal in the clock signal and then outputs the filtered modulation signal to the second temperature compensation crystal oscillator TCXO, and the frequency of the clock signal output by the second temperature compensation crystal oscillator TCXO is consistent with the central frequency of the first temperature compensation crystal oscillator TCXO.
And the error calculation module calculates the frequency error of the clock signal output by the second temperature compensation crystal oscillator TCXO relative to the GPS second pulse signal, and the error signal is output to the adder to be superposed with the baseband modulation signal and then fed back to adjust the first temperature compensation crystal oscillator TCXO so that the frequency of the reference clock signal output by the first temperature compensation crystal oscillator TCXO is synchronous with the frequency of the GPS second pulse signal. The first temperature compensated crystal oscillator TCXO is a reference crystal oscillator, so that the radio frequency of the device using two-point modulation is kept uniform.
The first and second phase-locked loops PLL may use the sky72300-362 chip.
Preferably, the error calculation module adopts an FPGA chip.
The invention discloses a working method of a two-point modulation circuit, which is characterized by comprising the following steps of:
the baseband modulation signal is input into a first temperature compensation crystal oscillator TCXO and a voltage controlled oscillator VCO;
the first temperature compensation crystal oscillator TCXO outputs a reference clock signal containing a modulation signal to a first phase-locked loop PLL and a second phase-locked loop PLL, the second phase-locked loop PLL filters the modulation signal in the clock signal and then outputs the filtered modulation signal to the second temperature compensation crystal oscillator TCXO, and the frequency of the clock signal output by the second temperature compensation crystal oscillator TCXO is made to be consistent with the central frequency of the first temperature compensation crystal oscillator TCXO;
the error calculation module compares the clock signal output by the second temperature compensation crystal oscillator TCXO with the GPS second pulse signal to obtain an error signal of the clock signal output by the second temperature compensation crystal oscillator TCXO relative to the GPS second pulse signal, and the error signal is output to the adder to be superposed with the baseband modulation signal and then fed back to adjust the first temperature compensation crystal oscillator TCXO, so that the frequency of the reference clock signal output by the first temperature compensation crystal oscillator TCXO is synchronous with the frequency of the GPS second pulse signal.
Preferably, the error calculation module is configured to calculate an error between a clock signal frequency output by the second TCXO and a GPS second pulse signal frequency.
The invention has the beneficial effects that: the output frequency of the reference crystal oscillator of the two-point modulation circuit can be kept synchronous with the frequency of the GPS signal second pulse signal, so that the output frequency of the reference crystal oscillator of the equipment adopting two-point modulation is kept consistent, and the radio frequency of each equipment is kept consistent.
Drawings
FIG. 1 is a schematic diagram of an embodiment of the present invention.
In the figure: 1. the device comprises a voltage-controlled oscillator VCO (voltage controlled oscillator), 2, a first phase-locked loop PLL, 3, a second phase-locked loop PLL, 4, a first temperature compensation crystal oscillator TCXO, 5, a second temperature compensation crystal oscillator TCXO, 6, an error calculation module, 7 and an adder.
Detailed Description
The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings.
Example (b): a two-point modulation circuit of this embodiment is shown in fig. 1, and includes a voltage-controlled oscillator VCO1, a first phase-locked loop PLL2, a second phase-locked loop PLL3, a first temperature compensated crystal oscillator TCXO4, a second temperature compensated crystal oscillator TCXO5, an error calculation module 6, and an adder 7, where an input terminal of the voltage-controlled oscillator VCO1 and a first input terminal of the adder 7 are both configured to receive baseband modulation signals, an output terminal of the adder 7 is electrically connected to an input terminal of the first temperature compensated crystal oscillator TCXO4, an output terminal of the first temperature compensated crystal oscillator TCXO4 is electrically connected to an input terminal of the first phase-locked loop PLL2 and an input terminal of the second phase-locked loop PLL3, an output terminal of the first phase-locked loop PLL2 is electrically connected to a control terminal of the voltage-controlled oscillator VCO1, an output terminal of the voltage-controlled oscillator VCO1 is electrically connected to a feedback input terminal of the first phase-locked loop PLL2, an output terminal of the second phase-locked loop PLL 48 is electrically connected to an input terminal of the second temperature compensated crystal oscillator PLL3, A first input end of the error calculation module 6 is electrically connected, a second input end of the error calculation module 6 is used for receiving the GPS second pulse signal, and an output end of the error calculation module 6 is electrically connected with a second input end of the adder 7.
The voltage controlled oscillator VCO, the first temperature compensated crystal oscillator TCXO and the first phase locked loop PLL form a traditional two-point modulation circuit. The first temperature compensation crystal oscillator TCXO outputs a reference clock signal, the reference clock signal comprises a modulation signal, the second phase-locked loop PLL can filter the modulation signal due to the low-pass characteristic of the phase-locked loop, the second phase-locked loop PLL filters the modulation signal in the clock signal and then outputs the filtered modulation signal to the second temperature compensation crystal oscillator TCXO, and the frequency of the clock signal output by the second temperature compensation crystal oscillator TCXO is consistent with the central frequency of the first temperature compensation crystal oscillator TCXO.
And the error calculation module calculates the frequency error of the clock signal output by the second temperature compensation crystal oscillator TCXO relative to the GPS second pulse signal, and the error signal is output to the adder to be superposed with the baseband modulation signal and then fed back to adjust the first temperature compensation crystal oscillator TCXO so that the frequency of the reference clock signal output by the first temperature compensation crystal oscillator TCXO is synchronous with the frequency of the GPS second pulse signal. The first temperature compensated crystal oscillator TCXO is a reference crystal oscillator, so that the radio frequency of the device using two-point modulation is kept uniform.
The first and second phase-locked loops PLL may use the sky72300-362 chip. The error calculation module is realized by adopting an FPGA chip.
The working method of the two-point modulation circuit of the embodiment includes the following steps:
the baseband modulation signal is input into a first temperature compensation crystal oscillator TCXO and a voltage controlled oscillator VCO;
the first temperature compensation crystal oscillator TCXO outputs a reference clock signal containing a modulation signal to a first phase-locked loop PLL and a second phase-locked loop PLL, the second phase-locked loop PLL filters the modulation signal in the clock signal and then outputs the filtered modulation signal to the second temperature compensation crystal oscillator TCXO, and the frequency of the clock signal output by the second temperature compensation crystal oscillator TCXO is made to be consistent with the central frequency of the first temperature compensation crystal oscillator TCXO;
the error calculation module compares the clock signal output by the second temperature compensation crystal oscillator TCXO with the GPS second pulse signal to obtain an error signal of the clock signal output by the second temperature compensation crystal oscillator TCXO relative to the GPS second pulse signal, and the error signal is output to the adder to be superposed with the baseband modulation signal and then fed back to adjust the first temperature compensation crystal oscillator TCXO, so that the frequency of the reference clock signal output by the first temperature compensation crystal oscillator TCXO is synchronous with the frequency of the GPS second pulse signal.
The error calculation module is used for calculating the error between the clock signal frequency output by the second temperature compensation crystal oscillator TCXO and the GPS second pulse signal frequency.
Claims (4)
1. A two-point modulation circuit, characterized by: the phase-locked loop circuit comprises a voltage-controlled oscillator VCO (1), a first phase-locked loop PLL (2), a second phase-locked loop PLL (3), a first temperature compensation crystal oscillator TCXO (4), a second temperature compensation crystal oscillator TCXO (5), an error calculation module (6) and an adder (7), wherein the input end of the voltage-controlled oscillator VCO (1) and the first input end of the adder (7) are used for receiving baseband modulation signals, the output end of the adder (7) is electrically connected with the input end of the first temperature compensation crystal oscillator TCXO (4), the output end of the first temperature compensation crystal oscillator TCXO (4) is electrically connected with the input end of the first phase-locked loop PLL (2) and the input end of the second phase-locked loop PLL (3), the output end of the first phase-locked loop PLL (2) is electrically connected with the control end of the voltage-controlled oscillator VCO (1), the output end of the voltage-controlled oscillator VCO (1) is electrically connected with the feedback input end of the first phase-locked loop PLL (2), and the output end of the second phase-locked loop, the output end of the second temperature compensation crystal oscillator TCXO (5) is electrically connected with the feedback input end of the second phase-locked loop PLL (3) and the first input end of the error calculation module (6), the second input end of the error calculation module (6) is used for receiving a GPS second pulse signal, and the output end of the error calculation module (6) is electrically connected with the second input end of the adder (7).
2. The two point modulation circuit of claim 1, wherein: the error calculation module (6) adopts an FPGA chip.
3. A method of operating a two-point modulation circuit, comprising the steps of:
the baseband modulation signal is input into an adder and a voltage controlled oscillator VCO, and the adder superposes the error signal output by the error calculation module and the baseband modulation signal and then inputs the superposed signal into a first temperature compensation crystal oscillator TCXO;
the first temperature compensation crystal oscillator TCXO outputs a reference clock signal containing a modulation signal to a first phase-locked loop PLL and a second phase-locked loop PLL, the second phase-locked loop PLL filters the modulation signal in the reference clock signal and then outputs the filtered modulation signal to the second temperature compensation crystal oscillator TCXO, and the frequency of the clock signal output by the second temperature compensation crystal oscillator TCXO is made to be consistent with the central frequency of the first temperature compensation crystal oscillator TCXO;
the error calculation module compares the clock signal output by the second temperature compensation crystal oscillator TCXO with the GPS second pulse signal to obtain an error signal of the clock signal output by the second temperature compensation crystal oscillator TCXO relative to the GPS second pulse signal, and the error signal is output to the adder to be superposed with the baseband modulation signal and then fed back to adjust the first temperature compensation crystal oscillator TCXO, so that the frequency of the reference clock signal output by the first temperature compensation crystal oscillator TCXO is synchronous with the frequency of the GPS second pulse signal.
4. The operating method of the two-point modulation circuit according to claim 3, wherein: the error calculation module is used for calculating the error between the clock signal frequency output by the second temperature compensation crystal oscillator TCXO and the GPS second pulse signal frequency.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1451202A (en) * | 2000-08-04 | 2003-10-22 | 摩托罗拉公司 | Frequency modulator using a waveform generator |
| CN1524336A (en) * | 2001-02-22 | 2004-08-25 | �����ɷ� | Trimming method and trimming device for a pll circuit for two-point modulation |
| JP2013513343A (en) * | 2009-12-07 | 2013-04-18 | クゥアルコム・インコーポレイテッド | Configurable digital-analog phase-locked loop |
| CN203734658U (en) * | 2013-12-31 | 2014-07-23 | 深圳市友讯达科技发展有限公司 | High-speed data transmission radio station |
| CN105071800A (en) * | 2015-08-06 | 2015-11-18 | 深圳市好兄弟电子有限公司 | Modulation circuit for wireless microphone |
| CN105610464A (en) * | 2015-12-21 | 2016-05-25 | 上海华测导航技术股份有限公司 | Method and system for two-point injection type modulation of transmitter in data set |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9391625B1 (en) * | 2015-03-24 | 2016-07-12 | Innophase Inc. | Wideband direct modulation with two-point injection in digital phase locked loops |
-
2017
- 2017-03-07 CN CN201710132698.6A patent/CN107026615B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1451202A (en) * | 2000-08-04 | 2003-10-22 | 摩托罗拉公司 | Frequency modulator using a waveform generator |
| CN1524336A (en) * | 2001-02-22 | 2004-08-25 | �����ɷ� | Trimming method and trimming device for a pll circuit for two-point modulation |
| JP2013513343A (en) * | 2009-12-07 | 2013-04-18 | クゥアルコム・インコーポレイテッド | Configurable digital-analog phase-locked loop |
| CN203734658U (en) * | 2013-12-31 | 2014-07-23 | 深圳市友讯达科技发展有限公司 | High-speed data transmission radio station |
| CN105071800A (en) * | 2015-08-06 | 2015-11-18 | 深圳市好兄弟电子有限公司 | Modulation circuit for wireless microphone |
| CN105610464A (en) * | 2015-12-21 | 2016-05-25 | 上海华测导航技术股份有限公司 | Method and system for two-point injection type modulation of transmitter in data set |
Non-Patent Citations (2)
| Title |
|---|
| Investigation of Two-Point Modulation to Increase the GFSK Data Rate of PLL-Based Wireless Transceivers of Wireless Sensor Nodes;Hartwig Unterassinger, et al;《PRIME 2013》;20131231;第89-92页 * |
| PLL两点调制在跳频通信GMSK调制源中的应用;邓普等;《重庆邮电学院学报(自然科学版)》;20061231;第711-713页 * |
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