CN107025094A - A kind of reading and writing data management method and system - Google Patents

A kind of reading and writing data management method and system Download PDF

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Publication number
CN107025094A
CN107025094A CN201710344533.5A CN201710344533A CN107025094A CN 107025094 A CN107025094 A CN 107025094A CN 201710344533 A CN201710344533 A CN 201710344533A CN 107025094 A CN107025094 A CN 107025094A
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CN
China
Prior art keywords
read
bmc
smm
reading
data management
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN201710344533.5A
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Chinese (zh)
Inventor
王晓
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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Priority to CN201710344533.5A priority Critical patent/CN107025094A/en
Publication of CN107025094A publication Critical patent/CN107025094A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

The present invention provides a kind of reading and writing data management method and system, and the above method comprises the following steps:By the automatic regular polling function under the SMM i.e. SMM that is registered in being BIOS in basic input output system, it is the read-write requests that BMC is sent to obtain substrate manager;The read-write requests are converted under the SMM corresponding read write command on processor i.e. CPU;By the read write command, it is MSR to read and write model specific registers in the processor;By the read write command, it is MSR to read and write model specific registers in the processor, realizes read-write MSR register, obtains the key state of system, controls CPU partial function, realizes effective management and monitoring to system.

Description

A kind of reading and writing data management method and system
Technical field
The invention belongs to data management field, more particularly to a kind of reading and writing data management method and system.
Background technology
With Performance And Reliability of the user to computer, the raising of manageability requirement, CPU function is more and more multiple Miscellaneous, different CPU registers are also divided into be read and write in different modes.
CPU internal registers can be divided into configuration space registers CSR and model specific registers MSR, while CPU runs mould Formula is divided into SMM SMM and nonsystematic management mode Non-SMM again.CSR and part MSR can be under Non-SMM patterns Read and write by application program, part MSR concerns CPU critical functions, therefore can only be read and write under SMM mode.
CPU externally provides platform environment formula control interface i.e. PECI interfaces, and BMC can read and write CPU CSR by the interface Register, but MSR register can not be read and write, therefore can not also obtain the key state of system, also uncontrollable CPU part work( Can, it is impossible to realize the effective management and monitoring to system.
The content of the invention
The present invention provides a kind of reading and writing data management method and system, to solve the above problems.
The embodiment of the present invention provides a kind of reading and writing data management method.The above method comprises the following steps:
Pass through the automatic regular polling letter under the SMM i.e. SMM that is registered in being BIOS in basic input output system Number, it is the read-write requests that BMC is sent to obtain substrate manager;
The read-write requests are converted under the SMM corresponding read write command on processor i.e. CPU;
By the read write command, it is MSR to read and write model specific registers in the processor.
The embodiment of the present invention also provides a kind of reading and writing data management system, including basic input output system is BIOS, base Board management device is BMC, processor i.e. CPU;The BIOS, the BMC, the CPU are connected with each other;
By the automatic regular polling function under the SMM i.e. SMM that is registered in the BIOS, the BMC hairs are obtained The read-write requests sent;
The read-write requests are converted under the SMM corresponding read write command on the CPU;
By the read write command, it is MSR to read and write model specific registers in the CPU.
Pass through following scheme:By under the SMM i.e. SMM that is registered in being BIOS in basic input output system Automatic regular polling function, obtain substrate manager be BMC send read-write requests;The read-write requests are converted into the SMM Lower processor is corresponding read write command on CPU;By the read write command, model specific registers in the processor are read and write That is MSR, realizes read-write MSR register, obtains the key state of system, controls CPU partial function, and realization has to system Effect management and monitoring.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the application, this hair Bright schematic description and description is used to explain the present invention, does not constitute inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 show the flow chart of the according to embodiments of the present invention 1 reading and writing data management method provided;
Fig. 2 show the according to embodiments of the present invention 2 automatic regular polling function registration flow charts provided;
Fig. 3 show the according to embodiments of the present invention 3 automatic regular polling function operation flow charts provided;
Fig. 4 show the schematic diagram of the according to embodiments of the present invention 4 reading and writing data management systems provided.
Embodiment
Describe the present invention in detail below with reference to accompanying drawing and in conjunction with the embodiments.It should be noted that not conflicting In the case of, the feature in embodiment and embodiment in the application can be mutually combined.
Fig. 1 show the flow chart of the according to embodiments of the present invention 1 reading and writing data management method provided, including following step Suddenly:
Step 101:Pass through the timing under the SMM i.e. SMM that is registered in being BIOS in basic input output system Poll function, it is the read-write requests that BMC is sent to obtain substrate manager;
Further, system start-up phase, registers the automatic regular polling function under the SMM in the BIOS iAgentFun。
Further, the automatic regular polling function is maintained at the SMM after the BIOS starts to operating system i.e. OS Run under pattern.
Further, the BIOS is sent out by setting universal input/output interface i.e. GPIO output level to the BMC Send notification message;Wherein, automatic regular polling function registration information, automatic regular polling function operation letter are carried in the notification message Breath.
Further, by the flag register selected in the processor be used as the automatic regular polling function with it is described The interface of BMC interactions.
There is provided certain amount the CSR register unrelated with cpu function on current CPU, referred to as flag register ScratchPad, specifies and selects certain several ScratchPad register (iScratchRegister) to be used as automatic regular polling function The interface linked up with BMC.
Further, the BMC is received after the notification message, and read-write requests are sent by flag register.
Wherein, it is PCH by south bridge, specifies the GPIO to be connected with the BMC.
BIOS, which is set, specifies a universal input/output interface (GPIO) on south bridge (PCH), be connected with BMC, work as automatic regular polling When function iAgentFun gets out to receive the read-write requests of BMC transmissions, BIOS sets the output level of the GPIO, is used for Notify whether BMC automatic regular polling function has registered beginning in CPU running backgrounds, BMC is received can after GPIO level change Read-write MSR register is sent by iScratchRegister registers to ask.
Step 102:The read-write requests are converted under the SMM corresponding read write command on processor i.e. CPU;
Step 103:By the read write command, it is MSR to read and write model specific registers in the processor.
Further, the result for reading and writing the MSR is fed back into the flag register;
The BMC obtains the result for reading and writing the MSR from the flag register.
Fig. 2 show the according to embodiments of the present invention 2 automatic regular polling function registration flow charts provided, comprises the following steps:
Step 201:System energization brings into operation;
Step 202:IAgentFun functions under BIOS registration SMM modes, and set specified GPIO to notify BMC;
Step 203:Start-up operation system;
Step 204:During operating system, iAgentFun functions are run in the smm.
Fig. 3 show the according to embodiments of the present invention 3 automatic regular polling function operation flow charts provided, comprises the following steps:
Step 301:IAgentFun functions bring into operation;
Step 302:BMC read-write requests are whether there is in inquiry iScratchRegister, if nothing, continue to inquire about;If so, then Go to step 303;
Step 303:It is converted into corresponding read write command and realizes read-write motion;
Step 304:As a result update to iScratchRegister so that BMC is inquired about.
Fig. 4 show the schematic diagram of the according to embodiments of the present invention 4 reading and writing data management systems provided, including basic input Output system is BIOS, substrate manager i.e. BMC, processor i.e. CPU;The BIOS, the BMC, the CPU are connected with each other;
By the automatic regular polling function under the SMM i.e. SMM that is registered in the BIOS, the BMC hairs are obtained The read-write requests sent;
The read-write requests are converted under the SMM corresponding read write command on the CPU;
By the read write command, it is MSR to read and write model specific registers in the CPU.
Further, unite startup stage, the automatic regular polling function under the SMM is registered in the BIOS;
The BIOS sends notice by setting universal input/output interface i.e. GPIO output level, to the BMC and disappeared Breath;Wherein, automatic regular polling function registration information, automatic regular polling function operation information are carried in the notification message.
Further, it is PCH by south bridge, specifies the GPIO to be connected with the BMC.
Pass through following scheme:By under the SMM i.e. SMM that is registered in being BIOS in basic input output system Automatic regular polling function, obtain substrate manager be BMC send read-write requests;The read-write requests are converted into the SMM Lower processor is corresponding read write command on CPU;By the read write command, model specific registers in the processor are read and write That is MSR, realizes read-write MSR register, obtains the key state of system, controls CPU partial function, and realization has to system Effect management and monitoring.
Pass through following scheme:The flag register selected in the processor as the automatic regular polling function with it is described The interface of BMC interactions, is easy to information exchange.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies Change, equivalent substitution, improvement etc., should be included in the scope of the protection.

Claims (10)

1. a kind of reading and writing data management method, it is characterised in that comprise the following steps:
By the automatic regular polling function under the SMM i.e. SMM that is registered in being BIOS in basic input output system, obtain The read-write requests for taking the i.e. BMC of substrate manager to send;
The read-write requests are converted under the SMM corresponding read write command on processor i.e. CPU;
By the read write command, it is MSR to read and write model specific registers in the processor.
2. reading and writing data management method according to claim 1, it is characterised in that system start-up phase, in the BIOS Automatic regular polling function under the middle registration SMM;
The BIOS is sent a notification message by setting universal input/output interface i.e. GPIO output level to the BMC;Its In, automatic regular polling function registration information, automatic regular polling function operation information are carried in the notification message.
3. reading and writing data management method according to claim 2, it is characterised in that pass through what is selected in the processor The interface that flag register is interacted as the automatic regular polling function with the BMC.
4. reading and writing data management method according to claim 3, it is characterised in that the BMC receives the notification message Afterwards, read-write requests are sent by flag register.
5. reading and writing data management method according to claim 4, it is characterised in that feed back the result for reading and writing the MSR To the flag register;
The BMC obtains the result for reading and writing the MSR from the flag register.
6. reading and writing data management method according to claim 2, it is characterised in that by south bridge be PCH, specify described GPIO is connected with the BMC.
7. reading and writing data management method according to claim 1, it is characterised in that the automatic regular polling function is described BIOS is started to after operating system i.e. OS, is maintained under the SMM mode and is run.
8. a kind of reading and writing data management system, it is characterised in that including basic input output system be BIOS, substrate manager i.e. BMC, processor are CPU;The BIOS, the BMC, the CPU are connected with each other;
By the automatic regular polling function under the SMM i.e. SMM that is registered in the BIOS, obtain what the BMC was sent Read-write requests;
The read-write requests are converted under the SMM corresponding read write command on the CPU;
By the read write command, it is MSR to read and write model specific registers in the CPU.
9. reading and writing data management system according to claim 8, it is characterised in that system start-up phase, in the BIOS Automatic regular polling function under the middle registration SMM;
The BIOS is sent a notification message by setting universal input/output interface i.e. GPIO output level to the BMC;Its In, automatic regular polling function registration information, automatic regular polling function operation information are carried in the notification message.
10. reading and writing data management system according to claim 9, it is characterised in that by south bridge be PCH, specify described GPIO is connected with the BMC.
CN201710344533.5A 2017-05-16 2017-05-16 A kind of reading and writing data management method and system Withdrawn CN107025094A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108090000A (en) * 2018-01-11 2018-05-29 郑州云海信息技术有限公司 A kind of method and system for obtaining CPU register informations

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8386764B2 (en) * 2010-01-18 2013-02-26 Inventec Corporation BIOS architecture
CN103119560A (en) * 2010-09-30 2013-05-22 英特尔公司 Demand based usb proxy for data stores in service processor complex
CN104899109A (en) * 2015-05-06 2015-09-09 深圳市国鑫恒宇科技有限公司 Operating system based CPU temperature obtaining system
CN105183575A (en) * 2015-08-24 2015-12-23 浪潮(北京)电子信息产业有限公司 Processor fault diagnosis method, device and system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8386764B2 (en) * 2010-01-18 2013-02-26 Inventec Corporation BIOS architecture
CN103119560A (en) * 2010-09-30 2013-05-22 英特尔公司 Demand based usb proxy for data stores in service processor complex
CN104899109A (en) * 2015-05-06 2015-09-09 深圳市国鑫恒宇科技有限公司 Operating system based CPU temperature obtaining system
CN105183575A (en) * 2015-08-24 2015-12-23 浪潮(北京)电子信息产业有限公司 Processor fault diagnosis method, device and system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108090000A (en) * 2018-01-11 2018-05-29 郑州云海信息技术有限公司 A kind of method and system for obtaining CPU register informations

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Application publication date: 20170808