CN107017802A - The supervising device and method of a kind of high-voltage solid-state soft starter - Google Patents
The supervising device and method of a kind of high-voltage solid-state soft starter Download PDFInfo
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- CN107017802A CN107017802A CN201710309107.8A CN201710309107A CN107017802A CN 107017802 A CN107017802 A CN 107017802A CN 201710309107 A CN201710309107 A CN 201710309107A CN 107017802 A CN107017802 A CN 107017802A
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P1/00—Arrangements for starting electric motors or dynamo-electric converters
- H02P1/02—Details of starting control
- H02P1/022—Security devices, e.g. correct phase sequencing
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P1/00—Arrangements for starting electric motors or dynamo-electric converters
- H02P1/02—Details of starting control
- H02P1/04—Means for controlling progress of starting sequence in dependence upon time or upon current, speed, or other motor parameter
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Abstract
The invention discloses a kind of supervising device of high-voltage solid-state soft starter and method, wherein device includes：Monitoring module is interrupted, for when target number signal processor enters interrupt response program, generating corresponding down trigger information and being sent to accumulator module；Accumulator module, for presetting an initial decision value, when meeting cumulative condition, the default fixed value that added up on the basis of initial decision value is used as new judgment value；Judge module, for presetting a judgment threshold, when meeting default time conditions, the newest judgment value once obtained is obtained from accumulator module, if the judgment value obtained is not more than judgment threshold, target number signal processor operation irregularity is judged；Control module, for when judge module often completes once to judge, the judgment value in accumulator module to be reset into initial decision value.The technical scheme can monitor the working condition of the target number signal processor of the controller of high-voltage solid-state soft starter according to reasonable and succinct decision logic.
Description
Technical field
The present invention relates to startup of high-voltage motor technical field, and in particular to a kind of supervising device of high-voltage solid-state soft starter
And method.
Background technology
Very big dash current can be produced during big-and-middle-sized high-voltage motor across-the-line starting, generally 4~8 up to rated current
Times, 10 times of rated current are even up to when maximum.On the one hand so big inrush current can make the stator winding of motor
Heating, causes motor to damage；On the other hand power supply grid can be polluted, causes grid voltage sags, influence miscellaneous equipment
Normal operation.Impacted in addition, big-and-middle-sized high-voltage motor across-the-line starting can produce larger starting torque to motor transmission system,
The devices such as the gear and conveyer belt in system can be caused damage.For this reason, it may be necessary to which the starting to motor is controlled by, limits it and rise
Streaming current.
High-voltage solid-state soft starter is used as power device with controllable silicon (SCR, Silicon Controlled Rectifier)
Part, with voltage continuously adjustabe, relative low price and using the advantage such as simple, and with many miscellaneous functions, in height
It is applied widely in pressure asynchronous motor starting control.Usually, have in common high-voltage solid-state soft starter controller
Two digital signal processors (DSP, Digital Signal Processor) and a super large-scale integration may be programmed
Device (such as CPLD, Complex Programmable Logic Device, CPLD, or FPGA,
Field-Programmable Gate Array, field programmable gate array), one of DSP plays monitoring, guarantor in systems
The effect of shield, communication and display etc., another DSP plays a part of to realize control of soft algorithm, and FPGA plays generation IGCT and touched
The effect of signalling, IGCT state reporting information and the communication of system switching amount.But, find some feelings in actual application
DSP can be made the phenomenon of " deadlock " occur under condition.In this case, if system effectively cannot be monitored and resetted, it can make
System is out of control in Soft Start-up Process, causes electric motor starting to fail, or even can burn out IGCT and motor.
The content of the invention
In view of the above problems, it is proposed that the present invention so as to provide one kind overcome above mentioned problem or at least in part solve on
State the supervising device and method of the high-voltage solid-state soft starter of problem.
According to one aspect of the present invention there is provided a kind of supervising device of high-voltage solid-state soft starter, including：Interrupt prison
Control module, accumulator module, judge module, control module；
The interruption monitoring module, the target number signal transacting for the controller in the high-voltage solid-state soft starter
When device enters interrupt response program, generate corresponding down trigger information and be sent to the accumulator module；
The accumulator module, for presetting an initial decision value, when the down trigger information received meets cumulative condition
When, the default fixed value that added up on the basis of initial decision value is used as new judgment value；
Judge module, for presetting a judgment threshold, when meeting default time conditions, is obtained from the accumulator module
The newest judgment value once obtained, if the judgment value obtained is not more than the judgment threshold, judges the target number signal
Processor operation irregularity；
The control module, for when the judge module often completes once to judge, by sentencing in the accumulator module
Disconnected value resets to initial decision value.
Alternatively, the interruption monitoring module, specifically for the target of the controller in the high-voltage solid-state soft starter
During the 2N times entrance interrupt response program of digital signal processor, the first preset value is sent to the accumulator module；In the mesh
When marking digital signal processor the 2N+1 times into interrupt response program, the second preset value is sent to the accumulator module；N is certainly
So count；
The accumulator module, specifically for once being monitored in the data received from the interruption monitoring module with upper from interruption
When the data that module is received are inconsistent, the default fixed value that added up on the basis of initial decision value is used as new judgment value.
Alternatively, described device also includes：Reseting module；
The judge module, is additionally operable to when judging the target number signal processor operation irregularity, is resetted to described
Module sends reset signal；
Reseting module, for when receiving the reset signal that the judge module is sent, by the target number signal
Processor is resetted.
Alternatively, the interruption monitoring module includes multiple monitoring submodules, one target of each monitoring submodule correspondence
Digital signal processor；
The accumulator module includes multiple cumulative submodules, each one monitoring submodule of cumulative submodule correspondence；
The judge module, for being not more than the judgment threshold in the judgment value obtained from any one cumulative submodule
When, send reset signal to reseting module；
The reseting module, for when receiving the reset signal that the judge module is sent, by all target numbers
Signal processor is resetted；
The control module, in the submodule that when often completing once to judge in the judge module, will each add up
Judgment value reset to initial decision value.
Alternatively, the device also includes：
Timer conter, for presetting an initial time value, with default clock frequency on initial time value basis
It is upper cumulative, when cumulative obtained time value reaches preset time value, sent to the judge module and meet preset time condition
Signal, and current time value is reset into initial time value.
According to another aspect of the present invention there is provided a kind of monitoring method of high-voltage solid-state soft starter, including：
When the target number signal processor of the controller of the high-voltage solid-state soft starter enters interrupt response program,
Generate corresponding down trigger information；
A default initial decision value, when the down trigger information of generation meets cumulative condition, on initial decision value basis
The upper default fixed value that adds up is used as new judgment value；
A default judgment threshold, when meeting default time conditions, judges whether the newest judgment value once obtained is big
In the judgment threshold, if being not more than, the target number signal processor operation irregularity is judged；
When often completing once to judge, it will determine that value resets to initial decision value.
Alternatively, the target number signal processor of the controller in the high-voltage solid-state soft starter, which enters, interrupts
During responder, generating corresponding down trigger information includes：
Enter interrupt response the 2N times in the target number signal processor of the controller of the high-voltage solid-state soft starter
During program, using the first preset value as generation down trigger information；Enter for the 2N+1 times in the target number signal processor
When entering interrupt response program, using the second preset value as generation down trigger information；N is natural number；
The cumulative condition is：This down trigger information and last down trigger information are inconsistent.
Alternatively, methods described also includes：
When judging the target number signal processor operation irregularity, reset signal is produced；
The target number signal processor is resetted according to the reset signal.
Alternatively, the target number signal processor has multiple, to each target number signal processor, is carried out
When it enters interrupt response program, generate corresponding down trigger information to judge its whether operation irregularity the step of；
In any one target number signal processor operation irregularity, reset signal is produced, will according to the reset signal
All target number signal processors are resetted；
When often completing once to judge, all judgment values are reset into corresponding initial decision value.
Alternatively, this method also includes：
A default initial time value, is added up with default clock frequency on the basis of the initial time value, when cumulative
To time value reach preset time value when be to meet default time conditions；
Current time value is reset into initial time value.
From the foregoing, technical scheme, passes through the target number of the controller in high-voltage solid-state soft starter
Signal processor generates corresponding down trigger information when entering interrupt response program, if down trigger information meets cumulative bar
Part, then added up on the basis of initial decision value, and the newest judgement once obtained is judged when meeting default time conditions
Whether value is more than default judgment threshold, if less than or equal to default judgment threshold, then illustrate corresponding target number letter
Number processor during this period of time occurs in that exception, and subsequently it can be carried out the processing such as to reset.The technical scheme can basis
The work shape of the target number signal processor of the controller of reasonable and succinct decision logic monitoring high-voltage solid-state soft starter
Condition, when target number signal processor is interfered or program " run and fly " causes its " deadlock ", can know in time.
Described above is only the general introduction of technical solution of the present invention, in order to better understand the technological means of the present invention,
And can be practiced according to the content of specification, and in order to allow above and other objects of the present invention, feature and advantage can
Become apparent, below especially exemplified by the embodiment of the present invention.
Brief description of the drawings
By reading the detailed description of hereafter preferred embodiment, various other advantages and benefit is common for this area
Technical staff will be clear understanding.Accompanying drawing is only used for showing the purpose of preferred embodiment, and is not considered as to the present invention
Limitation.And in whole accompanying drawing, identical part is denoted by the same reference numerals.In the accompanying drawings：
Fig. 1 shows a kind of electrical block diagram of high-voltage solid-state soft starter；
Fig. 2 shows that a kind of structure of the supervising device of high-voltage solid-state soft starter according to an embodiment of the invention is shown
It is intended to；
Fig. 3 shows two CSTR and FPGA in the controller of high-voltage solid-state soft starter according to an embodiment of the invention
The schematic diagram of connection；
Fig. 4 shows that a kind of flow of the monitoring method of high-voltage solid-state soft starter according to an embodiment of the invention is shown
It is intended to；
Fig. 5 shows the schematic flow sheet according to an embodiment of the invention that down trigger information is sent from DSP to FPGA；
Fig. 6 shows the workflow signal of FPGA in high-voltage solid-state soft starter according to an embodiment of the invention
Figure.
Embodiment
The exemplary embodiment of the disclosure is more fully described below with reference to accompanying drawings.Although showing the disclosure in accompanying drawing
Exemplary embodiment, it being understood, however, that may be realized in various forms the disclosure without should be by embodiments set forth here
Limited.On the contrary, these embodiments are provided to facilitate a more thoroughly understanding of the present invention, and can be by the scope of the present disclosure
Complete conveys to those skilled in the art.
Fig. 1 shows a kind of electrical block diagram of high-voltage solid-state soft starter.As shown in figure 1, soft of high-voltage solid-state
Dynamic device includes three-phase valve group, electromagnetism triggers circuit and Transmission Fibers, power supply side contactor, bypass contactor, detecting voltage by three phase
Circuit, three-phase current detection circuit (CT1, CT2, CT3), power supply and signal integrated processing circuit, controller, man-machine interface system
System.Controller can be with two CSTR and super large-scale integration programming device (CPLD or FPGA) for core, according to detecting
Voltage and current, panel button signal or remote control signal and relevant parameter, carry out electric motor starting, shut down and protection control
System.
Technical scheme can apply to the controller of high-voltage solid-state soft starter, more specifically, Ke Yijian
Control the working condition of DSP in controller.
Fig. 2 shows that a kind of structure of the supervising device of high-voltage solid-state soft starter according to an embodiment of the invention is shown
It is intended to, as shown in Fig. 2 the supervising device 200 of high-voltage solid-state soft starter includes：Interrupt monitoring module 210, accumulator module 220,
Judge module 230, control module 240.
Monitoring module 210 is interrupted, the target number signal processor for the controller in high-voltage solid-state soft starter enters
When entering interrupt response program, generate corresponding down trigger information and be sent to accumulator module 220.
Accumulator module 220, for presetting an initial decision value, when the down trigger information received meets cumulative condition
When, the default fixed value that added up on the basis of initial decision value is used as new judgment value.
Judge module 230, for presetting a judgment threshold, when meeting default time conditions, is obtained from accumulator module 220
The newest judgment value once obtained is taken, if the judgment value obtained is not more than judgment threshold, target number signal processor is judged
Operation irregularity.
The target DSP of the controller of high-voltage solid-state soft starter is in course of normal operation, in entering within a period of time
The number of times of disconnected responder is controllable, and cumulative judgment value is actually during this period of time target within a period of time
DSP enters the number of times of interrupt response program.If target DSP during this period of time occurs in that operation irregularity, then namely enter
Enter and fail to resume work after interrupt response program, then cumulative obtained judgment value is necessarily less than can under normal operation
Obtained judgment value, therefore may determine that target DSP operation irregularities.
Control module 240, for when judge module 230 often completes once to judge, by the judgment value in accumulator module 220
Reset to initial decision value.
It can be seen that, the device shown in Fig. 2 passes through the target number signal processor of the controller in high-voltage solid-state soft starter
Corresponding down trigger information is generated during into interrupt response program, if down trigger information meets cumulative condition, first
Added up on the basis of beginning judgment value, judge whether the newest judgment value once obtained is more than when meeting default time conditions
Default judgment threshold, if less than or equal to default judgment threshold, then illustrate that corresponding target number signal processor exists
Exception is occurred in that in this period, subsequently it can be carried out the processing such as to reset.The technical scheme can be according to reasonable and succinct
Decision logic monitoring high-voltage solid-state soft starter controller target number signal processor working condition, work as number of targets
When word signal processor is interfered or program " run and fly " causes its " deadlock ", it can know in time.
In one embodiment of the invention, in said apparatus, monitoring module 210 is interrupted, specifically in high-voltage solid-state
During the 2N times entrance interrupt response program of target number signal processor of the controller of soft starter, sent out to accumulator module 220
Send the first preset value；In the 2N+1 times entrance interrupt response program of target number signal processor, sent to accumulator module 220
Second preset value；N is natural number；Accumulator module 220, specifically for from interrupt monitoring module receive data with it is upper once from
When the data that interruption monitoring module is received are inconsistent, the default fixed value that added up on the basis of initial decision value is used as new judgement
Value.
Interruption monitoring module 210 in above-described embodiment can be realized using corresponding target DSP, accumulator module
220 can be realized using with the target DSP FPGA being connected.Fig. 3 shows that high pressure according to an embodiment of the invention is consolidated
The schematic diagram that two CSTR is connected with FPGA in the controller of state soft starter.As shown in figure 3, DSP1 and DSP2 are that high-voltage solid-state is soft
Two DSP of its normal function are realized in the controller of starter, that is, belong to the present invention DSP to be monitored.In this base
On plinth, by taking DSP1 as an example, it is connected to FPGA address bus, and produces interrupt event at itself, into interrupt response program
When, always choose the specific address bus address1 (companies between the ADDR_BUS and ADDR_BUS1 of DSP1 shown in figure
Connect), and send data (connection between the DATA_BUS and DATA_BUS1 of DSP1 shown in figure) to data/address bus；It is same right
In DSP2, it is also connected to FPGA address bus, and produces interrupt event at itself, into interrupt response program constantly, always
It is to choose specific address bus address2 (connection between the ADDR_BUS and ADDR_BUS2 of DSP2 shown in figure), and
Data (connection between the DATA_BUS and DATA_BUS2 of DSP1 shown in figure) are sent to data/address bus.And FPGA is with very fast
The address bus that is connected with DSP1 of frequency queries, when particular address address1 is selected, read FPGA and DSP1 phases
The data read are assigned to data1 by the data on the data/address bus of connection.At the same time, in FPGA, with faster frequency
The address bus being connected with DSP2 is inquired about, when particular address address2 is selected, reads what FPGA was connected with DSP2
The data read are assigned to data2 by the data on data/address bus.Because FPGA does not include interrupt mechanism, therefore in actual behaviour
In work, can when DSP1 the 1st time enters interrupt response program, when sending the 0, the 2nd time to FPGA and entering interrupt response program, to
When FPGA sends the 1, the 3rd time and enters interrupt response program, 0 is sent to FPGA ... by that analogy, it is so adjacent to send twice
Data will produce rising edge or trailing edge, it is possible to be used as the trigger signal of accumulator module 220.It can also be done for DSP2
It is corresponding to set.Because in the controller of existing high-voltage solid-state soft starter, the DSP generally comprised has two, therefore at this
Target DSP numbers are introduced for 2 situation in example, certainly, when target DSP has one or more, also may be used
To be readily available corresponding embodiment, just do not repeat one by one herein.Especially, when target DSP is multiple,
Multiple monitoring submodules, one target DSP of each monitoring submodule correspondence can be included by interrupting monitoring module 210；Accumulator module
220 can also include multiple cumulative submodules, each one monitoring submodule of cumulative submodule correspondence, that is, correspond to a mesh
Mark DSP.And control module 240, then in the submodule that when often completing once to judge in judge module 230, will each add up
Judgment value reset to initial decision value.Specifically, each monitoring submodule can be realized by the counter in FPGA.
In Fig. 3, FPGA is also attached with DSP1 and DSP2 respectively by RESET pins, that is, in previous embodiment
On the basis of, when judging target DSP operation irregularities, it can be resetted automatically.Therefore in the implementation of the present invention
In example, said apparatus also includes：Reseting module 250 (is equally shown) in fig. 2；Judge module 230, is additionally operable to sentencing
During disconnected target number signal processor operation irregularity, reset signal is sent to reseting module 250；Reseting module 250, for connecing
When receiving the reset signal of the transmission of judge module 230, target number signal processor is resetted.It should be noted that
During an only target DSP, its operation irregularity is judged, then be just sent to reset signal；Have multiple in target DSP
When, if any one target DSP operation irregularities, then because RESET pins are connected with all target DSP, then to all mesh
Mark DSP and send reset signal.
Due to that can reset it in time, it is to avoid high-voltage solid-state soft starter exists when finding target DSP operation irregularities
The harm for continuing to run with and producing under abnormal conditions, enhances the robustness of high-voltage solid-state soft starter.
In one embodiment of the invention, said apparatus also includes：Timer conter, for presetting an initial time
Value, is added up with default clock frequency on the basis of initial time value, when cumulative obtained time value reaches preset time value,
The signal for meeting preset time condition is sent to judge module, and current time value is reset into initial time value.
For example, setting such timer conter on FPGA, added up, set when having reached successively according to specific clock frequency
When fixing time, timer conter is overflowed, and automatic clear can thus be circulated successively.When reaching setting time each time just
It is to meet default time conditions.
Fig. 4 shows that a kind of flow of the monitoring method of high-voltage solid-state soft starter according to an embodiment of the invention is shown
It is intended to, as shown in figure 4, this method includes：
Step S410, enters interrupt response journey in the target number signal processor of the controller of high-voltage solid-state soft starter
During sequence, corresponding down trigger information is generated.
Step S420, presets an initial decision value, when the down trigger information of generation meets cumulative condition, is initially sentencing
The default fixed value that added up on the basis of disconnected value is used as new judgment value.
Step S430, presets a judgment threshold, when meeting default time conditions, judges the newest judgement once obtained
Whether value is more than judgment threshold, if being not more than, judges target number signal processor operation irregularity.
Step S440, when often completing once to judge, will determine that value resets to initial decision value.
It can be seen that, the method shown in Fig. 4 passes through the target number signal processor of the controller in high-voltage solid-state soft starter
Corresponding down trigger information is generated during into interrupt response program, if down trigger information meets cumulative condition, first
Added up on the basis of beginning judgment value, judge whether the newest judgment value once obtained is more than when meeting default time conditions
Default judgment threshold, if less than or equal to default judgment threshold, then illustrate that corresponding target number signal processor exists
Exception is occurred in that in this period, subsequently it can be carried out the processing such as to reset.The technical scheme can be according to reasonable and succinct
Decision logic monitoring high-voltage solid-state soft starter controller target number signal processor working condition, work as number of targets
When word signal processor is interfered or program " run and fly " causes its " deadlock ", it can know in time.
In one embodiment of the invention, in the above method, in the number of targets of the controller of high-voltage solid-state soft starter
When word signal processor enters interrupt response program, generating corresponding down trigger information includes：In high-voltage solid-state soft starter
The target number signal processor the 2N times of controller when entering interrupt response program, using the first preset value as in generation
Disconnected triggering information；In the 2N+1 times entrance interrupt response program of target number signal processor, the second preset value is regard as life
Into down trigger information；N is natural number；Cumulative condition is：This down trigger information is believed with last down trigger
Breath is inconsistent.
Shown in similar previous one embodiment, can be with the target DSP in the controller of high-voltage solid-state soft starter
With implement this method based on FPGA.Fig. 5 show it is according to an embodiment of the invention from DSP to FPGA send down trigger letter
The schematic flow sheet of breath.If as shown in figure 5, do not produce interrupt event does not generate down trigger information so naturally；If produced
Interrupt event, then judgement is which time enters interrupt response program, if even-times then sends out 0, if odd-times is then
Hair 1.The down trigger information specifically sent can with unrestricted choice, as long as ensuring that adjacent down trigger information twice is inconsistent,
Rising edge can be produced or trailing edge ensures that FPGA triggerings are cumulative.
In one embodiment of the invention, the above method also includes：Judging that the work of target number signal processor is different
Chang Shi, produces reset signal；Target number signal processor is resetted according to reset signal.
Due to that can reset it in time, it is to avoid high-voltage solid-state soft starter exists when finding target DSP operation irregularities
The harm for continuing to run with and producing under abnormal conditions, enhances the robustness of high-voltage solid-state soft starter.
In one embodiment of the invention, in the above method, target number signal processor has multiple, to each target
Digital signal processor, is carried out when it enters interrupt response program, generates corresponding down trigger information to judging that it is
The step of no operation irregularity；In any one target number signal processor operation irregularity, reset signal is produced, is believed according to resetting
Number all target number signal processors are resetted；When often completing once to judge, all judgment values are reset into correspondence
Initial decision value.
Because in the controller of existing high-voltage solid-state soft starter, the DSP generally comprised has two, therefore in above-mentioned example
Target DSP numbers are introduced for 2 situation in son, certainly, when target DSP has one or more, also may be used
To be readily available corresponding embodiment, just do not repeat one by one herein.
In one embodiment of the invention, the above method also includes：A default initial time value, with default clock frequency
Rate adds up on the basis of initial time value, is to meet the default time when cumulative obtained time value reaches preset time value
Condition；Current time value is reset into initial time value.
Fig. 6 shows the workflow signal of FPGA in high-voltage solid-state soft starter according to an embodiment of the invention
Figure.As shown in fig. 6, FPGA first determines whether that timer conter (realizes a default initial time value, with default clock frequency first
Add up, overflowed and automatic clear when cumulative obtained time value reaches preset time value on the basis of beginning time value) whether overflow,
If not having, then illustrate also to be not reaching to default time conditions, judge target DSP send data whether occur saltus step (on
Rise edge or trailing edge), if talented make monitor counter execution corresponding with its target DSP cumulative.When judging timer counter
Device overflows, that is, when meeting default time conditions, the newest judgment value that once obtains for judging in monitor counter is
No to be more than default judgment threshold, if will then reset mark Reset is entered as 0, being otherwise entered as 1, (0 is multiple corresponding to not sending
Position signal.1 correspond to send reset signal).Whether all finally judge whether all reset mark Reset1, Reset2 ...
For 0 (each mark that resets corresponds to a target DSP), if it is not, explanation has target DSP operation irregularities, then FPGA is to institute
There is target DSP to send reset signal.
Above method embodiment is due to can be using the target DSP and FPGA in the controller of high-voltage solid-state soft starter as base
Plinth is implemented, and has described corresponding embodiment in aforementioned means embodiment in detail, does not just repeat herein.
In summary, technical scheme, is believed by the target number of the controller in high-voltage solid-state soft starter
Number processor generates corresponding down trigger information when entering interrupt response program, if down trigger information meets cumulative bar
Part, then added up on the basis of initial decision value, and the newest judgement once obtained is judged when meeting default time conditions
Whether value is more than default judgment threshold, if less than or equal to default judgment threshold, then illustrate corresponding target number letter
Number processor during this period of time occurs in that exception, and subsequently it can be carried out the processing such as to reset.The technical scheme can basis
The work shape of the target number signal processor of the controller of reasonable and succinct decision logic monitoring high-voltage solid-state soft starter
Condition, when target number signal processor is interfered or program " run and fly " causes its " deadlock ", can know in time, and
When finding target DSP operation irregularities, reset it in time, it is to avoid high-voltage solid-state soft starter continues fortune in abnormal cases
The harm gone and produced, enhances the robustness of high-voltage solid-state soft starter.
It should be noted that：
Algorithm and display be not inherently related to any certain computer, virtual bench or miscellaneous equipment provided herein.
Various fexible units can also be used together with based on teaching in this.As described above, construct required by this kind of device
Structure be obvious.In addition, the present invention is not also directed to any certain programmed language.It is understood that, it is possible to use it is various
Programming language realizes the content of invention described herein, and the description done above to language-specific is to disclose this hair
Bright preferred forms.
In the specification that this place is provided, numerous specific details are set forth.It is to be appreciated, however, that the implementation of the present invention
Example can be put into practice in the case of these no details.In some instances, known method, structure is not been shown in detail
And technology, so as not to obscure the understanding of this description.
Similarly, it will be appreciated that in order to simplify the disclosure and help to understand one or more of each inventive aspect, exist
Above in the description of the exemplary embodiment of the present invention, each feature of the invention is grouped together into single implementation sometimes
In example, figure or descriptions thereof.However, the method for the disclosure should be construed to reflect following intention：It is i.e. required to protect
The application claims of shield features more more than the feature being expressly recited in each claim.More precisely, such as following
Claims reflect as, inventive aspect is all features less than single embodiment disclosed above.Therefore,
Thus the claims for following embodiment are expressly incorporated in the embodiment, wherein each claim is in itself
All as the separate embodiments of the present invention.
Those skilled in the art, which are appreciated that, to be carried out adaptively to the module in the equipment in embodiment
Change and they are arranged in one or more equipment different from the embodiment.Can be the module or list in embodiment
Member or component be combined into a module or unit or component, and can be divided into addition multiple submodule or subelement or
Sub-component.In addition at least some in such feature and/or process or unit exclude each other, it can use any
Combination is disclosed to all features disclosed in this specification (including adjoint claim, summary and accompanying drawing) and so to appoint
Where all processes or unit of method or equipment are combined.Unless expressly stated otherwise, this specification (including adjoint power
Profit is required, summary and accompanying drawing) disclosed in each feature can or similar purpose identical, equivalent by offer alternative features come generation
Replace.
Although in addition, it will be appreciated by those of skill in the art that some embodiments described herein include other embodiments
In included some features rather than further feature, but the combination of the feature of be the same as Example does not mean in of the invention
Within the scope of and form different embodiments.For example, in the following claims, times of embodiment claimed
One of meaning mode can be used in any combination.
The present invention all parts embodiment can be realized with hardware, or with one or more processor run
Software module realize, or realized with combinations thereof.It will be understood by those of skill in the art that can use in practice
Microprocessor or digital signal processor (DSP) realize the monitoring of high-voltage solid-state soft starter according to embodiments of the present invention
The some or all functions of some or all parts in device.The present invention is also implemented as being used to perform being retouched here
The some or all equipment or program of device (for example, computer program and computer program product) for the method stated.
Such program for realizing the present invention can be stored on a computer-readable medium, or can have one or more signal
Form.Such signal can be downloaded from internet website and obtained, either on carrier signal provide or with it is any its
He provides form.
It should be noted that the present invention will be described rather than limits the invention for above-described embodiment, and ability
Field technique personnel can design alternative embodiment without departing from the scope of the appended claims.In the claims,
Any reference symbol between bracket should not be configured to limitations on claims.Word "comprising" is not excluded the presence of not
Element or step listed in the claims.Word "a" or "an" before element does not exclude the presence of multiple such
Element.The present invention can be by means of including the hardware of some different elements and coming real by means of properly programmed computer
It is existing.In if the unit claim of equipment for drying is listed, several in these devices can be by same hardware branch
To embody.The use of word first, second, and third does not indicate that any order.These words can be explained and run after fame
Claim.
Claims (10)
1. a kind of supervising device of high-voltage solid-state soft starter, it is characterised in that the device includes：Interrupt monitoring module, add up
Module, judge module, control module；
The interruption monitoring module, the target number signal processor for the controller in the high-voltage solid-state soft starter enters
When entering interrupt response program, generate corresponding down trigger information and be sent to the accumulator module；
The accumulator module, for presetting an initial decision value, when the down trigger information received meets cumulative condition,
The default fixed value that added up on the basis of initial decision value is used as new judgment value；
Judge module, for presetting a judgment threshold, when meeting default time conditions, obtains newest from the accumulator module
The judgment value once obtained, if the judgment value obtained is not more than the judgment threshold, judges the target number signal transacting
Device operation irregularity；
The control module, for when the judge module often completes once to judge, by the judgment value in the accumulator module
Reset to initial decision value.
2. device as claimed in claim 1, it is characterised in that
The interruption monitoring module, specifically for the target number signal transacting of the controller in the high-voltage solid-state soft starter
During the 2N times entrance interrupt response program of device, the first preset value is sent to the accumulator module；At the target number signal
When managing device the 2N+1 times into interrupt response program, the second preset value is sent to the accumulator module；N is natural number；
The accumulator module, specifically for from it is described interruption monitoring module receive data with it is upper once from interrupt monitoring module
When the data of reception are inconsistent, the default fixed value that added up on the basis of initial decision value is used as new judgment value.
3. device as claimed in claim 1, it is characterised in that described device also includes：Reseting module；
The judge module, is additionally operable to when judging the target number signal processor operation irregularity, to the reseting module
Send reset signal；
Reseting module, for when receiving the reset signal that the judge module is sent, by the target number signal transacting
Device is resetted.
4. device as claimed in claim 3, it is characterised in that the interruption monitoring module includes multiple monitoring submodules, often
One target number signal processor of individual monitoring submodule correspondence；
The accumulator module includes multiple cumulative submodules, each one monitoring submodule of cumulative submodule correspondence；
The judge module, during for being not more than the judgment threshold in the judgment value obtained from any one cumulative submodule, to
Reseting module sends reset signal；
The reseting module, for when receiving the reset signal that the judge module is sent, by all target number signals
Processor is resetted；
The control module, for when often completing once to judge in the judge module, by sentencing in each cumulative submodule
Disconnected value resets to initial decision value.
5. the device as any one of claim 1-4, wherein, the device also includes：
Timer conter, for presetting an initial time value, is tired out with default clock frequency on the basis of the initial time value
Plus, when cumulative obtained time value reaches preset time value, the letter for meeting preset time condition is sent to the judge module
Number, and current time value is reset into initial time value.
6. a kind of monitoring method of high-voltage solid-state soft starter, it is characterised in that this method includes：
When the target number signal processor of the controller of the high-voltage solid-state soft starter enters interrupt response program, generation
Corresponding down trigger information；
A default initial decision value, when the down trigger information of generation meets cumulative condition, tires out on the basis of initial decision value
Plus default fixed value is used as new judgment value；
A default judgment threshold, when meeting default time conditions, judges whether the newest judgment value once obtained is more than institute
Judgment threshold is stated, if being not more than, the target number signal processor operation irregularity is judged；
When often completing once to judge, it will determine that value resets to initial decision value.
7. method as claimed in claim 6, it is characterised in that the mesh of the controller in the high-voltage solid-state soft starter
When marking digital signal processor into interrupt response program, generating corresponding down trigger information includes：
In the 2N times entrance interrupt response program of target number signal processor of the controller of the high-voltage solid-state soft starter
When, using the first preset value as generation down trigger information；In the 2N+1 times entrance of target number signal processor
During disconnected responder, using the second preset value as generation down trigger information；N is natural number；
The cumulative condition is：This down trigger information and last down trigger information are inconsistent.
8. method as claimed in claim 6, it is characterised in that methods described also includes：
When judging the target number signal processor operation irregularity, reset signal is produced；
The target number signal processor is resetted according to the reset signal.
9. method as claimed in claim 8, it is characterised in that the target number signal processor has multiple, to each mesh
Digital signal processor is marked, is carried out when it enters interrupt response program, corresponding down trigger information is generated to judging it
Whether operation irregularity the step of；
In any one target number signal processor operation irregularity, reset signal is produced, will be all according to the reset signal
Target number signal processor is resetted；
When often completing once to judge, all judgment values are reset into corresponding initial decision value.
10. the method as any one of claim 6-9, wherein, this method also includes：
A default initial time value, added up with default clock frequency on the basis of the initial time value, is obtained when cumulative
Time value is to meet default time conditions when reaching preset time value；
Current time value is reset into initial time value.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710309107.8A CN107017802A (en) | 2017-05-04 | 2017-05-04 | The supervising device and method of a kind of high-voltage solid-state soft starter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710309107.8A CN107017802A (en) | 2017-05-04 | 2017-05-04 | The supervising device and method of a kind of high-voltage solid-state soft starter |
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| CN107017802A true CN107017802A (en) | 2017-08-04 |
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| CN201710309107.8A Pending CN107017802A (en) | 2017-05-04 | 2017-05-04 | The supervising device and method of a kind of high-voltage solid-state soft starter |
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