CN107015942A - The method and device that a kind of multi-core CPU is given out a contract for a project - Google Patents
The method and device that a kind of multi-core CPU is given out a contract for a project Download PDFInfo
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- CN107015942A CN107015942A CN201710179363.XA CN201710179363A CN107015942A CN 107015942 A CN107015942 A CN 107015942A CN 201710179363 A CN201710179363 A CN 201710179363A CN 107015942 A CN107015942 A CN 107015942A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
Abstract
The application provides the method and device that a kind of multi-core CPU is given out a contract for a project, and applied to the network equipment based on SMP architecture, methods described includes：For the unique descending inner passage of each CPU static allocations of multi-core CPU；When receiving the message sent on the forwarding chip, the message characteristic of the message is extracted；It is message distribution target CPU based on the message characteristic extracted, and send the message to the target CPU, to be handled by the target CPU the message, and result is returned to the forwarding chip by the descending inner passage distributed for the target CPU after processing is completed.The embodiment of the present application is solved in correlation technique, and CPU returns to result according to multiple descending inner passages to forwarding chip, and the processing delay of the interface of multiple descending inner passages is different, the problem of causing packet out-ordering.
Description
Technical field
The application is related to communication technical field, the method and device that more particularly to a kind of multi-core CPU is given out a contract for a project.
Background technology
The high property of the network equipment based on SMP (Symmetrical Multi-Processing, symmetric multi-processors) framework
Multiple inner passages can be had between multi-core CPU and forwarding chip.Forwarding chip is received after message, based on default algorithm pair
The message characteristic of message is calculated, and selects inner passage according to result of calculation, is transferred data to using the inner passage
CPU.And CPU transmit downlink data to forwarding chip when, often using simple, practical shunting mode.
In the related art, the multi-core CPU of the network equipment can be by all descending inner passages between forwarding chip
Interface is recorded as a chained list, when sending message, selects the interface in chained list to give out a contract for a project one by one so that descending inner passage is balanced
Ground is used.
However, for the data transfer that message sequence requires strict, CPU balancedly selects several descending inside to lead to
, may be different due to the processing delay of the interface of each descending inner passage when road is given out a contract for a project, cause the interface of each descending inner passage
The speed that message is sent has differences, the report that the message sequence that CPU is sent out is sent out with the interface by each inner passage
Literary order is different, and then causes packet out-ordering.
The content of the invention
In view of this, the application provides the method and device that a kind of multi-core CPU is given out a contract for a project, and may be led to solve correlation technique
The problem of causing packet out-ordering.
Specifically, the application is achieved by the following technical solution：
A kind of method that multi-core CPU is given out a contract for a project, applied to the network equipment based on SMP architecture, the network equipment includes many
, there is a plurality of descending inner passage between the multi-core CPU and the forwarding chip in core CPU and forwarding chip, including：
For the unique descending inner passage of each CPU static allocations；
When receiving the message sent on the forwarding chip, the message characteristic of the message is extracted；
It is that the message distributes target CPU based on the message characteristic extracted, and the message is sent to the mesh
CPU is marked, to be handled by the target CPU the message, and after processing is completed by under target CPU distribution
Row inner passage returns to result to the forwarding chip.
In the method that the multi-core CPU is given out a contract for a project, described is the unique descending inner passage of each CPU static allocations, including：
When the network equipment starts, by the descending inner passage between the multi-core CPU and the forwarding chip by
It is individual to distribute to each CPU；If the quantity of descending inner passage is less than CPU quantity, when descending inner passage is all assigned
Afterwards, the descending inner passage distributed is distributed to remaining CPU one by one again.
In the method that the multi-core CPU is given out a contract for a project, each CPU of the multi-core CPU maximum processing flow is different, described many
The bandwidth of each descending inner passage between core CPU and the forwarding chip is different；
Described is the unique descending inner passage of each CPU static allocations, including：
When the network equipment starts, the maximum processing flow of each CPU based on the multi-core CPU, respectively each CPU
Distribution and the descending inner passage of its maximum processing flows match；If the quantity of descending inner passage is less than CPU quantity,
After descending inner passage is all assigned, the descending inner passage distributed is distributed to remaining CPU again.
It is described to be distributed based on the message characteristic extracted for the message in the method that the multi-core CPU is given out a contract for a project
Target CPU, including：
Hash calculation is carried out to the message characteristic and obtains centrifugal pump；
It is the message distribution target CPU based on the centrifugal pump.
In the method that the multi-core CPU is given out a contract for a project, the message includes the message of real time business.
The device that a kind of multi-core CPU is given out a contract for a project, applied to the network equipment based on SMP architecture, the network equipment includes many
, there is a plurality of descending inner passage between the multi-core CPU and the forwarding chip in core CPU and forwarding chip, including：
Allocation unit, for for the unique descending inner passage of each CPU static allocations；
Receiving unit, for receiving during the message sent on the forwarding chip, extracts the message characteristic of the message；
Selecting unit, for being that the message distributes target CPU based on the message characteristic extracted, and by the message
Send to the target CPU, to be handled by the target CPU the message, and in the completed by for the target CPU
The descending inner passage of distribution returns to result to the forwarding chip.
In the device that the multi-core CPU is given out a contract for a project, the allocation unit is further used for：
When the network equipment starts, by the descending inner passage between the multi-core CPU and the forwarding chip by
It is individual to distribute to each CPU；If the quantity of descending inner passage is less than CPU quantity, when descending inner passage is all assigned
Afterwards, the descending inner passage distributed is distributed to remaining CPU one by one again.
In the device that the multi-core CPU is given out a contract for a project, each CPU of the multi-core CPU maximum processing flow is different, described many
The bandwidth of each descending inner passage between core CPU and the forwarding chip is different；The allocation unit, is further used for：
When the network equipment starts, the maximum processing flow of each CPU based on the multi-core CPU, respectively each CPU
Distribution and the descending inner passage of its maximum processing flows match；If the quantity of descending inner passage is less than CPU quantity,
After descending inner passage is all assigned, the descending inner passage distributed is distributed to remaining CPU again.
In the device that the multi-core CPU is given out a contract for a project, the selecting unit is further used for：
Hash calculation is carried out to the message characteristic and obtains centrifugal pump；
It is the message distribution target CPU based on the centrifugal pump.
In the device that the multi-core CPU is given out a contract for a project, the message includes the message of real time business.
In the embodiment of the present application, the forwarding core of the multi-core CPU of the network equipment based on SMP architecture and the network equipment
There is a plurality of descending inner passage between piece, the network equipment is the unique descending inner passage of each CPU static allocations；Receive
During the message sent on to the forwarding chip, the message characteristic of the message is extracted, and be based on the message characteristic extracted
The message distributes target CPU, and the message is sent to the target CPU, with by the target CPU to the message progress
Reason, and tied after processing is completed by the descending inner passage distributed for the target CPU to forwarding chip return processing
Really.
Because the message of identical message characteristic is transferred to same CPU processing, and each CPU be statically assigned it is unique it is descending in
Portion's passage, so each CPU is when finishing return result to Message processing, can select corresponding unique descending inner passage will
Result is sent to forwarding chip.Therefore, the message sequence that each CPU is sent out will not connecing due to different descending inner passages
The processing delay of mouth is different and changes, so that the problem of solving packet out-ordering.
Brief description of the drawings
Fig. 1 is a kind of Organization Chart of network equipment based on SMP architecture shown in the application；
Fig. 2 is the flow chart for the method that a kind of multi-core CPU shown in the application is given out a contract for a project；
Fig. 3 is the embodiment block diagram for the device that a kind of multi-core CPU shown in the application is given out a contract for a project；
Fig. 4 is the hardware structure diagram for the device that a kind of multi-core CPU shown in the application is given out a contract for a project.
Embodiment
In order that those skilled in the art more fully understand the technical scheme in the embodiment of the present invention, and make of the invention real
Applying the above-mentioned purpose of example, feature and advantage can be more obvious understandable, below in conjunction with the accompanying drawings to prior art and the present invention
Technical scheme in embodiment is described in further detail.
Referring to Fig. 1, Fig. 1 is a kind of Organization Chart of network equipment based on SMP architecture shown in the application.
As shown in figure 1, the network equipment based on SMP architecture generally includes multi-core CPU and forwarding chip, multi-core CPU is with turning
There is a plurality of inner passage between hair chip.Wherein, the quantity for the CPU that above-mentioned multi-core CPU is included, with above-mentioned multi-core CPU with
The quantity of inner passage between forwarding chip, can be with identical, can also be different.
In the related art, after the forwarding chip of the above-mentioned network equipment receives message, it usually needs the message is led to
Cross that inner passage is up to be sent to corresponding CPU and be further processed.Wherein, forwarding chip is by the message received
When sending CPU, the message characteristic of the message can be generally extracted, and the message characteristic of message is calculated according to default algorithm
A value is obtained, the value is then based on and up inner passage is distributed for the message, being then based on the inner passage should
Message up sending is further processed to CPU.
For example, based on trunking function, forwarding chip carries out Hash calculation according to the message characteristic of message and obtains one
Centrifugal pump, then selects different inner passages according to different centrifugal pumps.
Multi-core CPU is received after the message sent on forwarding chip, and the message is handled, after processing is completed, to turn
Send out chip downlink transfer message.Multi-core CPU is when to forwarding chip downlink transfer message, generally using more simple, practicality
Mode selects descending inner passage, to mitigate the loss to performance.Wherein, descending inner passage refers to multi-core CPU and chosen and is used for
To the inner passage of forwarding chip downlink transfer message.
In the related art, the network equipment on startup, can be by all inner passages between multi-core CPU and forwarding chip
Interface be recorded as a chained list.Each CPU of multi-core CPU can be selected in chained list one by one when sending message to forwarding chip
The interface of descending inner passage so that the interface of all descending inner passages is recycled.
For example：Assuming that there are 2 descending inner passages between multi-core CPU and forwarding chip, any CPU of multi-core CPU exists
When sending the 1st message, the interface of the 1st descending inner passage is selected；When sending the 2nd message, selection the 2nd is descending interior
The interface of portion's passage；When sending the 3rd message, the interface of the 1st descending inner passage is selected；When sending the 4th message,
Select the interface of the 2nd descending inner passage.
By above-mentioned measure, multi-core CPU balancedly can send message using all descending inner passages to forwarding chip,
Take full advantage of the data bandwidth of each descending inner passage.
However, the interface of each descending inner passage handle message when probably due to many reasons cause processing delay not
Together, so that the interface of each descending inner passage has differences in the speed for sending message.Same stream (message characteristic phase
Message together) can be transferred to same CPU processing, and the CPU selects each descending successively in order after processing is completed, by result
The interface of inner passage is sent.Because the processing delay of the interface of each descending inner passage is different, each descending inner passage connects
The order for the result that mouth is finally sent is different from the order that CPU is sent, and this may result in packet out-ordering.
For real time business, in the event of packet out-ordering, then the realization of the business can be badly influenced.For example：It is right
In the real time business such as video conference or videoconference, packet out-ordering can cause video or call interim card.
It can be seen that, in the related art, due to the place of the interface of each descending inner passage between multi-core CPU and forwarding chip
Manage time delay different, multi-core CPU may cause the interface of each descending inner passage to send when sending message to forwarding chip is descending
The order of message is different from the order that CPU sends message, causes packet out-ordering.
To solve the above problems, in the embodiment of the present application, each CPU of multi-core CPU be statically assigned it is unique it is descending in
Portion's passage.Each CPU of multi-core CPU is when to forwarding chip downlink transfer message, unique descending inside of the selection corresponding to the CPU
Passage sends message, therefore will not cause packet out-ordering because of the processing delay difference of the interface of a plurality of descending inner passage.
It is the flow chart for the method that a kind of multi-core CPU shown in the application is given out a contract for a project referring to Fig. 2, this method is applied to be based on
The network equipment of SMP architecture, the network equipment includes multi-core CPU and forwarding chip, the multi-core CPU and the forwarding chip
Between there is a plurality of descending inner passage；It the described method comprises the following steps：
Step 201：For the unique descending inner passage of each CPU static allocations.
Step 202：When receiving the message sent on the forwarding chip, the message characteristic of the message is extracted.
Step 203：It is that the message distributes target CPU based on the message characteristic extracted, and the message is sent
To the target CPU, to be handled by the target CPU the message, and after processing is completed by for the target CPU
The descending inner passage of distribution returns to result to the forwarding chip.
In the embodiment of the present application, the network equipment based on SMP architecture is when system starts, and the primary CPU of multi-core CPU can
Think the unique descending inner passage of each CPU static allocations of multi-core CPU, with by each CPU it is follow-up according to it is corresponding it is unique under
Row inner passage is to forwarding chip downlink transfer message.
Wherein, above-mentioned primary CPU includes the preassigned CPU for being used to focus on the business of multi-core CPU, in the application
In embodiment, primary CPU can be each descending inner passage of CPU static allocations of multi-core CPU, and, it is same by what is received
The message of bar stream transfers to same CPU processing；Primary CPU itself can also participate in handling the message received.As shown in figure 1, CPU
1 can be pre-designated to primary CPU.
In a kind of embodiment shown, if each CPU of multi-core CPU maximum processing flow is identical and each descending
The bandwidth of inner passage is identical, in this case, and above-mentioned primary CPU distributes any descending inside to each CPU of multi-core CPU and led to
What road was just as.Descending inner passage can be distributed to each CPU one by one by above-mentioned primary CPU., can be by still by taking Fig. 1 as an example
CPU 1 is distributed in inner passage 1, and inner passage 2 is distributed into CPU 2, leads to until each CPU is owned by corresponding descending inside
Road., can after descending inner passage is all assigned because the quantity of descending inner passage may be different from CPU quantity
So that the descending inner passage distributed to be distributed to remaining CPU one by one again.
For example：N is that 8, m is 5 in Fig. 1, after inner passage 1 to inner passage 5 is respectively allocated to CPU 1 to CPU 5,
CPU 6 is distributed into inner passage 1 again again, CPU 7 is distributed into inner passage 2, CPU 8 is distributed into inner passage 3.
In a kind of embodiment shown, if each CPU of multi-core CPU maximum processing flow is different, and it is each under
The bandwidth of row inner passage is different.In such a case, it is possible to which the maximum processing flow of each CPU based on multi-core CPU, is respectively
Each CPU distribution and the descending inner passage of its maximum processing flows match.Because the quantity of descending inner passage may be with CPU
Quantity it is different, after descending inner passage, which is all allocated, to be finished, can again by the descending inner passage distributed one by one
Distribute to remaining CPU.
Still by taking Fig. 1 as an example：N is that 8, m is 5 in figure.CPU 1, CPU 2 and CPU 3 maximum processing flow are 7MB/s, and
CPU 4, CPU 5 and CPU 6 maximum processing flow are that 9MB/s, CPU 7 and CPU 8 maximum processing flow are 10MB/s.It is interior
Portion's passage 1 and a width of 11MB/s of the band of inner passage 2, a width of 8MB/s of the band of inner passage 3 and inner passage 4, inner passage 5
The a width of 9MB/s of band.Inner passage 3 can be distributed to CPU 1 by above-mentioned primary CPU, and inner passage 4 is distributed into CPU 2, will
CPU 3 is distributed in inner passage 5, and inner passage 1 is distributed into CPU 4, and inner passage 2 is distributed into CPU 5, now, owns
Inner passage be all allocated once；CPU 6 can be distributed into inner passage 5 again, inner passage 1 is distributed to
CPU 7, CPU 8 is distributed to by inner passage 2.
After being assigned, above-mentioned primary CPU can set up a descending inner passage allocation table；The descending inner passage
Allocation table identifies the mapping relations with the interface of descending inner passage comprising CPU.Follow-up each CPU can be descending interior by searching this
Portion's channel allocation table determines corresponding descending inner passage.
By above-mentioned measure, the primary CPU of multi-core CPU is not less than for the bandwidth of each CPU descending inner passages distributed
Corresponding CPU maximum processing flow so that the bandwidth of each descending inner passage disclosure satisfy that corresponding CPU disposal ability.
Each CPU of multi-core CPU is statically assigned behind unique inner passage, each CPU can based on it is corresponding it is unique under
Row inner passage sends message to forwarding chip.
In the embodiment of the present application, forwarding chip is received from network after the message of real time business, can be based on default
Algorithm (for example：Hash algorithm) calculate the message characteristic of the real time business message, obtain centrifugal pump, then by it is different from
The different inner passage of value selection is dissipated, by the up transmission of the message of the real time business to multi-core CPU.
Multi-core CPU is received after the message of the real time business, and the primary CPU of multi-core CPU can extract the message of the message
Feature, and according to the message characteristic, target CPU is distributed for the message of the real time business, and the message of the real time business is sent
To target CPU.In addition, as a kind of embodiment that can be realized, extracting the message characteristic of message and dividing for the message
Work with target CPU can also be completed by NAE (Network Acceleration Engine, network acceleration engine).
In a kind of embodiment shown, above-mentioned primary CPU or NAE, can after the message characteristic of the message is extracted
To carry out Hash calculation to the message characteristic, centrifugal pump is obtained, the centrifugal pump is then based on, for the message point of the real time business
With target CPU.
Wherein, above-mentioned message characteristic can include the five-tuple of the message of real time business；Due to being passed in real network data
In defeated, the five-tuple of message is hash, is shunted according to five-tuple, and each CPU of multi-core CPU can be enable balancedly to handle and turned
The message sent on hair chip.By above-mentioned measure, the message of same stream (five-tuple is identical) is handled by same CPU all the time,
Ensure that when the message of same stream is handled by CPU be not in out of order.
In the embodiment of the present application, when above-mentioned target CPU is completed to the Message processing of above-mentioned real time business and generates processing
As a result after, corresponding descending inner passage can be searched in above-mentioned inner passage allocation table.Wherein, above-mentioned result according to
Practical business handled by the network equipment, can include response message or service message, and the application is not particularly limited to this.
After interfaces of the above-mentioned target CPU according to the CPU identifier lookups of itself to corresponding descending inner passage, it can select corresponding
The interface of descending inner passage sends result to forwarding chip.
Because above-mentioned target CPU selects the business report of the above-mentioned real time business of unique corresponding descending inner passage transmission all the time
The order phase for the service message that text, the order for the service message that above-mentioned target CPU is sent and the interface of descending inner passage are sent
Together, will not be because selecting a plurality of descending inner passage, and the processing delay of the interface of a plurality of descending inner passage is different, causes message
It is out of order.
In summary, in the embodiment of the present application, the primary CPU of multi-core CPU can for each CPU static allocations it is unique under
Row inner passage, when multi-core CPU receives the message sent on forwarding chip, the primary CPU of multi-core CPU can extract the message
Message characteristic, and be that the message distributes target CPU based on the message characteristic extracted, and the message will be sent to target
CPU；, can be by result from corresponding to the target after target CPU is completed to the Message processing and generates result
CPU descending inner passage is sent to forwarding chip.
Because each CPU of multi-core CPU is statically assigned unique descending inner passage, each CPU sends message extremely descending
During forwarding chip, the unique corresponding descending inner passage of selection.Therefore, it is to avoid because selecting a plurality of descending inner passage, it is many
The processing delay of the interface of the descending inner passage of bar is different so that the order for the message that CPU is sent and a plurality of descending inner passage
The order of message that sends of interface it is different, the problem of causing packet out-ordering.
Embodiment with the method that the application multi-core CPU is given out a contract for a project is corresponding, and present invention also provides for performing above-mentioned side
The embodiment of the device of method embodiment.
It is the embodiment block diagram for the device that a kind of multi-core CPU shown in the application is given out a contract for a project referring to Fig. 3：
As shown in figure 3, the device 30 that the multi-core CPU is given out a contract for a project includes：
Allocation unit 310, for for the unique descending inner passage of each CPU static allocations.
Receiving unit 320, for receiving during the message sent on the forwarding chip, extracts the message characteristic of the message.
Selecting unit 330, for being that the message distributes target CPU based on the message characteristic extracted, and should
Message is sent to the target CPU, to be handled by the target CPU the message, and in the completed by for the mesh
The descending inner passage for marking CPU distribution returns to result to the forwarding chip.
In this example, the allocation unit 310, is further used for：
When the network equipment starts, by the descending inner passage between the multi-core CPU and the forwarding chip by
It is individual to distribute to each CPU；If the quantity of descending inner passage is less than CPU quantity, when descending inner passage is all assigned
Afterwards, the descending inner passage distributed is distributed to remaining CPU one by one again.
In this example, each CPU of the multi-core CPU maximum processing flow is different, the multi-core CPU and the forwarding core
The bandwidth of each descending inner passage between piece is different；The allocation unit 310, is further used for：
When the network equipment starts, the maximum processing flow of each CPU based on the multi-core CPU, respectively each CPU
Distribution and the descending inner passage of its maximum processing flows match；If the quantity of descending inner passage is less than CPU quantity,
After descending inner passage is all assigned, the descending inner passage distributed is distributed to remaining CPU again.
In this example, the selecting unit 330, is further used for：
Hash calculation is carried out to the message characteristic and obtains centrifugal pump；
It is the message distribution target CPU based on the centrifugal pump.
In this example, the message includes the message of real time business.
The embodiment for the device that the application multi-core CPU is given out a contract for a project can be applied on the network equipment based on SMP architecture.Device
Embodiment can be realized by software, can also be realized by way of hardware or software and hardware combining.Exemplified by implemented in software,
As the device on a logical meaning, being will be non-volatile by the processor of the network equipment based on SMP architecture where it
Corresponding computer program instructions read what operation in internal memory was formed in memory.For hardware view, as shown in figure 4,
A kind of hardware structure diagram of the network equipment based on SMP architecture where the device given out a contract for a project for the application multi-core CPU, except Fig. 4 institutes
Outside the processor, internal memory, network interface and the nonvolatile memory that show, in embodiment where device based on SMP architecture
The actual functional capability of device given out a contract for a project generally according to the multi-core CPU of the network equipment, other hardware can also be included, this is no longer gone to live in the household of one's in-laws on getting married
State.
The function of unit and the implementation process of effect specifically refer to correspondence step in the above method in said apparatus
Implementation process, will not be repeated here.
For device embodiment, because it corresponds essentially to embodiment of the method, so related part is real referring to method
Apply the part explanation of example.Device embodiment described above is only schematical, wherein described be used as separating component
The unit of explanation can be or may not be physically separate, and the part shown as unit can be or can also
It is not physical location, you can with positioned at a place, or can also be distributed on multiple NEs.Can be according to reality
Selection some or all of module therein is needed to realize the purpose of application scheme.Those of ordinary skill in the art are not paying
In the case of going out creative work, you can to understand and implement.
The preferred embodiment of the application is the foregoing is only, not to limit the application, all essences in the application
God is with principle, and any modification, equivalent substitution and improvements done etc. should be included within the scope of the application protection.
Claims (10)
1. a kind of method that multi-core CPU is given out a contract for a project, applied to the network equipment based on SMP architecture, the network equipment includes multinuclear
, there is a plurality of descending inner passage in CPU and forwarding chip, it is characterised in that bag between the multi-core CPU and the forwarding chip
Include：
For the unique descending inner passage of each CPU static allocations；
When receiving the message sent on the forwarding chip, the message characteristic of the message is extracted；
It is that the message distributes target CPU based on the message characteristic extracted, and the message is sent to the target
CPU, to be handled by the target CPU the message, and after processing is completed by for the target CPU distribute it is descending
Inner passage returns to result to the forwarding chip.
2. according to the method described in claim 1, it is characterised in that described to lead to for the unique descending inside of each CPU static allocations
Road, including：
When the network equipment starts, the descending inner passage between the multi-core CPU and the forwarding chip is divided one by one
Each CPU of dispensing；If the quantity of descending inner passage is less than CPU quantity, after descending inner passage is all assigned, weight
Newly the descending inner passage distributed is distributed to remaining CPU one by one.
3. according to the method described in claim 1, it is characterised in that each CPU of the multi-core CPU maximum processing flow is not
Together, the bandwidth of each descending inner passage between the multi-core CPU and the forwarding chip is different；
Described is the unique descending inner passage of each CPU static allocations, including：
When the network equipment starts, the maximum processing flow of each CPU based on the multi-core CPU, respectively each CPU distribution
With the descending inner passage of its maximum processing flows match；If the quantity of descending inner passage is less than CPU quantity, instantly
After row inner passage is all assigned, the descending inner passage distributed is distributed to remaining CPU again.
4. according to the method described in claim 1, it is characterised in that described is the report based on the message characteristic extracted
Text distribution target CPU, including：
Hash calculation is carried out to the message characteristic and obtains centrifugal pump；
It is the message distribution target CPU based on the centrifugal pump.
5. according to the method described in claim 1, it is characterised in that the message includes the message of real time business.
6. the device that a kind of multi-core CPU is given out a contract for a project, applied to the network equipment based on SMP architecture, the network equipment includes multinuclear
, there is a plurality of descending inner passage in CPU and forwarding chip, it is characterised in that bag between the multi-core CPU and the forwarding chip
Include：
Allocation unit, for for the unique descending inner passage of each CPU static allocations；
Receiving unit, for receiving during the message sent on the forwarding chip, extracts the message characteristic of the message；
Selecting unit, for being that the message distributes target CPU based on the message characteristic extracted, and the message is sent
To the target CPU, to be handled by the target CPU the message, and in the completed by being distributed for the target CPU
Descending inner passage to the forwarding chip return result.
7. device according to claim 6, it is characterised in that the allocation unit, is further used for：
When the network equipment starts, the descending inner passage between the multi-core CPU and the forwarding chip is divided one by one
Each CPU of dispensing；If the quantity of descending inner passage is less than CPU quantity, after descending inner passage is all assigned, weight
Newly the descending inner passage distributed is distributed to remaining CPU one by one.
8. device according to claim 6, it is characterised in that each CPU of the multi-core CPU maximum processing flow is not
Together, the bandwidth of each descending inner passage between the multi-core CPU and the forwarding chip is different；The allocation unit, enters one
Walking is used for：
When the network equipment starts, the maximum processing flow of each CPU based on the multi-core CPU, respectively each CPU distribution
With the descending inner passage of its maximum processing flows match；If the quantity of descending inner passage is less than CPU quantity, instantly
After row inner passage is all assigned, the descending inner passage distributed is distributed to remaining CPU again.
9. device according to claim 6, it is characterised in that the selecting unit, is further used for：
Hash calculation is carried out to the message characteristic and obtains centrifugal pump；
It is the message distribution target CPU based on the centrifugal pump.
10. device according to claim 6, it is characterised in that the message includes the message of real time business.
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| CN201710179363.XA CN107015942B (en) | 2017-03-23 | 2017-03-23 | Method and device for multi-core CPU (Central processing Unit) packet sending |
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| CN201710179363.XA CN107015942B (en) | 2017-03-23 | 2017-03-23 | Method and device for multi-core CPU (Central processing Unit) packet sending |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108259369A (en) * | 2018-01-26 | 2018-07-06 | 迈普通信技术股份有限公司 | The retransmission method and device of a kind of data message |
| CN108667733A (en) * | 2018-03-29 | 2018-10-16 | 新华三信息安全技术有限公司 | A kind of network equipment and message processing method |
| CN108833281A (en) * | 2018-06-01 | 2018-11-16 | 新华三信息安全技术有限公司 | A kind of message forwarding method and the network equipment |
| CN109688069A (en) * | 2018-12-29 | 2019-04-26 | 杭州迪普科技股份有限公司 | A kind of method, apparatus, equipment and storage medium handling network flow |
| CN111464456A (en) * | 2020-03-31 | 2020-07-28 | 杭州迪普科技股份有限公司 | Flow control method and device |
| CN111522772A (en) * | 2020-04-27 | 2020-08-11 | 杭州迪普科技股份有限公司 | Method and device for configuring service board |
| CN114244781A (en) * | 2021-12-20 | 2022-03-25 | 苏州盛科通信股份有限公司 | DPDK-based message deduplication processing method and device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101094184A (en) * | 2007-07-27 | 2007-12-26 | 杭州华三通信技术有限公司 | Message process device |
| CN101616083A (en) * | 2009-08-06 | 2009-12-30 | 杭州华三通信技术有限公司 | A kind of message forwarding method and device |
-
2017
- 2017-03-23 CN CN201710179363.XA patent/CN107015942B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101094184A (en) * | 2007-07-27 | 2007-12-26 | 杭州华三通信技术有限公司 | Message process device |
| CN101616083A (en) * | 2009-08-06 | 2009-12-30 | 杭州华三通信技术有限公司 | A kind of message forwarding method and device |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108259369A (en) * | 2018-01-26 | 2018-07-06 | 迈普通信技术股份有限公司 | The retransmission method and device of a kind of data message |
| CN108667733A (en) * | 2018-03-29 | 2018-10-16 | 新华三信息安全技术有限公司 | A kind of network equipment and message processing method |
| CN108833281A (en) * | 2018-06-01 | 2018-11-16 | 新华三信息安全技术有限公司 | A kind of message forwarding method and the network equipment |
| CN109688069A (en) * | 2018-12-29 | 2019-04-26 | 杭州迪普科技股份有限公司 | A kind of method, apparatus, equipment and storage medium handling network flow |
| CN111464456A (en) * | 2020-03-31 | 2020-07-28 | 杭州迪普科技股份有限公司 | Flow control method and device |
| CN111464456B (en) * | 2020-03-31 | 2023-08-29 | 杭州迪普科技股份有限公司 | Flow control method and device |
| CN111522772A (en) * | 2020-04-27 | 2020-08-11 | 杭州迪普科技股份有限公司 | Method and device for configuring service board |
| CN114244781A (en) * | 2021-12-20 | 2022-03-25 | 苏州盛科通信股份有限公司 | DPDK-based message deduplication processing method and device |
| CN114244781B (en) * | 2021-12-20 | 2023-12-22 | 苏州盛科通信股份有限公司 | Message de-duplication processing method and device based on DPDK |
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