CN107015099A - A kind of ac fault detection circuit and its detection method - Google Patents
A kind of ac fault detection circuit and its detection method Download PDFInfo
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- CN107015099A CN107015099A CN201710297518.XA CN201710297518A CN107015099A CN 107015099 A CN107015099 A CN 107015099A CN 201710297518 A CN201710297518 A CN 201710297518A CN 107015099 A CN107015099 A CN 107015099A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S10/00—Systems supporting electrical power generation, transmission or distribution
- Y04S10/50—Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
- Y04S10/52—Outage or fault management, e.g. fault detection or location
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Abstract
A kind of ac fault detection circuit of the present invention, which is set, is connected with AC signal input, and it includes Fisrt fault detection circuit and the second failure detector circuit, and the Fisrt fault is with detecting the structure of circuit and the symmetrical configuration of second failure detector circuit identical；The Fisrt fault detection circuit includes first anode input, the first negative electrode input and Fisrt fault control signal output, the Fisrt fault control signal output exports Fisrt fault control signal, symmetrically second failure detector circuit includes second plate input, the second negative electrode input and the second failure control signal output end, and the second failure control signal output end exports the second failure control signal.The present invention, which is realized, accurately and reliably to be carried out carrying out alternating current circuit fault detect judgement, and rapidly exports alternating current failure control signal.
Description
Technical field
The present invention relates to electrical circuit field, more particularly to a kind of ac fault detection circuit and its detection method.
Background technology
AC power power applications include industrial production, domestic power etc. in all trades and professions, and AC power is powered, can be because
A variety of causes causes disconnection fault, when disconnection fault occurs, such as detect and handle not in time, fire is caused sometimes, damage
Electrical equipment, threatens the various uncertain disasters such as personal safety.At present, people are still constantly seeking the stabilization of Alternating Current Power Supply
Control, the fault detect to AC power, or complicated, cost is high, realizes difficulty, otherwise detection circuit is consumed very in itself
Big power consumption, causes more losses in normal operation.Wherein using it is more be to enter electrical equipment in AC power
Before, blow-out device such as fuse is installed, but be all the passive protection measure cured the symptoms, not the disease.
In view of the above-mentioned problems, needing the active for finding a kind of AC power power supply safety that can be widely used in all trades and professions badly
Detection and solution technical scheme.Such as eliminate the potential safety hazard after failure occurs, switching of stand-by power supply etc..
The content of the invention
The technical problem to be solved in the present invention is, in order to overcome defect of the prior art, now to provide a kind of AC fault inspection
Slowdown monitoring circuit and its detection method, realize low cost, and low-loss accurately and reliably carries out carrying out failure especially to alternating current circuit
It is short trouble detection judgement, and exports failure control signal.And realize alternating current circuit be in malfunction when carry out
Release is handled, it is ensured that exchange output safety.
The present invention is to solve above-mentioned technical problem by following technical proposals：
A kind of ac fault detection circuit of the present invention, it is defeated that the ac fault detection circuit setting is connected with AC signal
Enter, its feature is, the ac fault detection circuit includes Fisrt fault and detects circuit and the second failure detector circuit, described
Fisrt fault is with detecting the structure of circuit and the symmetrical configuration of second failure detector circuit identical；The Fisrt fault detection
Circuit includes first anode input, the first negative electrode input and Fisrt fault control signal output, the Fisrt fault control
Signal output part processed exports Fisrt fault control signal, and symmetrically second failure detector circuit is inputted including second plate
End, the second negative electrode input and the second failure control signal output end, the second failure control signal output end output second
Failure control signal, when the two ends that the AC signal is inputted are defeated with the first anode input and the second plate respectively
When entering end connection, the first negative electrode input and the connection of the second negative electrode input；
Or, when the two ends that the AC signal is inputted are defeated with the first negative electrode input and second negative electrode respectively
When entering end connection, first anode input and second plate the input connection.
Preferably, Fisrt fault detection circuit includes the first mu balanced circuit and the first timing control circuit, and described the
One mu balanced circuit is powered to first timing control circuit, and first mu balanced circuit is used to make to be transferred to first timing
The first voltage for controlling circuit is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, works as institute
When stating first voltage for false voltage, the Fisrt fault control signal is relative to the first anode input or described first
The AC signal of negative electrode input is high level signal；Second failure detector circuit, which includes the second mu balanced circuit and second, to be determined
When control circuit, second mu balanced circuit is powered to second timing control circuit, second mu balanced circuit and second
Timing control circuit is symmetrically the same with the first mu balanced circuit, the first timing control circuit respectively, and second mu balanced circuit is used for
The second voltage for making to be transferred to second timing control circuit is corresponding with the frequency of tested AC signal 50%
The burning voltage of dutycycle, when the second voltage is false voltage, second failure control signal is relative to described the
The AC signal of two anode inputs or the second negative electrode input is high level signal.
Preferably, the operating current of the operating current of first timing control circuit and second timing control circuit
Less than 50uA.
Preferably, first mu balanced circuit includes the first depletion type MOS tube and the first electric capacity, first depletion type
Metal-oxide-semiconductor is the depletion type MOS tube or external first diode of first depletion type MOS tube for carrying the first diode, described
The drain electrode of the negative electrode of one diode and first depletion type MOS tube is all connected to the first negative electrode input, described first
The grid of depletion type MOS tube, the first end of one end of first electric capacity and first timing control circuit and described first
The anode of diode is all connected to the first anode input；The source electrode of first depletion type MOS tube connects described simultaneously
Second end of the other end of the first electric capacity and first timing control circuit；
Second mu balanced circuit includes the second depletion type MOS tube, the second electric capacity and the second timing control circuit, described the
Two depletion type MOS tubes are depletion type MOS tube or external two or two pole of second depletion type MOS tube for carrying the second diode
Pipe, the drain electrode of the negative electrode of second diode and second depletion type MOS tube is all connected with the second negative electrode input, institute
State the grid of the second depletion type MOS tube, one end of second electric capacity, the first end of second timing control circuit and described
The anode of second diode is all connected to the second plate input；The source electrode of second depletion type MOS tube is connected simultaneously
Second end of the other end of second electric capacity and second timing control circuit.
Preferably, Fisrt fault detection circuit also includes the 3rd N-type metal-oxide-semiconductor and the 4th depletion type MOS tube, and described the
Four depletion type MOS tubes are the depletion type MOS tube for carrying the 3rd diode or external three or two pole of the 4th depletion type MOS tube
Pipe, the drain electrode of the negative electrode and the 4th depletion type MOS tube of the 3rd diode is all connected to the first negative electrode input,
The grid of the 3rd N-type metal-oxide-semiconductor is connected with the Fisrt fault control signal output of first timing control circuit,
The drain electrode of the 3rd N-type metal-oxide-semiconductor is connected with the source electrode of the 4th depletion type MOS tube, the source electrode of the 3rd N-type metal-oxide-semiconductor,
The grid of 4th depletion type MOS tube and the anode of the 3rd diode are all connected to the first anode input；
Second failure detector circuit also includes the 5th N-type metal-oxide-semiconductor and the 6th depletion type MOS tube, and the described 6th exhausts
Type metal-oxide-semiconductor is the depletion type MOS tube or external 4th diode of the 6th depletion type MOS tube for carrying the four or two pole, described
The drain electrode of the negative electrode of four diodes and the 6th depletion type MOS tube is all connected to the second negative electrode input, the 5th N
The grid of type metal-oxide-semiconductor is connected with the second failure control signal output end of second timing control circuit, the 5th N
The drain electrode of type metal-oxide-semiconductor is connected with the source electrode of the 6th depletion type MOS tube, the source electrode of the 5th N-type metal-oxide-semiconductor, the described 6th
The anode of the grid of depletion type MOS tube and the 4th diode is all connected to the second plate input.
Preferably, first timing control circuit includes the first impulse generator and the first counter of concatenation, described
First impulse generator is used to produce first voltage pulse signal for the first voltage, and first counter is used to set
First voltage step-by-step counting limiting value, judge the first voltage pulse signal whether exceed the first voltage step-by-step counting pole
Limit value and the output Fisrt fault control signal；Second timing control circuit include concatenation the second impulse generator and
Second counter, second impulse generator is used to produce second voltage pulse signal, described for the second voltage
Two counters are used to set second voltage step-by-step counting limiting value, judge whether the second voltage pulse signal exceeds described the
Two voltage pulse count limit values and output second failure control signal；
The first voltage step-by-step counting limiting value is equal with the second voltage step-by-step counting limiting value.
Preferably, first timing control circuit also includes the first electrification reset circuit, the first electrification reset electricity
Road is connected to first counter, first impulse generator simultaneously；Second timing control circuit also includes second
Electrification reset circuit, second electrification reset circuit is connected to second counter, second impulse generator simultaneously.
A kind of alternating-current fault detection method, sets the input of connection AC signal and failure control in ac fault detection circuit
Signal output and fault logic circuits processed, its feature are that the alternating-current fault detection method is further comprising the steps of：
Step one, Fisrt fault is set to detect circuit and the second fault detect electricity in the ac fault detection circuit
Road, the structure of the Fisrt fault detection circuit and the structure setting of second failure detector circuit are symmetrically identical；
Step 2, the two ends that the Fisrt fault is detected circuit are respectively set to first anode input, the first negative electrode
Input and Fisrt fault control signal output, set the Fisrt fault control signal output output Fisrt fault control
Signal；Symmetrically the two ends of second fault detect be respectively set to second plate input, the second negative electrode input and
Second failure control signal output end, sets the second failure control signal output end to export the second failure control signal,
Step 3, the two ends that the AC signal is inputted respectively with the first anode input and the second plate
Input sets connection, sets the first negative electrode input to be connected with the second negative electrode input；Or, by the exchange
When the two ends of signal input are connected with the first negative electrode input and the second negative electrode input setting respectively, set described
First anode input and second plate input connection.
Preferably, the alternating-current fault detection method also includes step：
The first mu balanced circuit and the first timing control circuit be set in Fisrt fault detection circuit, described the is set
One mu balanced circuit is powered to first timing control circuit, first mu balanced circuit is used to making to be transferred to described first and is determined
When control circuit first voltage be 50% dutycycle corresponding with the frequency of tested AC signal burning voltage, institute
The output end for stating the first timing control circuit sets output Fisrt fault control signal, when the first voltage is false voltage
When, it is high electricity relative to the first anode input or the first negative electrode input to set the Fisrt fault control signal
Ordinary mail number；The second mu balanced circuit and the second timing control circuit are set in second failure detector circuit, described second is set
Mu balanced circuit is powered to second timing control circuit, sets second mu balanced circuit and the second timing control circuit difference
Symmetrically the same with the first mu balanced circuit, the first timing control circuit, second mu balanced circuit is used to make to be transferred to described second
The second voltage of timing control circuit is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal,
In detected signal normal work, the first voltage of the voltage of voltage regulation of 50% dutycycle and 50% dutycycle is complementary；Described
The output end of two timing control circuits sets output second failure control signal, when the second voltage is false voltage
When, it is high electricity relative to the second plate input or the second negative electrode input to set second failure control signal
Ordinary mail number.
Preferably, the alternating-current fault detection method also includes step：
First mu balanced circuit is set to include the first depletion type MOS tube and the first electric capacity, first depletion type MOS tube
It is set to carry the depletion type MOS tube of the first diode or external first diode of the first depletion type MOS tube is set, sets
The drain electrode of the negative electrode of first diode and first depletion type MOS tube is all connected to the first negative electrode input, if
Put the first end of grid, one end of first electric capacity and first timing control circuit of first depletion type MOS tube
The first anode input is all connected to the anode of first diode；The source of first depletion type MOS tube is set
Pole connects the other end of first electric capacity and the second end of first timing control circuit simultaneously；
Second mu balanced circuit is set to include the second depletion type MOS tube, the second electric capacity and the second timing control circuit, if
It is the depletion type MOS tube or second depletion type MOS tube external for carrying the second diode to put second depletion type MOS tube
Two diodes, set the drain electrode of the negative electrode and second depletion type MOS tube of second diode to be all connected with described second the moon
Pole input, sets grid, one end of second electric capacity, second timing controlled electricity of second depletion type MOS tube
The anode of the first end on road and second diode is all connected to the second plate input；Second depletion type is set
The source electrode of metal-oxide-semiconductor connects the other end of second electric capacity and the second end of second timing control circuit simultaneously.
The positive effect of the present invention is：
The present invention, which is realized, accurately and reliably to be carried out carrying out alternating current circuit fault detect judgement, and rapidly output is handed over
Flow failure control signal, so that failure is quickly handled after occurring, and realize in alternating current circuit in open circuit event
Release processing is carried out during barrier state, it is ensured that avoid breaking down the potential safety hazard that causes in AC signal；The present invention is being detected
The first voltage of the burning voltage of 50% dutycycle and 50% dutycycle is complementary during signal normal work, and scientifically and rationally
The voltage of the AC signal detected using the characteristic of depletion type MOS tube, the present invention can be up to more than 800V.
Brief description of the drawings
Fig. 1 is the first structural representation of the preferably embodiment one of the present invention.
Fig. 2 is second of structural representation of the preferably embodiment one of the present invention.
Fig. 3 is the first structural representation of the preferably embodiment two of the present invention.
Fig. 4 is second of structural representation of the preferably embodiment two of the present invention.
Fig. 5 is the structural representation of the depletion type MOS tube for carrying diode of the present invention.
Fig. 6 is the structural representation of the timing control circuit of the present invention.
Embodiment
The present invention is further illustrated below by the mode of embodiment, but does not therefore limit the present invention to described reality
Apply among a scope.
Fig. 1~4 are referred to, a kind of ac fault detection circuit of the invention is connected with AC signal input 12, including first
Failure detector circuit and the second failure detector circuit, the structure of Fisrt fault detection circuit and the structure of the second failure detector circuit
It is symmetrically identical；Fisrt fault detection circuit includes first anode input 5, the first negative electrode input 7 and Fisrt fault control
Signal output part 3, the output Fisrt fault control signal of Fisrt fault control signal output 3, symmetrically the second fault detect is electric
Road includes second plate input 6, the second negative electrode input 8 and the second failure control signal output end 4, the second Fault Control letter
Number output end 4 exports the second failure control signal.Wherein, the failure control signal of Fisrt fault control signal output 3 and second
The failure control signal output end that output end 4 is constituted may be coupled to display instrument, can also be connected to the chain machine of signal detection
Structure.
The first connected mode, as shown in figures 1 and 3, when the two ends that the AC signal inputs 12 are positive with first respectively
When pole input 5 and the connection of second plate input 6, the first negative electrode input 7 and the second negative electrode input 8 are connected；Second
Connected mode, as shown in Figure 2 and Figure 4, when AC signal input 12 two ends respectively with the first negative electrode input 7 and the second negative electrode
When input 8 is connected, first anode input 5 and second plate input 6 are connected.
Embodiment one
Fig. 1 and Fig. 2 are referred in above-mentioned technical foundation, Fisrt fault detection circuit includes the first mu balanced circuit and first
Timing control circuit 1, the first mu balanced circuit is powered to the first timing control circuit 1, and the first mu balanced circuit is used to making to be transferred to the
The first voltage of one timing control circuit 1 is the stable electric of 50% dutycycle corresponding with the frequency of tested AC signal
Pressure, when first voltage is false voltage, Fisrt fault control signal is inputted relative to the negative electrode of first anode input 5 or first
The AC signal at end 7 is high level signal；Second failure detector circuit includes the second mu balanced circuit and the second timing control circuit
2, the second mu balanced circuit is powered to second timing control circuit 2, and the second mu balanced circuit and the second timing control circuit 2 are distinguished
Symmetrically the same with the first mu balanced circuit, the first timing control circuit 1, the second mu balanced circuit is used to make to be transferred to second timing
The second voltage for controlling circuit 2 is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, when
When second voltage is false voltage, the second failure control signal is relative to the negative electrode input 8 of second plate input 6 or second
High level signal.
Therefore, the present invention detects the complete phase of the structure of structure and the second failure detector circuit of circuit using Fisrt fault
Together, when ac input signal positive and negative electrode is alternately inputted, as long as first voltage ac input signal is faulty, the first timing control
The output end of device 1 processed and the output end of the second timing controller 2 always have an output end to export high level signal, make first to determine
When the output end of controller 1 and the output end of the second timing controller 2 can just detect fault-signal.
In this programme, the effective time of first voltage and second voltage is, positive reason corresponding with input exchange signal
Should be 1/2nd AC signal cycle according to AC characteristic effective time under condition, because in AC signal a cycle,
From positive to negative and just each change is born once, so the continuous effective time of first voltage and second voltage is two under normal circumstances
/ mono- power cycle.But, just illustrate when the first voltage or the second voltage time have exceeded the normal time
There is failure and export fault-signal in AC power, the output of the failure control signal of Fisrt fault control signal output 3 or second
The only one end output fault-signal of end 4, or the output fault-signal of Fisrt fault control signal output 3, or the second failure
Control signal output 4 exports fault-signal, without output simultaneously.
More preferably, the operating current of the operating current of the first timing control circuit 1 and the second timing control circuit 2 is less than
50uA。
More preferably, the first mu balanced circuit includes the first depletion type MOS tube Q1 and the first electric capacity C1, the first depletion type MOS tube
Q1 is external first diode of depletion type MOS tube or the first depletion type MOS tube for carrying the first diode, the moon of the first diode
Pole and the first depletion type MOS tube Q1 drain electrode are all connected to the first negative electrode input 7, the first depletion type MOS tube Q1 grid,
It is defeated that the anode of the first end and the first diode of one electric capacity C1 one end and the first timing control circuit 1 is all connected to the first anode
Enter end 5；First depletion type MOS tube Q1 source electrode simultaneously connects the first electric capacity C1 other end and the first timing control circuit 1
Second end；
Second mu balanced circuit includes the second depletion type MOS tube Q2, the second electric capacity C2 and the second timing control circuit 2, second
Depletion type MOS tube Q2 is the depletion type MOS tube or external second diodes of the second depletion type MOS tube Q2 for carrying the second diode,
The negative electrode of second diode and the second depletion type MOS tube Q2 drain electrode are all connected with the second negative electrode input 8, the second depletion type MOS
Pipe Q2 grid, the second electric capacity C2 one end, the anode of the first end of the second timing control circuit 2 and the second diode are all connected with
To second plate input 6；Second depletion type MOS tube Q2 source electrode connects the second electric capacity C2 other end and the second timing simultaneously
Control the second end of circuit 2.
Embodiment two
As shown in Figure 3 and Figure 4, in Fig. 1 or Fig. 2 technical foundation, Fisrt fault detection circuit also includes the 3rd N-type
Metal-oxide-semiconductor Q3 and the 4th depletion type MOS tube Q4, the 4th depletion type MOS tube Q4 are the depletion type MOS tube or for carrying the 3rd diode
External 3rd diodes of four depletion type MOS tube Q4, the drain electrode of the negative electrode and the 4th depletion type MOS tube Q4 of the 3rd diode is all connected with
To the first negative electrode input 7, the Fisrt fault control signal of the 3rd N-type metal-oxide-semiconductor Q3 grid and the first timing control circuit 1 is defeated
Go out end 3 to connect, the 3rd N-type metal-oxide-semiconductor Q3 drain electrode is connected with the 4th depletion type MOS tube Q4 source electrode, the 3rd N-type metal-oxide-semiconductor Q3's
The anode of source electrode, the 4th depletion type MOS tube Q4 grid and the 3rd diode is all connected to first anode input 5；
Second failure detector circuit also includes the 5th N-type metal-oxide-semiconductor Q5 and the 6th depletion type MOS tube Q6, the 6th depletion type MOS
Pipe Q6 is the depletion type MOS tube or external 4th diodes of the 6th depletion type MOS tube Q6 for carrying the four or two pole, the 4th diode
Negative electrode and the 6th depletion type MOS tube Q6 drain electrode are all connected to the second negative electrode input, the 5th N-type metal-oxide-semiconductor Q5 grid and
Second failure control signal output end 4 of two timing control circuits 2 is connected, the 5th N-type metal-oxide-semiconductor Q5 drain electrode and the 6th depletion type
Metal-oxide-semiconductor Q6 source electrode connection, the 5th N-type metal-oxide-semiconductor Q5 source electrode, the 6th depletion type MOS tube Q6 grid and the 4th diode
Anode is all connected to second plate input 6.
In this programme, the 3rd N-type metal-oxide-semiconductor Q3 and the 5th N-type metal-oxide-semiconductor Q5 are intolerant to high-voltage MOS pipe, therefore respectively with the 4th
Depletion type MOS tube Q4 and the 6th depletion type MOS tube Q6 connections, because of the 4th depletion type MOS tube Q4 and the 6th depletion type MOS tube Q6 certainly
It is high pressure resistant with diode or external diode.The design allows the voltage of the detected AC signal of the present invention to be up to
More than 800V, scientifically and rationally make use of the 4th depletion type MOS tube Q4 and the 6th depletion type MOS tube Q6 voltage endurance to determine
's.
In embodiment one and embodiment two, the first timing control circuit 1 and the second timing control circuit are applied to.Such as
Shown in Fig. 6, now the structure to timing control circuit is illustrated, and timing control circuit includes the impulse generator 9 being sequentially connected
With counter 10, the output control signal of counter 10, timing control circuit may also include electrification reset circuit 11, electrification reset electricity
Road is connected with impulse generator 9 and counter 10 simultaneously, for electrification reset.
In above example one and embodiment two, the first timing control circuit 1 includes the first impulse generator of concatenation
With the first counter, the first impulse generator is used to produce first voltage pulse signal for first voltage, and the first counter is used
In setting first voltage step-by-step counting limiting value, judge whether the first voltage pulse signal exceeds first voltage step-by-step counting
Limiting value and output Fisrt fault control signal；Second timing control circuit 2 includes the second impulse generator and second of concatenation
Counter, the second impulse generator is used to produce second voltage pulse signal, second counter for the second voltage
For setting second voltage step-by-step counting limiting value, judging whether second voltage pulse signal exceeds second voltage step-by-step counting pole
The second failure control signal of limit value and output；First voltage step-by-step counting limiting value and second voltage step-by-step counting limiting value phase
Deng.The numerical value of step-by-step counting is determined according to the cycle of tested AC signal, for example, make delay control circuit i.e. the first timing controlled
The working time of the timing control circuit 2 of circuit 1 and second exports fault-signal when being more than 1/2 ac cycle.
First timing control circuit 1 may also include the first electrification reset circuit, and the first electrification reset circuit is connected to simultaneously
First counter, the first impulse generator；Second timing control circuit 2 may also include electric on the second electrification reset circuit, second
Reset circuit is connected to the second counter, the second impulse generator simultaneously.
Embodiment three
A kind of alternating-current fault detection method, sets the input of connection AC signal and failure control in ac fault detection circuit
Signal output and fault logic circuits processed, it is further comprising the steps of：
Step one, Fisrt fault is set to detect circuit and the second fault detect electricity in the ac fault detection circuit
Road, the structure of Fisrt fault detection circuit and the structure setting of the second failure detector circuit are symmetrically identical；
Fisrt fault, is detected that the two ends of circuit are respectively set to first anode input 5, the first negative electrode and inputted by step 2
End 7 and Fisrt fault control signal output 3, set Fisrt fault control signal output 3 to export Fisrt fault control signal；
The two ends of the second fault detect are symmetrically respectively set to second plate input 6, the second negative electrode input 8 and the second failure
Control signal output 4, sets the second failure control signal output end 3 to export the second failure control signal,
Step 3, the two ends that AC signal is inputted into 12 are set with first anode input 5 and second plate input 6 respectively
Connection is put, sets the first negative electrode input 7 to be connected with the second negative electrode input 8；Or, the two ends that AC signal is inputted into 12 are divided
When not being connected with the first negative electrode input 7 and the setting of the second negative electrode input 8, first anode input 5 and described second is set
Anode input 6 is connected.
Preferably, alternating-current fault detection method of the present invention also includes step：
The first mu balanced circuit and the first timing control circuit are set in Fisrt fault detection circuit, the first voltage stabilizing electricity is set
The first timing control circuit of road direction 1 is powered, and first mu balanced circuit is used to making to be transferred to the of the first timing control circuit 1
One voltage is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, the first timing control circuit
1 output end sets output Fisrt fault control signal, when first voltage is false voltage, sets the Fisrt fault control
Signal is high level signal relative to the negative electrode input 7 of first anode input 5 or first；Set in the second failure detector circuit
Second mu balanced circuit and the second timing control circuit 2, set the second mu balanced circuit to be powered to the second timing control circuit 2, set
Second mu balanced circuit and the second timing control circuit 2 are symmetrically the same with the first mu balanced circuit, the first timing control circuit 1 respectively,
Second mu balanced circuit is used to make the second voltage for being transferred to the second timing control circuit 2 be the frequency with tested AC signal
The burning voltage of 50% corresponding dutycycle, in detected signal normal work the voltage of voltage regulation of 50% dutycycle and
The first voltage of 50% dutycycle is complementary；The output end of second timing control circuit 2 sets the second failure control signal of output, when
When second voltage is false voltage, second failure control signal is set relative to the second plate input 6 or the second
Negative electrode input 8 is high level signal.
Alternating-current fault detection method of the present invention also includes step：
First mu balanced circuit is set to include the first depletion type MOS tube Q1 and the first electric capacity C1, the first depletion type MOS tube
Q1 is set to carry the depletion type MOS tube of the first diode or sets external first diodes of the first depletion type MOS tube Q1, sets
The negative electrode of first diode and the first depletion type MOS tube Q1 drain electrode are all connected to the first negative electrode input 7, set first to exhaust
The anode of type metal-oxide-semiconductor Q1 grid, the first end of the first electric capacity C1 one end and the first timing control circuit 1 and the first diode
It is all connected to first anode input 5；First depletion type MOS tube Q1 source electrode is set while connecting the first electric capacity C1 other end
With the second end of the first timing control circuit 1；
Second mu balanced circuit is set to include the second depletion type MOS tube Q2, the second electric capacity C2 and the second timing controlled electricity
Road 2, set the second depletion type MOS tube Q2 be carry the second diode depletion type MOS tube or the second depletion type MOS tube Q2 it is external
Second diode, sets the drain electrode of the negative electrode and the second depletion type MOS tube Q2 of the second diode to be all connected with the second negative electrode input
8, the second depletion type MOS tube Q2 grid, the second electric capacity C2 one end, the first end of the second timing control circuit 2 and the are set
The anode of two diodes is all connected to second plate input 6；Second depletion type MOS tube Q2 source electrode is set while connecting second
Second end of the electric capacity C2 other end and the second timing control circuit 2.
The present invention is described in detail above in association with accompanying drawing embodiment, those skilled in the art can be according to upper
State it is bright the present invention is made many variations example.Within the spirit and principles of the invention, any modification for being made, equally replace
Change, improve, should be included in the scope of the protection.Thus, some of embodiment details should not be constituted to this
The restriction of invention, the present invention regard the scope defined using appended claims as protection scope of the present invention.
Claims (10)
1. a kind of ac fault detection circuit, the ac fault detection circuit, which is set, is connected with AC signal input, its feature
It is, the ac fault detection circuit includes Fisrt fault and detects circuit and the second failure detector circuit, the Fisrt fault
It is with detecting the structure of circuit and the symmetrical configuration of second failure detector circuit identical；The Fisrt fault detection circuit includes
First anode input, the first negative electrode input and Fisrt fault control signal output, the Fisrt fault control signal are defeated
Go out end output Fisrt fault control signal, symmetrically second failure detector circuit includes second plate input, second the moon
Pole input and the second failure control signal output end, the second failure control signal output end export the second Fault Control letter
Number, when the two ends that the AC signal is inputted are connected with the first anode input and the second plate input respectively
When, the first negative electrode input and the second negative electrode input are connected；
Or, when the AC signal input two ends respectively with the first negative electrode input and the second negative electrode input
During connection, first anode input and second plate the input connection.
2. ac fault detection circuit according to claim 1, it is characterised in that the Fisrt fault detection circuit includes
First mu balanced circuit and the first timing control circuit, first mu balanced circuit are powered to first timing control circuit, institute
State the first mu balanced circuit is and tested AC signal for the first voltage for making to be transferred to first timing control circuit
Corresponding 50% dutycycle of frequency burning voltage, when the first voltage is false voltage, the Fisrt fault control
Signal processed is high level signal relative to the AC signal of the first anode input or the first negative electrode input；It is described
Second failure detector circuit includes the second mu balanced circuit and the second timing control circuit, and second mu balanced circuit is to described second
Timing control circuit is powered, and second mu balanced circuit and the second timing control circuit are determined with the first mu balanced circuit, first respectively
When control circuit symmetrical it is identical, second mu balanced circuit is used to make the second voltage that is transferred to second timing control circuit
For the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, when the second voltage is failure electricity
During pressure, exchange of second failure control signal relative to the second plate input or the second negative electrode input is believed
Number be high level signal.
3. ac fault detection circuit according to claim 2, it is characterised in that the work of first timing control circuit
The operating current for making electric current and second timing control circuit is less than 50uA.
4. ac fault detection circuit according to claim 2, it is characterised in that first mu balanced circuit includes first
Depletion type MOS tube and the first electric capacity, first depletion type MOS tube are the depletion type MOS tube or described for carrying the first diode
External first diode of first depletion type MOS tube, the drain electrode of the negative electrode of first diode and first depletion type MOS tube
It is all connected to the first negative electrode input, the grid of first depletion type MOS tube, one end of first electric capacity and described
The anode of the first end of first timing control circuit and first diode is all connected to the first anode input；It is described
The source electrode of first depletion type MOS tube connect simultaneously first electric capacity other end end and first timing control circuit the
Two ends；
Second mu balanced circuit includes the second depletion type MOS tube, the second electric capacity and the second timing control circuit, second consumption
Type metal-oxide-semiconductor to the greatest extent is the depletion type MOS tube or external second diode of second depletion type MOS tube for carrying the second diode, institute
The drain electrode for stating the negative electrode and second depletion type MOS tube of the second diode is all connected with the second negative electrode input, described
The grid of two depletion type MOS tubes, one end of second electric capacity, the first end of second timing control circuit and described second
The anode of diode is all connected to the second plate input；The source electrode of second depletion type MOS tube connects described simultaneously
Second end of the other end of the second electric capacity and second timing control circuit.
5. ac fault detection circuit according to claim 4, it is characterised in that the Fisrt fault detection circuit is also wrapped
The 3rd N-type metal-oxide-semiconductor and the 4th depletion type MOS tube are included, the 4th depletion type MOS tube is the depletion type for carrying the 3rd diode
Metal-oxide-semiconductor or external 3rd diode of the 4th depletion type MOS tube, the negative electrode and the 4th depletion type of the 3rd diode
The drain electrode of metal-oxide-semiconductor is all connected to the first negative electrode input, grid and first timing control of the 3rd N-type metal-oxide-semiconductor
The Fisrt fault control signal output connection of circuit processed, drain electrode and the 4th depletion type of the 3rd N-type metal-oxide-semiconductor
The source electrode connection of metal-oxide-semiconductor, source electrode, the grid and the described 3rd 2 of the 4th depletion type MOS tube of the 3rd N-type metal-oxide-semiconductor
The anode of pole pipe is all connected to the first anode input；
Second failure detector circuit also includes the 5th N-type metal-oxide-semiconductor and the 6th depletion type MOS tube, the 6th depletion type MOS
Manage the depletion type MOS tube or external 4th diode of the 6th depletion type MOS tube to carry the four or two pole, the four or two pole
The drain electrode of the negative electrode of pipe and the 6th depletion type MOS tube is all connected to the second negative electrode input, the 5th N-type MOS
The grid of pipe is connected with the second failure control signal output end of second timing control circuit, the 5th N-type MOS
The drain electrode of pipe is connected with the source electrode of the 6th depletion type MOS tube, the source electrode of the 5th N-type metal-oxide-semiconductor, the 6th depletion type
The anode of the grid of metal-oxide-semiconductor and the 4th diode is all connected to the second plate input.
6. ac fault detection circuit according to claim 2, it is characterised in that first timing control circuit includes
The first impulse generator and the first counter of concatenation, first impulse generator are used to produce for the first voltage
One voltage pulse signal, first counter is used to set first voltage step-by-step counting limiting value, judge the first voltage
Whether pulse signal is beyond the first voltage step-by-step counting limiting value and the output Fisrt fault control signal；Described second
Timing control circuit includes the second impulse generator and the second counter of concatenation, and second impulse generator is used to be directed to institute
State second voltage produce second voltage pulse signal, second counter be used for set second voltage step-by-step counting limiting value,
Judge the second voltage pulse signal whether beyond the second voltage step-by-step counting limiting value and output second failure
Control signal；
The first voltage step-by-step counting limiting value is equal with the second voltage step-by-step counting limiting value.
7. ac fault detection circuit according to claim 6, it is characterised in that first timing control circuit is also wrapped
The first electrification reset circuit is included, first electrification reset circuit is connected to first counter, first pulse simultaneously
Generator；Second timing control circuit also includes the second electrification reset circuit, and second electrification reset circuit connects simultaneously
It is connected to second counter, second impulse generator.
8. a kind of alternating-current fault detection method, sets the input of connection AC signal and Fault Control in ac fault detection circuit
Signal output and fault logic circuits, it is characterised in that the alternating-current fault detection method is further comprising the steps of：
Step one, Fisrt fault is set to detect circuit and the second failure detector circuit, institute in the ac fault detection circuit
It is symmetrically identical to state the structure of Fisrt fault detection circuit and the structure setting of second failure detector circuit；
The Fisrt fault, is detected that the two ends of circuit are respectively set to first anode input, the first negative electrode and inputted by step 2
End and Fisrt fault control signal output, set the Fisrt fault control signal output output Fisrt fault control letter
Number；The two ends of second fault detect are symmetrically respectively set to second plate input, the second negative electrode input and
Two failure control signal output ends, set the second failure control signal output end to export the second failure control signal,
Step 3, the two ends that the AC signal is inputted are inputted with the first anode input and the second plate respectively
End sets connection, sets the first negative electrode input to be connected with the second negative electrode input；Or, by the AC signal
When the two ends of input are connected with the first negative electrode input and the second negative electrode input setting respectively, described first is set
Anode input and second plate input connection.
9. alternating-current fault detection method according to claim 8, it is characterised in that the alternating-current fault detection method is also wrapped
Include step：
First mu balanced circuit and the first timing control circuit are set in Fisrt fault detection circuit, and setting described first is steady
The first timing control circuit is powered described in piezoelectricity road direction, makes first mu balanced circuit be used to make to be transferred to first timing control
The first voltage of circuit processed is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, described the
The output end of one timing control circuit sets output Fisrt fault control signal, when the first voltage is false voltage, if
The Fisrt fault control signal is put relative to the first anode input or the first negative electrode input for high level to believe
Number；The second mu balanced circuit and the second timing control circuit are set in second failure detector circuit, second voltage stabilizing is set
Circuit is powered to second timing control circuit, sets second mu balanced circuit and the second timing control circuit respectively with the
One mu balanced circuit, the first timing control circuit are symmetrically the same, and second mu balanced circuit is used to make to be transferred to second timing
The second voltage for controlling circuit is the burning voltage of 50% dutycycle corresponding with the frequency of tested AC signal, in quilt
The first voltage of the burning voltage of 50% dutycycle and 50% dutycycle is complementary when detecting signal normal work；Described second determines
When control circuit output end output second failure control signal is set, when the second voltage is false voltage, if
Second failure control signal is put relative to the second plate input or the AC signal of the second negative electrode input
For high level signal.
10. alternating-current fault detection method according to claim 9, it is characterised in that the alternating-current fault detection method is also
Including step：
First mu balanced circuit is set to include the first depletion type MOS tube and the first electric capacity, first depletion type MOS tube is set
To carry the depletion type MOS tube of the first diode or setting external first diode of the first depletion type MOS tube, set described
The drain electrode of the negative electrode of first diode and first depletion type MOS tube is all connected to the first negative electrode input, sets institute
State grid, the first end of one end of first electric capacity and first timing control circuit and the institute of the first depletion type MOS tube
The anode for stating the first diode is all connected to the first anode input；Set the source electrode of first depletion type MOS tube same
When connect the other end of first electric capacity and the second end of first timing control circuit；
Set second mu balanced circuit to include the second depletion type MOS tube, the second electric capacity and the second timing control circuit, institute is set
It is the depletion type MOS tube or second depletion type MOS tube the external 2nd 2 for carrying the second diode to state the second depletion type MOS tube
Pole pipe, setting the drain electrode of the negative electrode and second depletion type MOS tube of second diode, to be all connected with second negative electrode defeated
Enter end, the grid of second depletion type MOS tube, one end of second electric capacity, second timing control circuit are set
The anode of first end and second diode is all connected to the second plate input；Second depletion type MOS is set
The source electrode of pipe connects the other end of second electric capacity and the second end of second timing control circuit simultaneously.
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| CN205726623U (en) * | 2016-06-28 | 2016-11-23 | 重庆灿源电子有限公司 | AC failure detector circuit in lamp control system |
| CN206930731U (en) * | 2017-04-28 | 2018-01-26 | 苏州力生美半导体有限公司 | A kind of ac fault detection circuit |
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| US3668516A (en) * | 1969-02-10 | 1972-06-06 | Tokyo Shibaura Electric Co | Apparatus for inspecting a.c. electric relay systems during the operation thereof by use of a high frequency modulated signal |
| JP2013121169A (en) * | 2011-12-09 | 2013-06-17 | Hitachi Ltd | Digital output circuit having failure detection function |
| CN105471233A (en) * | 2014-08-20 | 2016-04-06 | 中兴通讯股份有限公司 | AC power supply transient interruption triggering device |
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