CN106997904A - Thin film transistor (TFT) and preparation method, gate driving circuit - Google Patents
Thin film transistor (TFT) and preparation method, gate driving circuit Download PDFInfo
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- CN106997904A CN106997904A CN201710251930.8A CN201710251930A CN106997904A CN 106997904 A CN106997904 A CN 106997904A CN 201710251930 A CN201710251930 A CN 201710251930A CN 106997904 A CN106997904 A CN 106997904A
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- 239000010409 thin film Substances 0.000 title claims abstract description 98
- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- 229920002120 photoresistant polymer Polymers 0.000 claims description 43
- 239000010408 film Substances 0.000 claims description 42
- 239000000463 material Substances 0.000 claims description 34
- 239000004020 conductor Substances 0.000 claims description 30
- 238000005530 etching Methods 0.000 claims description 26
- 230000000717 retained effect Effects 0.000 claims description 18
- 230000004888 barrier function Effects 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 10
- 238000011161 development Methods 0.000 claims description 7
- 239000013078 crystal Substances 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 238000004380 ashing Methods 0.000 claims description 3
- 238000009413 insulation Methods 0.000 description 9
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses a kind of thin film transistor (TFT) and preparation method, gate driving circuit, including：Active layer, source electrode and drain electrode, source electrode cover the subregion of active layer, and the subregion of drain electrode covering active layer, active layer includes：Main graph and the ramp pattern around main graph, the part not covered on main graph by source electrode and drain electrode is the first conductive pattern, part on ramp pattern between correspondence source electrode and drain electrode is the second conductive pattern, and the length of the second conductive pattern is more than the length of connection source electrode and the shortest path of drain electrode on the first conductive pattern.Technical scheme connects the length of source electrode and the shortest path drained by the way that the length of the second conductive pattern is more than on the first conductive pattern, it may be such that the corresponding threshold voltage of the second conductive pattern is more than the threshold voltage of the first conductive pattern, so as to the job stability of effectively lifting thin film transistor (TFT).
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of thin film transistor (TFT) and preparation method, gate driving circuit.
Background technology
Thin film transistor (TFT) can be used as transmitting the switch element of signal or provide the driving element of current path.
Fig. 1 be thin film transistor (TFT) of the prior art structural representation, as shown in figure 1, including active layer 3, with it is active
The source electrode 1 of the first side electrical connection of layer 3 and the drain electrode 2 electrically connected with the second side of active layer 3, the first side and the second side have respectively
Opposite sides in active layer 3.Wherein, it is (pre- to form main graph 4 being performed etching by etching technics to the film of active layer 3
The figure of the active layer 3 first designed) when, ramp pattern 5 is inevitably formed around main graph 4.Main graph 4
On be not the first conductive pattern by the parts of source electrode 1 and the covering of drain electrode 2, not by source electrode 1 and the covering of drain electrode 2 on ramp pattern 5
Part is the second conductive pattern.
In existing thin film transistor (TFT), because the conducting channel length Lmain of the first conductive pattern is more than the second conduction
The channel length Lsub of raceway groove, the i.e. corresponding threshold voltage of the second conductive pattern is less than the corresponding threshold value electricity of the first conductive pattern
Pressure.
It is applied with thin film transistor (TFT) after certain gate source voltage, the second conducting channel is prior to the first conducting channel shape
Into.Now, there is hump (Humping) phenomenon, the i.e. working stability of thin film transistor (TFT) in the VA characteristic curve of thin film transistor (TFT)
Property is poor.
The content of the invention
It is contemplated that at least solving one of technical problem present in prior art, it is proposed that a kind of thin film transistor (TFT) and
Preparation method, gate driving circuit and display device.
To achieve the above object, the invention provides a kind of thin film transistor (TFT), including：Active layer, source electrode and drain electrode, it is described
Source electrode covers the subregion of the active layer, and the drain electrode covers the subregion of the active layer；
The active layer includes：On main graph and the ramp pattern around main graph, the main graph not
The part covered by the source electrode and the drain electrode is the source electrode to be corresponded on the first conductive pattern, the ramp pattern and described
Part between drain electrode is the second conductive pattern；
The length of second conductive pattern, which is more than on first conductive pattern, connects the source electrode and the drain electrode
The length of shortest path.
Alternatively, the part not covered on the active layer by the source electrode and the drain electrode is zhou duicheng tuxing or center
Symmetric figure.
Alternatively, the source electrode is tiltedly oppositely arranged with the drain electrode, and the active layer is rectangle, two groups pairs of the rectangle
One group in side with the source electrode towards the side edge-perpendicular of the drain electrode, another group with the source electrode towards the drain electrode
Side sides aligned parallel；
The source electrode covers a drift angle of the active layer, and the drain electrode covers a drift angle of the active layer, institute
The drift angle and the drift angle of the drain electrode covering for stating source electrode covering are one group of vertical angles in rectangle.
Alternatively, the source electrode is with the drain electrode just to setting, and the active layer is shaped as parallelogram；
The source electrode covers a drift angle of the active layer, and the drain electrode covers a drift angle of the active layer, institute
The drift angle and the drift angle of the drain electrode covering for stating source electrode covering are one group of vertical angles in parallelogram.
Alternatively, the source electrode is with the drain electrode just to setting, and the edge of the active layer is convex, the source electrode and
The drain electrode is covered each by be arrangeding in parallel in the active layer and unequal two sides of length.
Alternatively, the quantity of the active layer in the thin film transistor (TFT) is 2 or multiple.
To achieve the above object, present invention also offers a kind of gate driving circuit, including：Film crystal described above
Pipe.
To achieve the above object, present invention also offers a kind of display device, including：Thin film transistor (TFT) described above.
To achieve the above object, present invention also offers a kind of preparation method of thin film transistor (TFT), including：
Active layer is formed in the top of underlay substrate, the active layer includes：Main graph and around main graph
Ramp pattern；
Source electrode and drain electrode are formed in the top of the active layer, the source electrode covers the subregion of the active layer, institute
State the part not covered on the subregion of the drain electrode covering active layer, the main graph by the source electrode and the drain electrode
For the first conductive pattern, the part on the ramp pattern between the correspondence source electrode and the drain electrode is the second conductive pattern,
The length of second conductive pattern is more than the shortest path that the source electrode and the drain electrode are connected on first conductive pattern
Length.
Alternatively, active layer, source electrode are formed and is specifically included the step of drain electrode：
Active layer material film is formed in the top of underlay substrate；
In the top correspondence predeterminable area formation etching barrier layer of active layer material film, the predeterminable area at least includes
Not by source electrode and the covered region that drains on the active layer；
Conductive material thin film is formed in the top of the etching barrier layer and the active layer material film；
Photoresist is formed in the top of the conductive material thin film；
The photoresist is exposed using mask plate, development treatment, corresponding to source electrode to be formed and drain electrode region
Photoresist be fully retained；
The conductive material thin film and active layer material film are performed etching, the conductive material thin film is located at photoresist
The part of lower section is fully retained to obtain the figure of the source electrode and the drain electrode, and the active layer material film is located at the light
Part below photoresist and below the etching barrier layer is fully retained to obtain the figure of the active layer；
Alternatively, active layer, source electrode are formed and is specifically included the step of drain electrode：
Active layer material film is formed in the top of underlay substrate；
Conductive material thin film is formed in the top of the active layer material film；
The photoresist is exposed using intermediate tone mask plate, development treatment, corresponding to source electrode to be formed and drain electrode
The photoresist in region be fully retained, corresponding on the default active layer not by source electrode and the light in the covered region that drains
Photoresist part retains；
The conductive material thin film, the active layer material film are performed etching, the conductive material thin film and described
The part that active layer material film is located at below photoresist is fully retained, to obtain the figure of the active layer；
Ashing processing is carried out to the photoresist, retained corresponding to the photoresist part in source electrode and the region of drain electrode, correspondence
Do not removed completely by the photoresist of source electrode and the covered region that drains in default on the active layer；
The conductive material thin film is performed etching, the part that the conductive material thin film is located at below photoresist is protected completely
Stay to obtain the figure of the source electrode and the drain electrode；
The invention has the advantages that：
The invention provides a kind of thin film transistor (TFT) and preparation method, gate driving circuit and display device, including：It is active
Layer, source electrode and drain electrode, wherein, source electrode covers the subregion of active layer, the subregion of drain electrode covering active layer, active layer bag
Include：It is not by the part of source electrode and drain electrode covering on main graph and the ramp pattern around main graph, main graph
Part on first conductive pattern, ramp pattern between correspondence source electrode and drain electrode is the second conductive pattern, the second conductive pattern
Length is more than the length of connection source electrode and the shortest path of drain electrode on the first conductive pattern.Technical scheme is by by
The length of two conductive patterns is more than the length of connection source electrode and the shortest path of drain electrode on the first conductive pattern, may be such that second leads
The conducting channel length of electrograph shape is more than the conducting channel length of the first conductive pattern, now, the corresponding threshold of the second conductive pattern
Threshold voltage is more than the threshold voltage of the first conductive pattern, so as to the job stability of effectively lifting thin film transistor (TFT).
Brief description of the drawings
Fig. 1 is the structural representation of thin film transistor (TFT) of the prior art；
Fig. 2 is a kind of structural representation for thin film transistor (TFT) that the embodiment of the present invention one is provided；
Fig. 3 be thin film transistor (TFT) shown in Fig. 2 in A-A to sectional view；
Fig. 4 is the VA characteristic curve figure of the first conductive pattern and the second conductive pattern in the prior art；
Fig. 5 is the VA characteristic curve figure of thin film transistor (TFT) in the prior art；
Fig. 6 is the VA characteristic curve figure of the first conductive pattern and the second conductive pattern in the present invention；
Fig. 7 is the VA characteristic curve figure of thin film transistor (TFT) in the present invention；
Fig. 8 is the structural representation for another thin film transistor (TFT) that the embodiment of the present invention one is provided；
Fig. 9 is the structural representation for another thin film transistor (TFT) that the embodiment of the present invention one is provided；
Figure 10 is a kind of structural representation for thin film transistor (TFT) that the embodiment of the present invention two is provided；
Figure 11 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention five is provided；
Figure 12 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention six is provided；
Figure 13 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention seven is provided.
Embodiment
To make those skilled in the art more fully understand technical scheme, the present invention is carried below in conjunction with the accompanying drawings
A kind of thin film transistor (TFT) and preparation method, gate driving circuit and display device supplied is described in detail.
Thin film transistor (TFT) in the present invention both can be that bottom gate thin film transistor can also be top gate type thin film transistor,
Accordingly described by taking bottom gate thin film transistor as an example in each of the embodiments described below.
Fig. 2 is a kind of structural representation for thin film transistor (TFT) that the embodiment of the present invention one is provided, and Fig. 3 is film shown in Fig. 2
In transistor A-A to sectional view, as shown in Figures 2 and 3, the thin film transistor (TFT) includes：Grid 6, gate insulation layer 7, active layer
3rd, source electrode 1 and drain electrode 2.Wherein, source electrode 1 covers the subregion of active layer 3, and drain electrode 2 covers the subregion of active layer 3, had
Active layer 3 includes：Not by source electrode 1 and drain electrode 2 on main graph 4 and the ramp pattern 5 around main graph 4, main graph 4
The part of covering is that the part on the first conductive pattern, ramp pattern 5 between correspondence source electrode 1 and drain electrode 2 is the second conductive pattern,
The length (length that the path of source electrode 1 and drain electrode 2 is connected on the first conductive pattern) of second conductive pattern is more than the first conductive pattern
The length of source electrode 1 and the shortest path of drain electrode 2 is connected in shape.
In actual design, do not specifically included on active layer 3 by the part of source electrode 1 and the covering of drain electrode 2：One first conductive
Figure and two the second conductive patterns for being located at the first conductive pattern both sides respectively.
In the present invention, by the way that the length of the second conductive pattern is more than into connection source electrode 1 and drain electrode 2 on the first conductive pattern
Shortest path length, may be such that the second conductive pattern conducting channel length Lsub be more than the first conductive pattern conductive ditch
Road length Lmain, now, the corresponding threshold voltage of the second conductive pattern are more than the threshold voltage of the first conductive pattern, i.e., with grid
The increase of source voltage, the first conductive pattern is first turned on, and is turned on after the second conductive pattern.Now, the C-V characteristic of thin film transistor (TFT)
Be not in hump phenomenon in curve, the job stability of thin film transistor (TFT) is preferable.
The C-V characteristic and film of the prior art of the thin film transistor (TFT) provided below in conjunction with accompanying drawing the present invention
The C-V characteristic of transistor is contrasted.
Fig. 4 is the VA characteristic curve figure of the first conductive pattern and the second conductive pattern in the prior art；Fig. 5 is existing skill
The VA characteristic curve figure of thin film transistor (TFT) in art；As shown in Figure 4 and Figure 5, it is being applied with one on thin film transistor (TFT) shown in Fig. 1
After fixed gate source voltage, it is formed with the first conductive pattern in the first conducting channel, the second conductive pattern and is formed with the second conduction
Raceway groove.It should be noted that carrier in conductive pattern is moved to drain electrode 2 (or from drain electrode 2 by conducting channel from source electrode 1
It is moved to source electrode 1) distance of passing by is referred to as the conducting channel length of the conductive pattern.In the first conductive pattern, due to first
The wider width of conductive pattern, its shiftable haulage line is that (conducting channel is in song for curve when carrier is moved between source/drain electrode
Line), corresponding displacement is more than the conducting channel length Lmain of the distance between source/drain electrode L, i.e. the first conductive pattern
More than L；In the second conductive pattern, due to the narrower width of the second conductive pattern, when carrier is moved between source/drain electrode
Its shiftable haulage line is approximately straight line (conducting channel is linear), and corresponding displacement Lsub is approximately equal between source/drain electrode
The conducting channel length Lsub apart from L, i.e. the second conductive pattern be equal to L.As can be seen here, the first conductive pattern in the prior art
Conducting channel length Lmain be more than the second conductive pattern conducting channel length Lsub.Because first is conductive in the prior art
The channel length Lmain of raceway groove be more than the second conducting channel channel length Lsub, then be easily caused the second conducting channel prior to
First conducting channel is formed.Now, the corresponding threshold voltage of the second conductive pattern is less than the corresponding threshold value electricity of the first conductive pattern
Pressure.
When gate source voltage is equal to Vth2, the second conductive pattern conducting, now with the conductive pattern of increase second of gate source voltage
Electric current is raised in shape；When gate source voltage is increased to V2, the second conducting channel in the second conductive pattern reaches saturation state, this
When it is constant with electric current in the conductive pattern of increase second of gate source voltage.When gate source voltage is increased to Vth1, the first conductive pattern
Conducting, is now raised with electric current in the conductive pattern of increase second of gate source voltage；When gate source voltage is increased to V1, first is conductive
The first conducting channel in figure reaches saturation state, now constant with electric current in the conductive pattern of increase first of gate source voltage.
Visible by Fig. 5, in gate source voltage by during V2 is increased to Vth1, the base current of thin film transistor (TFT) is constant, film is brilliant
The job stability that hump phenomenon, i.e. thin film transistor (TFT) occurs in the VA characteristic curve of body pipe is poor.
Fig. 6 is the VA characteristic curve figure of the first conductive pattern and the second conductive pattern in the present invention, and Fig. 7 is in the present invention
The VA characteristic curve figure of thin film transistor (TFT), as shown in Figure 6 and Figure 7, in the thin film transistor (TFT) that the present invention is provided, due to second
The length of conductive pattern is more than the length of connection source electrode 1 and the shortest path of drain electrode 2 on the first conductive pattern, may be such that second leads
The conducting channel length Lsub of electrograph shape is more than the conducting channel length Lmain of the first conductive pattern, now, the second conductive pattern
Corresponding threshold voltage is more than the threshold voltage of the first conductive pattern, i.e., with the increase of gate source voltage, the first conductive pattern guide
It is logical, turned on after the second conductive pattern.It is visible by Fig. 5, when thin film transistor (TFT) is turned on and is in unsaturated state, film crystal
Electric current in pipe accordingly increases with the increase of gate source voltage, is not in hump phenomenon.
As can be seen here, compared to prior art, the job stability for the thin film transistor (TFT) that the present invention is provided is more preferably.
Preferably, it is zhou duicheng tuxing or centrosymmetric image not by the part of source electrode 1 and the covering of drain electrode 2 on active layer 3.
Now, the first conductive pattern is zhou duicheng tuxing or centrosymmetric image, and two the second conductive patterns are axisymmetricly or center pair
Claim.It is zhou duicheng tuxing or centrosymmetric image by the part for ensureing not covered by source electrode 1 and drain electrode 2 on active layer 3, can has
Effect ensures the stability of thin film transistor (TFT) work.
Specifically, it is shown in Figure 4, source electrode 1 and drain electrode 2 be tiltedly oppositely arranged (source electrode 1 towards drain electrode 2 a lateral edges and
Drain 2 lateral edges towards source electrode 1, both it is parallel but not just to), active layer 3 is shaped as rectangle, rectangular-shaped active layer 3
Two groups of opposite side in one group with source electrode 1 towards drain electrode 2 side edge-perpendicular, another group with source electrode 1 towards drain 2 side
Sides aligned parallel source electrode 1 covers a drift angle of active layer 3, and drain electrode 2 covers a drift angle of active layer 3, the drift angle that source electrode 1 is covered
Drift angle with the covering of drain electrode 2 is one group of vertical angles in rectangle.Now, symmetric figure centered on the first conductive pattern, two
Two conductive patterns are centrosymmetric, and the length of the second conductive pattern is more than connection source electrode 1 and drain electrode 2 on the first conductive pattern
The length of shortest path.
Fig. 8 is the structural representation for another thin film transistor (TFT) that the embodiment of the present invention one is provided, as shown in figure 8, and Fig. 4
In unlike, source electrode 1 is with drain electrode 2 just to setting in Fig. 8, and active layer 3 is shaped as parallelogram, and source electrode 1 covers active
One drift angle of layer 3, drain electrode 2 covers a drift angle of active layer 3, and the drift angle that source electrode 1 is covered and the drift angle of the covering of drain electrode 2 are flat
One group of vertical angles in row quadrangle.Now, symmetric figure centered on the first conductive pattern, two the second conductive pattern centers pair
Claim, and the length of the second conductive pattern is more than the length that source electrode 1 and the shortest path of drain electrode 2 are connected on the first conductive pattern.
Fig. 9 is the structural representation for another thin film transistor (TFT) that the embodiment of the present invention one is provided, as shown in figure 9, and Fig. 4
Unlike in Fig. 8, source electrode 1 is with drain electrode 2 just to setting in Fig. 9, and the edge of active layer 3 is convex, source electrode 1 and drain electrode 2
It is covered each by be arrangeding in parallel in active layer 3 and unequal two sides (upper edge and lower edge) of length.Now, first lead
Electrograph shape is zhou duicheng tuxing, and axisymmetricly, and to be more than first conductive for the length of the second conductive pattern for two the second conductive patterns
The length of source electrode 1 and the shortest path of drain electrode 2 is connected on figure.
It should be noted that source electrode 1 shown in above-mentioned Fig. 4, Fig. 8, Fig. 9, the shape of drain electrode 2 and the three of active layer 3 and
Position relationship only plays exemplary effect, and it will not produce to technical scheme and limit, source electrode 1, leakage in the present invention
Pole 2 and active layer 3 can also use other shapes and position relationship, no longer illustrate one by one herein.Those skilled in the art
It should be understood that can realize that the length of the second conductive pattern is more than connection source electrode 1 and drain electrode 2 on the first conductive pattern in every case
Source electrode 1, drain electrode 2 and the design of active layer 3 of the length of shortest path, all should belong to protection scope of the present invention.
In the present embodiment, alternatively, etching is not provided with above the part of source electrode 1 and the covering of drain electrode 2 on active layer 3
Barrier layer, the setting of etching barrier layer, active layer 3 is etched by mistake in the etching technics of source-drain electrode 2.
Figure 10 is a kind of structural representation for thin film transistor (TFT) that the embodiment of the present invention two is provided, as shown in Figure 10, and upper
Unlike stating in embodiment one, the quantity of active layer 3 is 2 or multiple in a thin film transistor (TFT) in the present embodiment.Thin
On the premise of the area of semiconductor layer needed for film transistor is certain, whole semiconductor layer is designed as by 2 or multiple only
Vertical active layer 3 is constituted, and the space between neighboring active layer 3 can effectively facilitate radiating, so as to lift thin film transistor (TFT) in work
Heat endurance during work.
Alternatively, the spacing between neighboring active layer 3 is 3um~15um.
It should be noted that the active layer 3 in Figure 10 only plays exemplary work using the situation of the active layer 3 in Fig. 9
With it will not produce limitation to technical scheme.
The embodiment of the present invention three provides a kind of gate driving circuit, specially GOA (Gate Driver On Array)
Circuit, the gate driving circuit includes thin film transistor (TFT), and the thin film transistor (TFT) is using in above-described embodiment one or embodiment two
Thin film transistor (TFT).
The embodiment of the present invention four provides a kind of display device, including thin film transistor (TFT), and the thin film transistor (TFT) is using above-mentioned
Thin film transistor (TFT) in embodiment one or embodiment two.Wherein, the example of the display device includes but is not limited to LCD
Plate, Electronic Paper, organic electroluminescence panel, mobile phone, tablet personal computer, television set, display, notebook computer, DPF, lead
Navigate any products or part with display function such as instrument.
Figure 11 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention five is provided, such as Figure 11 institutes
Show, the preparation method includes：
Step S101, the top formation active layer in underlay substrate, active layer include：Main graph and positioned at main graph
The ramp pattern of surrounding.
Step S102, source electrode and drain electrode are formed in the top of active layer, source electrode covers the subregion of active layer, and drain electrode is covered
Be stamped on the subregion of active layer, main graph is not the first conductive pattern, ramp pattern by the part of source electrode and drain electrode covering
Part between upper correspondence source electrode and drain electrode is the second conductive pattern, and the length of the second conductive pattern is more than on the first conductive pattern
Connect the length of source electrode and the shortest path of drain electrode.
Figure 12 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention six is provided, such as Figure 12 institutes
Show, the preparation method includes：
Step S201, grid and gate insulation layer are sequentially formed above underlay substrate.
In the present embodiment, by a patterning processes with the figure of the formation grid on underlay substrate.Then, by applying
Cover, magnetron sputtering or gas-phase deposition form one layer of gate insulation layer above grid.
It should be noted that the patterning processes in the present invention refer to include photoresist coating, exposure, development, etching, photoetching
The techniques such as glue stripping.
Step S202, the top formation active layer material film in gate insulation layer.
Can be thin in top one layer of active layer material of formation of gate insulation layer by coating, magnetron sputtering or gas-phase deposition
Film.Wherein, active layer material is metal oxide semiconductor material.
Step S203, the top correspondence predeterminable area formation etching barrier layer in active layer material film.
One layer of etch stopper in the top of gate insulation layer can be formed by coating, magnetron sputtering or gas-phase deposition first
Layer material film；Then a patterning processes are carried out to etching barrier layer materials film, to obtain etch stopper in predeterminable area
The figure of layer, the predeterminable area at least includes the source electrode not being subsequently formed on the active layer that is subsequently formed and drain electrode covered
Region.
Step S204, the top formation conductive material thin film in etching barrier layer and active layer material film.
Can be thin in the top formation layer of conductive material of gate insulation layer by coating, magnetron sputtering or gas-phase deposition
Film.Wherein, the conductive material is metal material.
Step S205, the top formation photoresist in conductive material thin film.
Step S206, using mask plate photoresist is exposed, development treatment, corresponding to source electrode to be formed and drain electrode
The photoresist in region is fully retained, and the photoresist of remaining position is removed completely.
Step S207, conductive material thin film and active layer material film are performed etching, conductive material thin film is located at photoetching
Part below glue is fully retained to obtain the figure of source electrode and drain electrode, and active layer material film is located at below photoresist and etching
Part below barrier layer is fully retained to obtain the figure of active layer.
Wherein, conductive material thin film and active layer material film are performed etching using wet-etching technology.
Step S208, to photoresist carry out lift-off processing.
It is that can obtain the film crystal in above-described embodiment one or embodiment two by above-mentioned steps S201~step S208
Pipe.
Figure 13 is a kind of flow chart of the preparation method for thin film transistor (TFT) that the embodiment of the present invention seven is provided, such as Figure 13 institutes
Show, the preparation method includes：
Step S301, grid and gate insulation layer are sequentially formed above underlay substrate.
Step S302, the top formation active layer material film in gate insulation layer.
Step S303, the top formation conductive material thin film in active layer material film.
Step S304, using intermediate tone mask plate photoresist is exposed, development treatment, corresponding to source electrode to be formed and
The photoresist in the region of drain electrode is fully retained, corresponding on default active layer not by source electrode and the light in the covered region of draining
Photoresist part retains, and the photoresist of remaining position is removed completely.
Step S305, conductive material thin film, active layer material film are performed etching, conductive material thin film and active layer material
The part that material film is located at below photoresist is fully retained, to obtain the figure of active layer.
Step S306, to photoresist carry out ashing processing, corresponding to source electrode and drain electrode region photoresist part retain,
Do not removed completely by the photoresist of source electrode and the covered region that drains corresponding to default on active layer.
Step S307, conductive material thin film is performed etching, the part that conductive material thin film is located at below photoresist is complete
Retain to obtain the figure of source electrode and drain electrode.
Step S308, to photoresist carry out lift-off processing.
It is that can obtain the film crystal in above-described embodiment one or embodiment two by above-mentioned steps S301~step S308
Pipe.
It is understood that the principle that embodiment of above is intended to be merely illustrative of the present and the exemplary implementation that uses
Mode, but the invention is not limited in this.For those skilled in the art, the essence of the present invention is not being departed from
In the case of refreshing and essence, various changes and modifications can be made therein, and these variations and modifications are also considered as protection scope of the present invention.
Claims (10)
1. a kind of thin film transistor (TFT), it is characterised in that including：Active layer, source electrode and drain electrode, the source electrode cover the active layer
Subregion, the drain electrode covers the subregion of the active layer；
The active layer includes：Not by institute on main graph and the ramp pattern around main graph, the main graph
The part for stating source electrode and drain electrode covering is the correspondence source electrode and the drain electrode on the first conductive pattern, the ramp pattern
Between part be the second conductive pattern；
The length of second conductive pattern, which is more than on first conductive pattern, connects the most short of the source electrode and the drain electrode
The length in path.
2. thin film transistor (TFT) according to claim 1, it is characterised in that not by the source electrode and described on the active layer
The part of drain electrode covering is zhou duicheng tuxing or centrosymmetric image.
3. thin film transistor (TFT) according to claim 1, it is characterised in that the source electrode is tiltedly oppositely arranged with the drain electrode,
The active layer is rectangle, and one group in two groups of opposite side of the rectangle is vertical towards a lateral edges of the drain electrode with the source electrode
Directly, another group with the source electrode towards the drain electrode side sides aligned parallel；
The source electrode covers a drift angle of the active layer, and the drain electrode covers a drift angle of the active layer, the source
The drift angle of pole covering and the drift angle of the drain electrode covering are one group of vertical angles in rectangle.
4. thin film transistor (TFT) according to claim 1, it is characterised in that the source electrode is with the drain electrode just to setting, institute
That states active layer is shaped as parallelogram；
The source electrode covers a drift angle of the active layer, and the drain electrode covers a drift angle of the active layer, the source
The drift angle of pole covering and the drift angle of the drain electrode covering are one group of vertical angles in parallelogram.
5. thin film transistor (TFT) according to claim 1, it is characterised in that the source electrode is with the drain electrode just to setting, institute
The edge for stating active layer is convex, the source electrode and the drain electrode be covered each by be arrangeding in parallel in the active layer and length not
Two equal sides.
6. thin film transistor (TFT) according to claim 1, it is characterised in that the active layer in the thin film transistor (TFT)
Quantity is 2 or multiple.
7. a kind of gate driving circuit, it is characterised in that including：Film crystal as described in any in above-mentioned claim 1-6
Pipe.
8. a kind of preparation method of thin film transistor (TFT), it is characterised in that including：
Active layer is formed in the top of underlay substrate, the active layer includes：Main graph and oblique around main graph
Slope figure；
Source electrode and drain electrode are formed in the top of the active layer, the source electrode covers the subregion of the active layer, the leakage
It is that pole, which covers the part that is not covered on the subregion of the active layer, the main graph by the source electrode and the drain electrode,
Part on one conductive pattern, the ramp pattern between the correspondence source electrode and the drain electrode is the second conductive pattern, described
The length of second conductive pattern is more than the length that the source electrode and the shortest path of the drain electrode are connected on first conductive pattern
Degree.
9. the preparation method of thin film transistor (TFT) according to claim 8, it is characterised in that form active layer, source electrode and leakage
The step of pole, specifically includes：
Active layer material film is formed in the top of underlay substrate；
In the top correspondence predeterminable area formation etching barrier layer of active layer material film, the predeterminable area at least includes described
Not by source electrode and the covered region that drains on active layer；
Conductive material thin film is formed in the top of the etching barrier layer and the active layer material film；
Photoresist is formed in the top of the conductive material thin film；
The photoresist is exposed using mask plate, development treatment, corresponding to source electrode to be formed and drain electrode region light
Photoresist is fully retained；
The conductive material thin film and active layer material film are performed etching, the conductive material thin film is located at below photoresist
Part be fully retained to obtain the figure of the source electrode and the drain electrode, the active layer material film is located at the photoresist
Part below lower section and the etching barrier layer is fully retained to obtain the figure of the active layer.
10. the preparation method of thin film transistor (TFT) according to claim 8, it is characterised in that form active layer, source electrode and leakage
The step of pole, specifically includes：
Active layer material film is formed in the top of underlay substrate；
Conductive material thin film is formed in the top of the active layer material film；
The photoresist is exposed using intermediate tone mask plate, development treatment, corresponding to source electrode to be formed and drain electrode area
The photoresist in domain is fully retained, corresponding on the default active layer not by source electrode and the photoresist in the covered region of draining
Part retains；
The conductive material thin film, the active layer material film are performed etching, the conductive material thin film and described active
The part that layer material film is located at below photoresist is fully retained, to obtain the figure of the active layer；
Ashing processing is carried out to the photoresist, retained corresponding to the photoresist part in source electrode and the region of drain electrode, corresponding to institute
State and default on active layer do not removed completely by the photoresist of source electrode and the covered region of draining；
The conductive material thin film is performed etching, the conductive material thin film be located at photoresist below part be fully retained with
Obtain the figure of the source electrode and the drain electrode.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1913177A (en) * | 2005-08-10 | 2007-02-14 | 三菱电机株式会社 | Thin film transistor and method of manufacturing the same |
| CN101236986A (en) * | 2007-02-02 | 2008-08-06 | 三星电子株式会社 | High voltage transistors and its production method |
| US20150380567A1 (en) * | 2014-06-27 | 2015-12-31 | Lg Display Co., Ltd. | Thin film transistor of display apparatus |
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2017
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1913177A (en) * | 2005-08-10 | 2007-02-14 | 三菱电机株式会社 | Thin film transistor and method of manufacturing the same |
| CN101236986A (en) * | 2007-02-02 | 2008-08-06 | 三星电子株式会社 | High voltage transistors and its production method |
| US20150380567A1 (en) * | 2014-06-27 | 2015-12-31 | Lg Display Co., Ltd. | Thin film transistor of display apparatus |
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