CN106997883A - Array base palte and display panel - Google Patents
Array base palte and display panel Download PDFInfo
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- CN106997883A CN106997883A CN201710257771.2A CN201710257771A CN106997883A CN 106997883 A CN106997883 A CN 106997883A CN 201710257771 A CN201710257771 A CN 201710257771A CN 106997883 A CN106997883 A CN 106997883A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Abstract
The embodiment of the invention discloses a kind of array base palte and display panel.The array base palte includes：Substrate；It is arranged at the first inorganic layer on substrate；It is arranged at multiple thin film transistor (TFT)s on the first inorganic layer；Wherein, thin film transistor (TFT) includes the second inorganic layer and the 3rd inorganic layer being stacked；Between two neighboring thin film transistor (TFT), at least one is provided with through the first inorganic layer and the first groove of the second inorganic layer；Between thin film transistor (TFT) and the first groove, at least one second groove for running through the 3rd inorganic layer is provided with；Between first groove and the second groove of thin film transistor (TFT) the same side, first inorganic layer sets the same side of thin film transistor (TFT) to be provided with the first organic layer away from the side of substrate, the second inorganic layer on the side of the first inorganic layer or substrate, and the 3rd inorganic layer covers the first organic layer and the first groove.The stress that display panel is subject to when the array base palte and display panel that the present invention is provided can reduce bending.
Description
Technical field
The present embodiments relate to array base palte manufacturing technology, more particularly to a kind of array base palte and display panel.
Background technology
Organic light emitting display (Organic light Emitting Display), due to its have be not required to backlight, it is right
Than spending the technological merits such as high, thickness of thin, visual angle be wide and reaction speed is fast, have broad application prospects.Wherein, it is flexible organic
Light emitting display panel has become one of emphasis direction of display industry development.
It is laid with existing flexible organic electroluminescence display panel for driving the luminous image element circuit of luminescence unit.Pixel
Circuit includes multiple thin film transistor (TFT)s.The multilayer inorganic layer being stacked often occurs between thin film transistor (TFT).Curved
It is tight along inorganic layer bearing of trend stress accumulation because the adhesion between the adjacent two layers inorganic layer that is stacked is very big during folding
Weight, this can cause display panel to be damaged during bending.
The content of the invention
The present invention provides a kind of array base palte and display panel, the stress that display panel is subject to when reducing bending to realize
Purpose.
In a first aspect, the embodiments of the invention provide a kind of array base palte, the array base palte includes：
Substrate；
It is arranged at the first inorganic layer on the substrate；
It is arranged at multiple thin film transistor (TFT)s on first inorganic layer；
Wherein, the thin film transistor (TFT) includes the second inorganic layer and the 3rd inorganic layer being stacked；In two neighboring institute
State between thin film transistor (TFT), be provided with least one through first inorganic layer and the first groove of second inorganic layer；
Between the thin film transistor (TFT) and first groove, at least one is provided with through the second recessed of the 3rd inorganic layer
Groove；Between first groove and second groove of described thin film transistor (TFT) the same side, first inorganic layer deviates from
The side of the substrate, second inorganic layer set the film on the side of first inorganic layer or the substrate
The same side of transistor is provided with the first organic layer, and the 3rd inorganic layer covers first organic layer and described first recessed
Groove.
Second aspect, the embodiment of the present invention additionally provides a kind of display panel, and the display panel includes the embodiment of the present invention
Any one array base palte provided.
The embodiment of the present invention is by between two neighboring thin film transistor (TFT), being provided with least one through the first inorganic layer
With the first groove of the second inorganic layer；Between thin film transistor (TFT) and the first groove, at least one is provided with inorganic through the 3rd
Second groove of layer；Between first groove and second groove of described thin film transistor (TFT) the same side, described first
Inorganic layer is set away from the side of the substrate, second inorganic layer on the side of first inorganic layer or the substrate
The first organic layer is equipped with, the 3rd inorganic layer covers first organic layer and first groove, solved existing aobvious
Show that the adhesion between the adjacent two layers inorganic layer that panel is stacked in bending in display panel is excessive, along inorganic during bending
Layer bearing of trend stress accumulation is serious, the problem of fragile display panel, and realize that display panel when reducing bending is subject to should
The purpose of power.
Brief description of the drawings
Fig. 1 a are a kind of structural representation of array base palte provided in an embodiment of the present invention；
Array base when Fig. 1 b do not make the first organic layer and three inorganic layers in Fig. 1 a to make during array base palte
The structural representation of plate；
Fig. 2 is the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 3 is the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 4 is the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 5 a are the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 5 b are formed after the first organic layer to make in Fig. 5 a during array base palte, when not forming three inorganic layers,
The structural representation of array base palte；
Fig. 6 a are the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 6 b form the structural representation of array base palte before the first organic layer to make during array base palte in Fig. 6 a；
Fig. 7 a are the structural representation of another array base palte provided in an embodiment of the present invention；
Fig. 7 b form the structural representation of array base palte before the first organic layer to make during array base palte in Fig. 7 a；
Fig. 8 a are the embodiments of the invention provide the structural representation of another array base palte；
Array base when Fig. 8 b do not make the first organic layer and three inorganic layers in Fig. 8 a to make during array base palte
The structural representation of plate；
Fig. 9 is the embodiments of the invention provide the structural representation of another array base palte；
Figure 10 is the structural representation of another array base palte provided in an embodiment of the present invention；
Figure 11 is the structural representation of another array base palte provided in an embodiment of the present invention；
Figure 12 a are the structural representation of the regional area of pixel cell on array base palte provided in an embodiment of the present invention；Figure
12b is the cross-sectional view of the B1-B2 along along Figure 12 a；
Figure 13 is a kind of structural representation of display panel provided in an embodiment of the present invention；
Figure 14 is a kind of flow chart of array substrate manufacturing method provided in an embodiment of the present invention.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
The embodiments of the invention provide a kind of array base palte.The array base palte includes：Substrate；It is arranged at first on substrate
Inorganic layer；It is arranged at multiple thin film transistor (TFT)s on the first inorganic layer；Wherein, thin film transistor (TFT) includes the second nothing being stacked
Machine layer and the 3rd inorganic layer；Between two neighboring thin film transistor (TFT), at least one is provided with through the first inorganic layer and second
First groove of inorganic layer；Between thin film transistor (TFT) and the first groove, at least one is provided with through the of the 3rd inorganic layer
Two grooves；Between first groove and the second groove of thin film transistor (TFT) the same side, the first inorganic layer deviates from substrate side, second
Inorganic layer sets the same side of thin film transistor (TFT) to be provided with the first organic layer on the side of first inorganic layer or substrate,
3rd inorganic layer covers the first organic layer and the first groove.
The embodiment of the present invention is by between two neighboring thin film transistor (TFT), being provided with least one through the first inorganic layer
With the first groove of the second inorganic layer；Between thin film transistor (TFT) and the first groove, at least one is provided with inorganic through the 3rd
Second groove of layer；Between first groove and the second groove of thin film transistor (TFT) the same side, the first inorganic layer is away from substrate
Side, the second inorganic layer set the same side of thin film transistor (TFT) to be provided with first on the side of the first inorganic layer or substrate to be had
Machine layer, the 3rd inorganic layer covers the first organic layer and the first groove, solves existing display panel display panel in bending
In adhesion between the adjacent two layers inorganic layer that is stacked it is excessive, it is tight along inorganic layer bearing of trend stress accumulation during bending
The problem of weight, fragile display panel, realize the purpose of the stress that display panel is subject to when reducing bending.
Fig. 1 a are a kind of structural representation of array base palte provided in an embodiment of the present invention, and Fig. 1 b are array in making Fig. 1 a
Structural representation when the first organic layer and three inorganic layers is not made during substrate.Referring to Fig. 1 a and Fig. 1 b, the array
Substrate includes：Substrate 10；It is arranged at the first inorganic layer 11 on substrate 10；The multiple films being arranged on the first inorganic layer 11 are brilliant
Body pipe 20 (exemplarily includes two thin film transistor (TFT)s 20) in Fig. 1 a；Wherein, thin film transistor (TFT) 20 includes the be stacked
Two inorganic layers 12 and the 3rd inorganic layer 13；Between two neighboring thin film transistor (TFT) 20, at least one is provided with through the first nothing
First groove 14 (first groove 14 is exemplarily only provided with Fig. 1 b) of machine layer 11 and the second inorganic layer 12；In film
Between the groove 14 of transistor 20 and first, the second groove 15 for being provided with least one through the 3rd inorganic layer 13 (shows in Fig. 1 a
Only it is provided with second groove 15 to example property)；The same side of thin film transistor (TFT) 20 the first groove 14 and the second groove 15 it
Between, the second inorganic layer 12 is provided with the first organic layer 16, the 3rd inorganic layer 13 covering first away from the side of the first inorganic layer 11
The groove 14 of organic layer 16 and first.
, can be with by setting the first groove 14 on the first inorganic layer 11 and the second inorganic layer 12 in above-mentioned technical proposal
Reach in bending, weaken build-up effect of the stress on first inorganic layer 11 (or second inorganic layer 12) bearing of trend, improve
The purpose of the bendable folding endurance of display panel.Similarly, by setting the second groove 15 on the 3rd inorganic layer 13, it can reach
During bending, weaken build-up effect of the stress on the bearing of trend of the 3rd inorganic layer 13, improve the mesh of the bendable folding endurance of display panel
, in addition, the first groove 14 and the second groove 15 can also stop Crack Extension, prevent array base palte from failing.
With continued reference to Fig. 1 a, the second nothing between first groove 14 and the second groove 15 of the same side of thin film transistor (TFT) 20
Machine layer 12 is provided with the first organic layer 16, the 3rd inorganic layer 13 covering He of the first organic layer 16 away from the side of the first inorganic layer 11
First groove 14.The essence so set be by the first organic layer 16 be arranged at the 3rd inorganic layer 13 and the second inorganic layer 12 it
Between, to reduce the contact area that the 3rd inorganic layer 13 and the second inorganic layer 12 are directly contacted, further weaken when bending the 3rd
Stress accumulation effect on the inorganic layer 12 of inorganic layer 13 and second, improves the bendable folding endurance of display panel.
In specific set, alternatively, as shown in Figure 1a, the second inorganic layer 12 is set away from the side of the first inorganic layer 11
There is the first organic layer 16, the 3rd inorganic layer 13 covers the surface and edge that the first organic layer 16 deviates from substrate 10, and the
One organic layer 16 is located at the 3rd inorganic layer 13 in the range of the upright projection of substrate 10 in the upright projection of substrate 10.Due to organic
Light emitting display panel is easily corroded by the water vapour in air and oxygen, causes the display effect of display panel to be deteriorated.With organic material
Material is compared, many strong to the obstructing capacity of water vapour and oxygen of inorganic material.So setting to cause, in the first organic layer 16
Edge, there is direct contact portion, and the second inorganic layer 12 between the 3rd inorganic layer 13 and the second inorganic layer 12
And first have direct contact portion between inorganic layer 11, i.e., around first groove 14, the first inorganic layer 11, the second inorganic layer
12 and the 3rd inorganic layer 13 formed by way of regional area is directly contacted a barrier layer A being made up of inorganic material (figure
Overstriking dotted line represents the equivalent position of barrier layer in 1a).Barrier layer A can obstruct water vapour and oxygen in air well
In display panel being entered from the side of substrate 10, it is to avoid the bad phenomenon that the component in display panel is corroded occurs.
In Fig. 1 b, between two neighboring thin film transistor (TFT) 20, width n of first groove 14 on the first inorganic layer 11 and
Width m sizes on the second inorganic layer 12 are identical, i.e. side wall and first groove of the first groove 14 on the first inorganic layer 11
The 14 side wall on the second inorganic layer 12 is concordant.This is only the specific example of the present invention, rather than limitation of the present invention.
During actual setting, alternatively, as shown in Fig. 2 setting width n of first groove 14 on the first inorganic layer 11 to be more than in the second nothing
Width m on machine layer 12, the i.e. projection of the first inorganic layer 11 on the substrate 10 is located at the throwing of the second inorganic layer 12 on the substrate 10
In shadow；Or as shown in figure 3, set width m of first groove 14 on the second inorganic layer 12 to be more than on the first inorganic layer 11
Width n, i.e. the second inorganic layer 12 on the substrate 10 projection be located at the projection of the first inorganic layer 11 on the substrate 10 in.Due to
During actual fabrication, the limitation of the factor such as accuracy of instrument and mask plate alignment situation, in fact it could happen that a certain on array base palte
Individual or several film layers or the actual setting position of the first groove 14 and its preplan set location and there is a certain degree of deviation.
Now can be by adjusting width m and first groove 14 of first groove 14 on the second inorganic layer 12 on the first inorganic layer 11
Width n so that the first groove 14 is away from the metal level on array base palte, to prevent because the first groove 14 is apart from metal level mistake
Closely, open circuit or short circuit are caused, the product yield and performance of array base palte is influenceed.
Further, the angle α and the first groove of side wall of first groove 14 on the first inorganic layer 11 and substrate 10
The angle β of the 14 side wall on the second inorganic layer 12 and substrate 10 can be any angle more than 0 °, and less than 180 °.And
And, the angle α and the first groove 14 of side wall of first groove 14 on the first inorganic layer 11 and substrate 10 are in the second inorganic layer 12
On the angle β of side wall and substrate 10 can be with equal, can also be unequal.Exemplarily, in Fig. 4, the first groove 14 is first
Side wall on inorganic layer 11 with the angle α of substrate 10 is more than 90 °, side wall and base of first groove 14 on the second inorganic layer 12
The angle β of plate 10 is 90 °.Similarly, during due to actual fabrication, the factor such as accuracy of instrument and mask plate alignment situation
Limitation, in fact it could happen that the actual setting position of some or several film layers or the first groove 14 preplans with it on array base palte
There is a certain degree of deviation in set location.Now can be by adjusting side wall and base of first groove on the first inorganic layer 11
The angle β of the side wall of the angle α of plate 10 and the first groove 14 on the second inorganic layer 12 and substrate 10 so that the first groove 14
Away from the metal level on array base palte, to prevent because the first groove 14 is excessively near apart from metal level, causing open circuit or short circuit, influenceing battle array
The product yield and performance of row substrate.
In the above-mentioned technical solutions, the first organic layer 16 fill the first groove 14 this be only the present invention one specifically show
Example, rather than limitation of the present invention, specifically, it is possible to use inorganic material fills the first groove 14, such as utilizes the 3rd inorganic layer
13 the first grooves 14 of filling.
Fig. 5 a are the structural representation of another array base palte provided in an embodiment of the present invention, and Fig. 5 b are battle array in making Fig. 5 a
Formed during row substrate after the first organic layer, when not forming three inorganic layers, the structural representation of array base palte.With it is above-mentioned
The array base palte provided in technical scheme is compared, and the array base palte provided in Fig. 5 a and Fig. 5 b is provided with the first organic layer
One hole, the 3rd inorganic layer passes through the first hole and the second inorganic layer formation barrier layer.Specifically, referring to Fig. 5 a and Fig. 5 b,
Between first groove and the second groove of thin film transistor (TFT) the same side, the first organic layer 16 is arranged on the second inorganic layer 12 away from base
The side of plate 10, and the first organic layer 16 is provided with least one first hole 161, the 3rd inorganic layer 13 covers the first organic layer
16, and the first hole 161 is filled, and the 3rd inorganic layer 13 is contacted by the first hole 161 with the second inorganic layer 12.Referring to figure
5b, the first hole 161 is arranged at the relative both sides of the first groove 14, this be only the present invention a specific example rather than to this hair
Bright limitation.In specific set, the first hole 161 can also be arranged to the either side of the first groove 14.
Similarly, referring to Fig. 5 a, so setting to cause, the 3rd inorganic layer 13 passes through the first hole 161 and the second nothing
The directly contact of machine layer 12, and there is direct contact portion in the second inorganic layer 12 and the first inorganic layer 11, i.e., first recessed around this
Groove 14, the first inorganic layer 11, the second inorganic layer 12 and the 3rd inorganic layer 13 locally directly contact by way of formed one by
The barrier layer A that inorganic material is constituted.Barrier layer A can obstruct water vapour and oxygen in air well from the side of substrate 10
Enter in display panel, it is to avoid the bad phenomenon that the component in display panel is corroded is produced.
Similarly, the first groove 14 can be filled from the first organic layer 16, inorganic material filling first can also be utilized
Groove 14, such as fills the first groove 14 using the 3rd inorganic layer 13.
Alternatively, the width d of the first hole 161 is less than or equal to 5 μm.The benefit so set is, due to the first hole
161 width d very littles, the contact area that the 3rd inorganic layer 13 is directly contacted by the first hole 161 and the second inorganic layer 12 compared with
It is small so that the adhesion between the 3rd inorganic layer 13 and the second inorganic layer 12 that are stacked is small, when can reach weakening bending
The purpose of stress accumulation effect on the 3rd inorganic layer 13 and the second inorganic layer 12.In addition, by setting the first hole 161,
The 3rd inorganic layer 13 can be caused directly to be contacted with the second inorganic layer 12, and then barrier layer A is collectively formed with the first inorganic layer 11,
To obstruct during water vapour and oxygen in air enter display panel from the side of substrate 10, it is to avoid the component in display panel
The bad phenomenon being corroded is produced.Further, it is contemplated that existing manufacture craft situation, alternatively, the width of the first hole 161
Can be more than or equal to by spending d by 3 μm, and less than or equal to 5 μm.
Fig. 6 a are the structural representation of another array base palte provided in an embodiment of the present invention.Fig. 6 b are battle array in making Fig. 6 a
The structural representation of array base palte before the first organic layer is formed during row substrate.With the array provided in above-mentioned technical proposal
Substrate is compared, and Fig. 6 a are different with the set location of the first organic layer in the array base palte provided in Fig. 6 b.Specifically, referring to Fig. 6 a
With Fig. 6 b, between first groove and the second groove of thin film transistor (TFT) the same side, the first inorganic layer 11 deviates from the one of substrate 10
Side is provided with the first organic layer 16；At least one second hole for running through the second inorganic layer 12 is provided with second inorganic layer 12
121, the first organic layer 16 fills the second hole 121, and the 3rd inorganic layer 13 covers the first organic layer 16 and the second hole 121 weeks
The second inorganic layer 12 enclosed.Similarly, referring to Fig. 6 b, the second hole 121 is arranged at the relative both sides of the first groove 14, and this is only
The specific example rather than limitation of the present invention of the present invention.In specific set, the second hole 121 can also be arranged at
The either side of first groove 14.
With continued reference to Fig. 6 a and Fig. 6 b, the second hole 121 is included positioned at the side wall of the second inorganic layer 12 and positioned at first
The bottom surface of inorganic layer 11, the second inorganic layer 12 and the second hole between the 3rd inorganic layer 13 and two neighboring second hole 121
The second inorganic layer 12 between hole 121 and the first groove 14 is directly contacted, around the first groove 14, the second inorganic layer 12 and
One inorganic layer 11 is directly contacted, i.e., around first groove 14, the first inorganic layer 11, the second inorganic layer 12 and the 3rd inorganic layer 13
A barrier layer A being made up of inorganic material is formed by way of locally directly contacting.Barrier layer A can be obstructed well
During water vapour and oxygen in air enter display panel from the side of substrate 10, it is to avoid the component in display panel is corroded
Bad phenomenon produce.
Similarly, the first groove 14 can be filled from the first organic layer 16, inorganic material filling first can also be utilized
Groove 14, such as utilizes the 3rd the first groove 14 of inorganic 13 filling.
Fig. 7 a are the structural representation of another array base palte provided in an embodiment of the present invention.Fig. 7 b are battle array in making Fig. 7 a
The structural representation of array base palte before the first organic layer is formed during row substrate.With the array base provided in Fig. 6 a and Fig. 6 b
Plate is compared, and the second hole through the second inorganic layer also extends through the first inorganic layer.It is same in thin film transistor (TFT) referring to Fig. 7 a and Fig. 7 b
Between the first groove and the second groove of side, the first organic layer 16 is provided with substrate 10, the first organic layer 16 and film are brilliant
Body pipe 20 is located at the same side of substrate 10；At least one is provided with second inorganic layer 12 and the first inorganic layer 11 through the second nothing
Second hole 121 of machine layer 12 and the first inorganic layer 11, the first organic layer 16 fills the second hole 121, and the 3rd inorganic layer 13 covers
The second inorganic layer 12 around lid the first organic layer 16 and the second hole 161.
So setting to cause, the second hole 121 is including the side wall positioned at the first inorganic layer 11, positioned at the second inorganic layer
12 side wall, and the bottom surface on substrate 10.The second nothing between 3rd inorganic layer 13 and two neighboring second hole 121
The second inorganic layer 12 between machine layer 12 and the second hole 121 and the first groove 14 is directly contacted.Around the first groove 14,
Second inorganic layer 12 is directly contacted with the first inorganic layer 11.Surround first groove 14, the first inorganic layer 11, the second inorganic layer
12 and the 3rd inorganic layer 13 locally directly contact by way of form a barrier layer A being made up of inorganic material.The barrier
During the water vapour and oxygen that layer A can be obstructed in air well enter display panel from the side of substrate 10, it is to avoid display surface
The bad phenomenon that component in plate is corroded is produced.
Similarly, the first groove 14 can be filled from the first organic layer 16, inorganic material filling first can also be utilized
Groove 14, such as utilizes the 3rd the first groove 14 of inorganic 13 filling.
Fig. 8 a are the embodiments of the invention provide the structural representation of another array base palte.Fig. 8 b are battle array in making Fig. 8 a
Structural representation when the first organic layer and three inorganic layers is not made during row substrate.Compared with above-mentioned technical proposal,
The array base palte provided in Fig. 8 a and Fig. 8 b is provided with least two inorganic through first between two neighboring thin film transistor (TFT)
The first groove (exemplarily including two the first grooves 14 in Fig. 8 a and Fig. 8 b) of layer and the second inorganic layer.Specifically, referring to
Fig. 8 a and Fig. 8 b, around each the first groove 14, the first inorganic layer 11, the second inorganic layer 12 and the 3rd inorganic layer 13 pass through office
The mode that portion is directly contacted forms a barrier layer A being made up of inorganic material, and barrier layer A is corresponded with the first groove 14.
Or, such as Fig. 9, around the first all grooves 14, the first inorganic layer 11, the second inorganic layer 12 and the 3rd inorganic layer 13 pass through office
The mode that portion is directly contacted forms a barrier layer A being made up of inorganic material.
In the above-mentioned technical solutions, the material of the first organic layer 16 can be any organic material, and alternatively, first is organic
The material of layer 16 is at least one of PEN, polyethylene terephthalate and polyimides.
Further, when considering actual design referring to Figure 10, if thin film transistor (TFT) 20 deviates from the side of the first groove 14
Extremely close to the excessive apart from D of the edge of the first groove 14 of the second groove 15, although the first groove 14 is provided with array base palte
With the second groove 15, direct contact surface product is excessive between the first inorganic layer 11 and the second inorganic layer 12 on array base palte, still not
Stress accumulation effect during beneficial to weakening bending on the first inorganic layer 11 and the second inorganic layer 12.Therefore, alternatively, setting thin
Film transistor 20 is away from the side of the first groove 14 to being less than apart from D or wait close to the edge of the first groove 14 of the second groove 15
In 10 times of the thickness of the flexible display apparatus including the array base palte.So set when can effectively weaken bending in the first nothing
Stress accumulation effect on machine layer 11 and the second inorganic layer 12, improves the flexibility of array base palte.
With continued reference to Figure 10, the thin film transistor (TFT) 20 is top gate structure.The top-grate structure thin film transistor 20 includes：Set
Active layer 21 on the first inorganic layer 11, active layer includes source region 22 and drain region 23；It is arranged on the second nothing on active layer 21
Machine layer 12；It is arranged on the grid layer 24 on the second inorganic layer 12；It is arranged on the 3rd nothing on the inorganic layer 12 of grid layer 24 and second
The 3rd hole 25 and the 4th hole of the 3rd inorganic layer 13 and the second inorganic layer 12 are provided through on machine layer 13, the 3rd inorganic layer 13
Hole 26, the 3rd hole 25 exposes source region 22, and the 4th hole 26 exposes drain region 23；It is arranged on the He of source electrode 27 on the 3rd inorganic layer 13
Drain electrode 28, source electrode 27 is connected by the 3rd hole 25 with source region 22, and drain electrode 28 is connected by the 4th hole 26 with drain region 23.This is only
It is the specific example of the present invention, rather than limitation of the present invention.In actual fabrication, the thin film transistor (TFT) 20 can also be
Bottom grating structure.
Figure 11 is the structural representation of another array base palte provided in an embodiment of the present invention.Referring to Figure 11, the array base
Thin film transistor (TFT) 20 is bottom grating structure in plate, and the thin film transistor (TFT) 20 includes：It is arranged on the upper grid layer of the first inorganic layer 11
24；It is arranged on the second inorganic layer 12 on grid layer 24；The active layer 21 on the second inorganic layer 12 is arranged on, active layer 21 includes
Source region 22 and drain region 23；It is arranged on the 3rd inorganic layer 13 on active layer 21, the 3rd inorganic layer 13 and is provided through the 3rd nothing
The 3rd hole 25 and the 4th hole 26 of machine layer 13, the 3rd hole 25 expose source region 22, and the 4th hole 26 exposes drain region 23；Set
Source electrode 27 and drain electrode 28 on the 3rd inorganic layer 13, source electrode 27 is connected by the 3rd hole 25 with source region 22, and drain electrode 28 passes through
4th hole 26 is connected with drain region 23.
In above-mentioned each technical scheme, the shape of the first groove 14 and/or the second groove 15 can have any shape, such as bar
Shape or polyline shaped etc..
In addition, in above-mentioned each technical scheme, setting the bearing of trend of the first groove 14 and the second groove 15 and film brilliant
The bearing of trend of source electrode 27 and the line of drain electrode 28 is vertical in body pipe 20, and this is only the specific example of the present invention, rather than right
The limitation of the present invention.In actual setting, bearing of trend and the source in thin film transistor (TFT) 20 of the first groove 14 and the second groove 15
The bearing of trend of the line of pole 27 and drain electrode 28 can be in any angle.
Further, it is contemplated that array base palte also includes the scan line extended in a first direction, and prolongs in a second direction
The data wire stretched, the first groove and/or the second groove of strip can be identical with the bearing of trend of scan line or data wire；First
Direction intersects with second direction.Figure 12 a are the knot of the regional area of pixel cell on array base palte provided in an embodiment of the present invention
Structure schematic diagram, Figure 12 b are the cross-sectional view of the B1-B2 along along Figure 12 a.Exemplarily, such as Figure 12 a and Figure 12 b, array base
Plate includes the scan line 31 of (X-direction in Figure 12 a) extension in the first direction, and in a second direction (Y direction in Figure 12 a)
The data wire 32 of extension, and thin film transistor (TFT) 20 (thin film transistor (TFT) 20 is illustrate only in Figure 12 a).Thin film transistor (TFT) 20
Including grid 24 and active layer 21.Strip the first groove 14 and the second groove 15 are provided with the side of thin film transistor (TFT) 20,
(Y direction in Figure 12 a) extends in a second direction for first groove 14 and the second groove 15.So be conducive to the shape on array base palte
Into the first groove and the second groove of large-size, the difficulty of technique making is advantageously reduced.
It should be noted that in design, the development length of the first groove 14 and the second groove 15 can with it is identical can not
Together, specifically can be depending on the actual laying situation according to image element circuit.As in Figure 12 a, the first groove 14 and the second groove 15 exist
Development length in second direction (Y direction in Figure 12 a) is different.
The embodiment of the present invention additionally provides a kind of display panel.Figure 13 is a kind of display panel provided in an embodiment of the present invention
Structural representation, referring to Figure 13, the display panel 101 includes any one array base palte 201 provided in an embodiment of the present invention.
The display panel 101 can be liquid crystal display panel or organic electroluminescence display panel.The display panel 101 is specifically as follows hand
Information enquiry machine of machine, notebook computer, intelligent wearable device and saloon etc..
Array base palte in display panel provided in an embodiment of the present invention by between two neighboring thin film transistor (TFT), if
At least one is equipped with through the first inorganic layer and the first groove of the second inorganic layer；Between thin film transistor (TFT) and the first groove,
It is provided with least one second groove for running through the 3rd inorganic layer；The first groove and the second groove in thin film transistor (TFT) the same side
Between, the first inorganic layer sets film away from the side of substrate, the second inorganic layer on the side of the first inorganic layer or substrate
The same side of transistor is provided with the first organic layer, and the 3rd inorganic layer covers the first organic layer and the first groove, solved existing
Adhesion of the display panel in bending in display panel between the adjacent two layers inorganic layer that is stacked it is excessive, edge during bending
Inorganic layer bearing of trend stress accumulation is serious, the problem of fragile display panel, when realizing reduction bending display panel by
Stress purpose.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of preparation method of array base palte.Figure 14 is this
A kind of flow chart for array substrate manufacturing method that inventive embodiments are provided.Referring to Figure 14, the preparation method bag of the array base palte
Include：
S110, offer underlay substrate；
S120, the first inorganic layer is formed on underlay substrate.
S130, multiple thin film transistor (TFT)s are formed on the first inorganic layer.
Wherein, thin film transistor (TFT) includes the second inorganic layer and the 3rd inorganic layer being stacked；Forming thin film transistor (TFT)
While, in addition to：Between two neighboring thin film transistor (TFT), at least one is set to run through the first inorganic layer and the second inorganic layer
The first groove；Between thin film transistor (TFT) and the first groove, the second groove for setting at least one to run through the 3rd inorganic layer；
Between first groove and the second groove of thin film transistor (TFT) the same side, the first inorganic layer is away from the side of substrate, the second inorganic layer
The same side of thin film transistor (TFT) is set to be provided with the first organic layer, the 3rd inorganic layer on the side of the first inorganic layer or substrate
Cover the first organic layer and the first groove.
In display panel provided in an embodiment of the present invention, array base palte by between two neighboring thin film transistor (TFT), if
At least one is equipped with through the first inorganic layer and the first groove of the second inorganic layer；Between thin film transistor (TFT) and the first groove,
It is provided with least one second groove for running through the 3rd inorganic layer；The first groove and the second groove in thin film transistor (TFT) the same side
Between, the first inorganic layer sets film away from the side of substrate, the second inorganic layer on the side of the first inorganic layer or substrate
The same side of transistor is provided with the first organic layer, and the 3rd inorganic layer covers the first organic layer and the first groove, solved existing
Adhesion of the display panel in bending in display panel between the adjacent two layers inorganic layer that is stacked it is excessive, edge during bending
Inorganic layer bearing of trend stress accumulation is serious, the problem of fragile display panel, when realizing reduction bending display panel by
Stress purpose.
In this step, the thin film transistor (TFT) formed can be top-grate structure thin film transistor, or bottom grating structure
Thin film transistor (TFT).
If forming top-grate structure thin film transistor, this step can include in specific perform：The shape on the first inorganic layer
Into active layer, active layer includes source region and drain region；The second inorganic layer is formed on active layer；Grid is formed on the second inorganic layer
Layer；The 3rd inorganic layer is formed on grid layer and the second inorganic layer, the 3rd inorganic layer and the are provided through on the 3rd inorganic layer
3rd hole of two inorganic layers and the 4th hole, the 3rd hole expose drain region source region exposure and the 4th hole；In the 3rd nothing
Machine layer forms source electrode and drain electrode, and source electrode is connected by the 3rd hole with source region, and drain electrode is connected by the 4th hole with drain region.
If forming bottom grating structure thin film transistor (TFT), this step can include in specific perform：The shape on the first inorganic layer
Into grid layer；The second inorganic layer is formed on grid layer；Active layer is formed on the second inorganic layer, active layer includes source region and leakage
Area；The 3rd inorganic layer is formed on active layer, the of the 3rd inorganic layer and the second inorganic layer is provided through on the 3rd inorganic layer
Three holes and the 4th hole, the 3rd hole expose drain region source region exposure and the 4th hole；In the 3rd inorganic layer formation source electrode
And drain electrode, source electrode is connected by the 3rd hole with source region, and drain electrode is connected by the 4th hole with drain region.
On the basis of above-mentioned technical proposal, during multiple thin film transistor (TFT)s are formed on the first inorganic layer, in shape
Into after the second inorganic layer, alternatively, in the first groove vicinity, the second inorganic layer forms first away from the side of the first inorganic layer
Organic layer；On the first organic layer formed the 3rd inorganic layer, the 3rd inorganic layer cover the first organic layer away from substrate surface with
And edge, so that the first organic layer is located at upright projection scope of the 3rd inorganic layer in substrate in the upright projection of substrate
It is interior.
Or, alternatively, during multiple thin film transistor (TFT)s are formed on the first inorganic layer, forming the second inorganic layer
Afterwards, in the first groove vicinity, the second inorganic layer forms the first organic layer away from the side of the first inorganic layer, in the first organic layer
At least one first hole is set；The 3rd inorganic layer is formed on the first organic layer, the 3rd inorganic layer covers the first organic layer, and
The first hole is filled, and the 3rd inorganic layer is contacted by the first hole with the second inorganic layer.
Or, alternatively, during multiple thin film transistor (TFT)s are formed on the first inorganic layer, forming the second inorganic layer
Afterwards, the second hole through the second inorganic layer is formed on the second inorganic layer；Deviate from the side shape of substrate in the first inorganic layer
Into the first organic layer, the first organic layer fills the second hole；In the second inorganic layer the 3rd is formed away from the side of the first inorganic layer
Inorganic layer, the 3rd inorganic layer covers the second inorganic layer around the first organic layer and the second hole.
Or, alternatively, during multiple thin film transistor (TFT)s are formed on the first inorganic layer, forming the second inorganic layer
Afterwards, the second hole for running through the second inorganic layer and the first inorganic layer is set on the second inorganic layer and the first inorganic layer；In substrate
Upper the same side for setting thin film transistor (TFT) sets the first organic layer, and the first organic layer fills the second hole；In the second inorganic layer back of the body
Side from the first inorganic layer forms the 3rd inorganic layer, and the 3rd inorganic layer covers the around the first organic layer and the second hole
Two inorganic layers.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment here, can carry out for a person skilled in the art it is various it is obvious change, again
Adjustment and replacement are without departing from protection scope of the present invention.Therefore, although by above example the present invention has been carried out compared with
For detailed description, but the present invention is not limited only to above example, without departing from the inventive concept, can be with
Including other more equivalent embodiments, and the scope of the present invention is determined by scope of the appended claims.
Claims (16)
1. a kind of array base palte, it is characterised in that including：
Substrate；
It is arranged at the first inorganic layer on the substrate；
It is arranged at multiple thin film transistor (TFT)s on first inorganic layer；
Wherein, the thin film transistor (TFT) includes the second inorganic layer and the 3rd inorganic layer being stacked；Two neighboring described thin
Between film transistor, at least one is provided with through first inorganic layer and the first groove of second inorganic layer；Institute
State between thin film transistor (TFT) and first groove, be provided with least one second groove for running through the 3rd inorganic layer；
Between first groove and second groove of described thin film transistor (TFT) the same side, first inorganic layer deviates from the base
The side of plate, second inorganic layer are provided with the first organic layer on the side of first inorganic layer or the substrate,
3rd inorganic layer covers first organic layer and first groove.
2. array base palte according to claim 1, it is characterised in that
Between first groove and second groove of described thin film transistor (TFT) the same side, second inorganic layer deviates from
The side of first inorganic layer is provided with first organic layer；
3rd inorganic layer covers the surface and edge that first organic layer deviates from the substrate, and described first
Organic layer is located at the 3rd inorganic layer in the range of the upright projection of the substrate in the upright projection of the substrate.
3. array base palte according to claim 1, it is characterised in that
Between first groove and second groove of described thin film transistor (TFT) the same side, first organic layer is set
Deviate from the side of the substrate in second inorganic layer, and first organic layer is provided with least one first hole, institute
State the 3rd inorganic layer and cover first organic layer, and fill first hole, and the 3rd inorganic layer passes through described the
One hole is contacted with second inorganic layer.
4. array base palte according to claim 3, it is characterised in that the width of first hole is less than or equal to 5 μm.
5. array base palte according to claim 1, it is characterised in that
Between first groove and second groove of described thin film transistor (TFT) the same side, first inorganic layer deviates from
The side of the substrate is provided with first organic layer, and
At least one second hole for running through second inorganic layer, first organic layer are provided with second inorganic layer
Second hole is filled, the 3rd inorganic layer covers the second nothing around first organic layer and second hole
Machine layer.
6. array base palte according to claim 1, it is characterised in that
Between first groove and second groove of described thin film transistor (TFT) the same side, set on the substrate
The first organic layer is stated, first organic layer is located at the same side of the substrate with the thin film transistor (TFT), and
At least one is provided with second inorganic layer and first inorganic layer through second inorganic layer and described the
Second hole of one inorganic layer, first organic layer fills second hole, the 3rd inorganic layer covering described first
The second inorganic layer around organic layer and second hole.
7. the array base palte according to claim 1-6 any one, it is characterised in that the first organic layer filling is described
First groove.
8. the array base palte according to claim 1-6 any one, it is characterised in that
Between the two neighboring thin film transistor (TFT), it is provided with least two and runs through first inorganic layer and second nothing
First groove of machine layer；
Around the first groove each described, first inorganic layer, second inorganic layer and the 3rd inorganic layer are straight
Contact, forms a barrier layer being made up of inorganic material, and the barrier layer is corresponded with first groove.
9. the array base palte according to claim 1-6 any one, it is characterised in that
Between the two neighboring thin film transistor (TFT), it is provided with least two and runs through first inorganic layer and second nothing
First groove of machine layer；
Around all first grooves, first inorganic layer, second inorganic layer and the 3rd inorganic layer are straight
Contact, forms a barrier layer being made up of inorganic material.
10. array base palte according to claim 1, it is characterised in that
The material of first organic layer is in PEN, polyethylene terephthalate and polyimides
At least one.
11. array base palte according to claim 1, it is characterised in that
The thin film transistor (TFT) is away from the side of first groove to first recess edge close to second groove
Distance be less than or equal to 10 times of thickness of the flexible display apparatus for including the array base palte.
12. array base palte according to claim 1, it is characterised in that
First groove and/or second groove are shaped as strip.
13. array base palte according to claim 12, it is characterised in that
The array base palte also includes the scan line extended in a first direction, and the data wire extended in a second direction, strip
First groove and/or second groove it is identical with the bearing of trend of the scan line or the data wire；
The first direction intersects with the second direction.
14. array base palte according to claim 1, it is characterised in that
The thin film transistor (TFT) is top gate structure, including：
The active layer on first inorganic layer is arranged on, the active layer includes source region and drain region；
It is arranged on second inorganic layer on the active layer；
It is arranged on the grid layer on second inorganic layer；
It is arranged on the 3rd inorganic layer on the grid layer and second inorganic layer, the 3rd inorganic layer and is provided with
Through the 3rd inorganic layer and the 3rd hole and the 4th hole of second inorganic layer, the 3rd hole exposes the source
Area, the 4th hole exposes the drain region；
The source electrode being arranged on the 3rd inorganic layer and drain electrode, the source electrode are connected by the 3rd hole and the source region
Connect, the drain electrode is connected by the 4th hole with the drain region.
15. array base palte according to claim 1, it is characterised in that
The thin film transistor (TFT) is bottom grating structure, including：
It is arranged on the upper grid layer of first inorganic layer；
It is arranged on second inorganic layer on the grid layer；
The active layer on second inorganic layer is arranged on, the active layer includes source region and drain region；
It is arranged on the 3rd inorganic layer on the active layer, the 3rd inorganic layer that to be provided through the described 3rd inorganic
The 3rd hole and the 4th hole of layer, the 3rd hole expose the source region, and the 4th hole exposes the drain region；
The source electrode being arranged on the 3rd inorganic layer and drain electrode, the source electrode are connected by the 3rd hole and the source region
Connect, the drain electrode is connected by the 4th hole with the drain region.
16. a kind of display panel, it is characterised in that including any described array base paltes of claim 1-15.
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| WO2019041921A1 (en) * | 2017-08-31 | 2019-03-07 | 昆山国显光电有限公司 | Foldable array substrate, manufacturing method thereof, and display device |
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