CN106992705B

CN106992705B - Inverter with a voltage regulator

Info

Publication number: CN106992705B
Application number: CN201710175340.1A
Authority: CN
Inventors: 刘龙
Original assignee: Gree Electric Appliances Inc of Zhuhai
Current assignee: Gree Electric Appliances Inc of Zhuhai
Priority date: 2017-03-22
Filing date: 2017-03-22
Publication date: 2023-04-14
Anticipated expiration: 2037-03-22
Also published as: CN106992705A

Abstract

The invention discloses an inverter. Wherein, this inverter includes: the full-bridge inverter circuit is connected between the direct current power supply and the alternating current power supply and used for converting direct current of the direct current power supply into alternating current and merging the alternating current into the alternating current power supply, and the follow current circuit is connected between the full-bridge inverter circuit and the alternating current power supply and used for conducting in a follow current stage. The inverter provided by the invention adopts a new follow current path, and solves the technical problem that the efficiency of the inverter is reduced because the inverter in the related technology generates larger common-mode leakage current due to the high-frequency on-off of the transistor.

Description

Inverter with a voltage regulator

Technical Field

The invention relates to the technical field of grid-connected inversion, in particular to an inverter.

Background

Grid-connected inverters can invert direct current into alternating current, which is then incorporated into an alternating current grid.

Grid-connected inverters can be classified into two types, isolated inverters and non-isolated inverters. The isolation inverter is further divided into a power frequency isolation inverter and a high frequency isolation inverter. The power frequency isolation grid-connected inverter is large and heavy in size and low in efficiency. Compared with a power frequency isolation grid-connected inverter, the high-frequency isolation grid-connected inverter has high efficiency, but has lower efficiency compared with a non-isolation grid-connected inverter. And the high-frequency isolation grid-connected inverter is complex to control.

Fig. 1 is a schematic diagram of a full-bridge inverter circuit in the prior art, and as shown in fig. 1, a single-phase non-isolated grid-connected inverter generally adopts a full-bridge inverter circuit at present, which includes: 4 transistors, 4 diodes, 2 inductors, 1 capacitor and a direct current power supply and a power grid interface. The transistor S1 'is connected in series with the transistor S3' to obtain a first series circuit, the transistor S2 'is connected in series with the transistor S4' to obtain a second series circuit, wherein each transistor is connected in parallel with a diode, so that the transistor S1 'is connected in parallel with the diode D1', the transistor S2 'is connected in parallel with the diode D2', the transistor S3 'is connected in parallel with the diode D3', the transistor S4 'is connected in parallel with the diode D4', wherein the cathode of the diode is connected with the drain of the transistor, and the anode of the diode is connected with the source of the transistor. And then connecting the first series circuit, the second series circuit and the capacitor C 'in parallel and then connecting the first series circuit, the second series circuit and the capacitor C' into a direct current power supply, wherein one end of the series circuit, which comprises a crystal drain electrode, is connected with a positive electrode Vdc '+ of the direct current circuit, and one end of the series circuit, which comprises a crystal source electrode, is connected with a negative electrode Vdc' -of the direct current circuit. One end of the inductor L1' is connected between the transistor S1' and the transistor S3' of the first series circuit, and the other end of the inductor L1' is connected with the first end of the Grid interface Grid '; one end of the inductor L2 'is connected between the transistor S2' and the transistor S4 'of the second series circuit, and the other end is connected to the second segment of the Grid' interface.

The non-isolated grid-connected inverter has bipolar modulation and unipolar modulation working modes.

1. Bipolar modulation mode of operation

As shown in fig. 1, when the power grid is in the positive half cycle, S1 'and S4' are simultaneously turned on, and S2 'and S3' are turned off. The current path is:

vdc + ' → S1' → L1' → Grid ' → L2' → S4' → Vdc- '; when S1 and S4 are simultaneously turned off, S2 and S3 are simultaneously turned on. The current path is: grid '→ L2' → D2'→ C' → D3'→ L1'. The negative half cycle of the power grid is symmetrical, and the power grid is not redundant. S1', S4', S2 'and S3' all work at the high frequency, and bipolar modulation transistor switching loss is great, and the inverter efficiency is low.

2. Unipolar modulation mode of operation

4 transistors in a full-bridge single-phase inversion topology which works through unipolar modulation, wherein 2 transistors work at power frequency, and the other 2 transistors work at high frequency.

As shown in fig. 1, when the power grid is in the positive half cycle, S1 'and S4' are simultaneously turned on, S2 'and S3' are turned off, and the current path is: vdc + ' → S1' → L1' → Grid ' → L2' → S4' → Vdc- '; when S1 'is turned off, S4' is still turned on, and S2 'and S3' are still turned off, the current path is: grid ' → L2' → S4' → D3' → L1'. The negative half cycle of the power grid is symmetrical to the negative half cycle of the power grid.

When unipolar modulation is adopted, high-frequency on-off of a transistor in the inverter generates high-frequency time-varying voltage to act on a parasitic capacitor, larger common-mode leakage current is generated, the efficiency of the inverter is reduced, and EMC performance is also influenced.

In view of the technical problem that the efficiency of the inverter is reduced due to the fact that the inverter in the related art generates large common mode leakage current due to high-frequency switching of the transistors, no effective solution is provided at present.

Disclosure of Invention

The embodiment of the invention provides an inverter, which at least solves the technical problem that the efficiency of the inverter is reduced due to the fact that the inverter in the related art generates large common-mode leakage current due to high-frequency switching of transistors.

According to an aspect of an embodiment of the present invention, there is provided an inverter including: full-bridge inverter circuit and afterflow circuit, wherein: the full-bridge inverter circuit is connected between a direct-current power supply and an alternating-current power supply and used for converting direct current of the direct-current power supply into alternating current and merging the alternating current into the alternating-current power supply, wherein four bridge arms are a first bridge arm, a second bridge arm, a third bridge arm and a fourth bridge arm which are sequentially connected to form a bridge circuit, and under the condition that a first end of the first bridge arm and a first end of the second bridge arm are connected with a first end of the alternating-current power supply, the follow current circuit comprises: the first switch tube is connected in series between the first end of the first bridge arm and the second end of the alternating current power supply, the first switch tube comprises a control end, the control end of the first switch tube is used for receiving a first switch driving signal, and the first switch driving signal is used for controlling the first switch tube to be cut off when the first bridge arm is switched on; the first diode is connected with the first switching tube in parallel, wherein the current direction of the first diode when the first diode is conducted is opposite to the current direction of the first bridge arm when the first bridge arm is conducted; the second switch tube is connected between the first end of the first bridge arm and a first node, the first node is a node at which the first end of the second bridge arm is connected with the first end of the alternating-current power supply, the second switch tube comprises a control end, the control end of the second switch tube is used for receiving a second switch driving signal, and the second switch driving signal is used for controlling the second switch tube to be conducted when the first bridge arm is conducted; and the second diode is connected with the second switching tube in parallel, wherein the current direction of the second diode when the second diode is conducted is opposite to the current direction of the first bridge arm when the second bridge arm is conducted.

Furthermore, each of the four bridge arms comprises at least one switching tube, the switching tubes in the same bridge arm are controlled by the same modulation signal to be turned on and turned off, and the switching tubes in the opposite bridge arms are controlled by the same modulation signal to be turned on and turned off.

Furthermore, any one of the switching tubes in the four bridge arms is an insulated gate bipolar transistor or a metal oxide semiconductor field effect transistor.

Furthermore, a diode is connected in parallel to any one of the switching tubes of the four bridge arms.

Further, the current direction of the diode when the diode is conducted is opposite to the current direction of the parallel switch tube when the diode is conducted.

Furthermore, any one of the four bridge arms is connected with a switch tube with a diode in parallel, and the switch tube is a switch tube with a diode.

Further, the modulation signal is a sinusoidal pulse width modulation signal.

Further, the inverter further includes: and the processor is connected with the control end of each switching tube in the four bridge arms and is used for outputting the modulation signal to control the on and off of each switching tube in the four bridge arms.

Further, the inverter further includes: and the capacitor is connected between the positive electrode and the negative electrode of the direct current power supply.

Further, the inverter further includes: the first inductor is connected between the first end of the alternating current power supply and the second switch tube; and the second inductor is connected between the second end of the alternating current power supply and the third bridge arm, and the third bridge arm and the first bridge arm are opposite bridge arms.

Further, the inverter further includes: and the processor is connected with the control end of the first switch tube and the control end of the second switch tube and is used for outputting the first switch driving signal to the first switch tube and outputting the second switch driving signal to the second switch tube.

In the embodiment of the invention, the full-bridge inverter circuit is connected between the direct-current power supply and the alternating-current power supply, the direct current provided by the direct-current power supply is inverted into the alternating current, the follow current circuit is connected between the full-bridge inverter circuit and the alternating-current power supply, and when the alternating current provided by the alternating-current power supply flows into the full-bridge inverter circuit, a loop can be formed by the follow current circuit to return, the transistor in the full-bridge inverter circuit does not need to be switched on and off frequently due to the change of the current flow direction, so that the technical problem that the efficiency of the inverter is reduced due to the fact that the transistor is switched on and off at high frequency is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:

FIG. 1 is a schematic diagram of a full bridge inverter circuit of the prior art;

FIG. 2 is a schematic diagram of an alternative inverter according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of another alternative inverter according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of an alternative transistor drive signal according to an embodiment of the present invention;

fig. 5 is a schematic diagram of an alternative current path during the inversion phase of the positive half cycle of the grid voltage in accordance with an embodiment of the invention;

fig. 6 is a schematic diagram of an alternative current path during a freewheeling phase of a positive half-cycle of the grid voltage in accordance with an embodiment of the present invention;

fig. 7 is a schematic diagram of an alternative current path during the inversion phase of the negative half cycle of the grid voltage in accordance with an embodiment of the present invention;

fig. 8 is a schematic diagram of an alternative current path during a freewheeling phase during a negative half-cycle of the grid voltage according to an embodiment of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.

Fig. 2 is a schematic diagram of an inverter according to an embodiment of the present invention, as shown in fig. 2, including: the full-bridge inverter comprises a full-bridge inverter circuit and a follow current circuit, wherein the full-bridge inverter circuit is connected between a direct current power supply Vdc and an alternating current power supply Grid, the full-bridge inverter circuit is used for converting direct current of the direct current power supply Vdc into alternating current and merging the alternating current into the alternating current power supply Grid, the full-bridge inverter circuit comprises four bridge arms, the four bridge arms are a first bridge arm 11, a second bridge arm 12, a third bridge arm 13 and a fourth bridge arm 14 respectively, and the four bridge arms are sequentially connected in the sequence to form the bridge circuit. The freewheeling circuit comprises a first switch tube S6, a first diode D6, a second switch tube S5 and a second diode D5. Under the condition that the first end of the first bridge arm 11 and the first end of the second bridge arm 12 are connected to the first end of the ac power supply Grid, the first switching tube S6 is connected in series between the first end of the first bridge arm 11 and the second end of the ac power supply Grid, the first switching tube S6 includes a control end, the control end of the first switching tube S6 is configured to receive a first switch driving signal, and the first switch driving signal is configured to control the first switching tube S6 to be turned off when the first bridge arm 11 is turned on; a first diode D6 is connected in parallel with the first switching tube S6, wherein the current direction of the first diode D6 when being turned on is opposite to the current direction of the first bridge arm 11 when being turned on; the second switching tube S5 is connected between the first end of the first bridge arm 11 and a first node, the first node is a node at which the first end of the second bridge arm 12 is connected to the first end of the ac power supply Grid, the second switching tube S5 includes a control end, the control end of the second switching tube S5 is configured to receive a second switch driving signal, and the second switch driving signal is configured to control the second switching tube S5 to be turned on when the first bridge arm 11 is turned on; second diode D5 is connected in parallel with second switching tube S5, where a current direction of second diode D5 when conducting is opposite to a current direction of first arm 11 when conducting.

According to the embodiment of the invention, the full-bridge inverter circuit is connected between the direct-current power supply and the alternating-current power supply, the direct current provided by the direct-current power supply is inverted into the alternating current, the follow current circuit is connected between the full-bridge inverter circuit and the alternating-current power supply, when the alternating current provided by the alternating-current power supply flows into the full-bridge inverter circuit, a loop can be formed by the follow current circuit to return, the transistor in the full-bridge inverter circuit does not need to be switched frequently due to the change of the current flow direction, and the technical problems that the grid-connected inverter circuit generates larger common-mode leakage current and reduces the efficiency of the inverter due to the high-frequency switching-on and-off of the transistor in the inverter are solved through the new follow current path provided by the embodiment.

As an optional embodiment, each of the four bridge arms includes at least one switching tube, the switching tubes in the same bridge arm are controlled by the same modulation signal to be turned on and turned off, and the switching tubes in the opposite bridge arms are controlled by the same modulation signal to be turned on and turned off. By adopting the embodiment of the invention, the switching tube is controlled to be switched on and off by modulating the signal to control the conduction direction of the current in the circuit, thereby controlling the circuit; the same modulation signal is used for controlling the switching tube in the bridge arms which are opposite in position in the full-bridge inverter circuit, so that the current flowing through the two bridge arms can be controlled by the modulation signal, and the modulation current meeting the requirement is generated.

As an alternative embodiment, any one of the switching transistors in the four bridge arms is an insulated gate bipolar transistor or a metal oxide semiconductor field effect transistor. By adopting the embodiment of the invention, because the insulated gate bipolar transistor or the metal oxide semiconductor field effect transistor has the advantages of high input impedance, high switching speed, simple driving circuit, low on-state voltage and capability of bearing high voltage and large current, the reliability and the stability of the circuit can be ensured by using the insulated gate bipolar transistor or the metal oxide semiconductor field effect transistor as the switching tube.

As an alternative embodiment, a diode is connected in parallel with any one of the switching tubes in the four bridge arms. By adopting the embodiment of the invention, the current can be transmitted through the diode under the condition that the switching tube is cut off, and the connection of the circuit is ensured.

As an alternative embodiment, the current direction of the diode when conducting is opposite to the current direction of the parallel switch tube when conducting. By adopting the embodiment of the invention, the diode is connected with the switching tube in parallel, and the current direction of the diode when the diode is conducted is opposite to the current direction of the switching tube when the switching tube is conducted, so that the current in the direction opposite to the conducting direction of the switching tube can pass through the diode, thereby ensuring the conduction of the circuit and avoiding the damage of the switching tube caused by the reverse current.

As an alternative embodiment, the switching tube connected with the diode in parallel in any one of the four bridge arms is a switching tube with a diode. By adopting the embodiment of the invention, the switching tube with the diode is used as the switching tube connected with the diode in parallel, so that the number of devices in the current can be reduced and the circuit structure can be simplified under the condition of meeting the requirements of the original circuit.

As an alternative embodiment, the modulation signal is a sinusoidal pulse width modulation signal. By adopting the embodiment of the invention, the sine pulse width modulation signal is used as the modulation signal to control the on and off of the switching tube, so that the direct current flowing through the full-bridge inverter can be converted into complete sine alternating current through the switching tube controlled by the modulation signal through the sine pulse width modulation signal, and the sine alternating current flowing through the full-bridge inverter can be converted into direct current through the switching tube controlled by the modulation signal.

As an alternative embodiment, the inverter further comprises: and the processor is connected with the control end of each switching tube in the four bridge arms and used for outputting a modulation signal to control the on and off of each switching tube in the four bridge arms. By adopting the embodiment of the invention, the modulation signal output by the processor is transmitted to the control end of each switching tube in the four bridge arms to control the on and off of each switching tube in the four bridge arms, so that the centralized control of a plurality of switching tubes is realized, and the control of the inverter is simpler and more convenient.

As an alternative embodiment, the inverter further comprises: and the capacitor is connected between the anode and the cathode of the direct current power supply. By adopting the embodiment of the invention, the capacitor is connected between the anode and the cathode of the direct current power supply, and the alternating current provided by the alternating current power supply can form a loop through the capacitor under the condition that the follow current circuit is broken due to faults, so that the alternating current is prevented from entering the direct current power supply and damaging the direct current power supply.

As an alternative embodiment, the inverter further comprises: the first inductor is connected between the first end of the alternating current power supply and the second switching tube; and the second inductor is connected between the second end of the alternating current power supply and the third bridge arm, and the third bridge arm and the first bridge arm are opposite bridge arms. By adopting the embodiment of the invention, the inductor is connected between the full-bridge inverter circuit and the alternating current power supply, so that the current in the full-bridge inverter circuit can enter the alternating current power supply after passing through the inductor, and the current in the alternating current power supply can also enter the full-bridge inverter circuit after passing through the inductor, thereby reducing the damage to each device in the inverter under the condition of frequent current switching through the inductor.

As an alternative embodiment, the inverter further comprises: and the processor is connected with the control end of the first switch tube and the control end of the second switch tube and used for outputting a first switch driving signal to the first switch tube and outputting a second switch driving signal to the second switch tube. By adopting the embodiment of the invention, the processor respectively outputs the first switch driving signal and the second switch driving signal to the control ends of the first open tube and the second switch tube, so that the first switch tube and the second switch tube are controlled in a centralized manner, and the inverter is controlled more simply and conveniently.

Fig. 3 is a schematic diagram of another alternative inverter according to an embodiment of the present invention, as shown in fig. 3, including: transistor S1, transistor S2, transistor S3, transistor S4, transistor S5 (second switch), transistor S6 (first switch), transistor S7, diode D1, diode D2, diode D3, diode D4, diode D5 (second diode), diode D6 (first diode), diode D7, inductor L1 (first inductor), inductor L2 (second inductor), capacitor C and Vdc (direct current power supply) and Grid (Grid interface).

The transistor S1, the transistor S5 and the transistor S2 are sequentially connected in series to obtain a first series circuit, the transistor S4, the transistor S7 and the transistor S3 are sequentially connected in series to obtain a second series circuit, the first series circuit, the second series circuit and the capacitor C are connected in parallel and then connected to a direct-current power supply Vdc, wherein the drains of the transistors S1 and S4 are connected with the positive pole Vdc + of the direct-current power supply, and the sources of the transistors S2 and S3 are connected with the negative pole Vdc-. The diode D5 is connected in parallel with the transistor S5, the anode of the diode D5 is connected to the source of the transistor S5, and the cathode of the diode D5 is connected to the drain of the transistor S5. The drain of the transistor S6 is connected between the transistor S1 and the transistor S5, the source of the transistor S6 is connected between the transistor S7 and the transistor S3, the diode D6 is connected with the transistor S6 in parallel, the anode of the diode D6 is connected with the source of the transistor S6, and the cathode of the diode D6 is connected with the drain of the transistor S6. One end of the inductor L1 is connected between the transistor S5 and the transistor S2, and the other end of the inductor L1 is connected with the first end of the Grid interface; one end of the inductor L2 is connected between the transistor S7 and the transistor S3, and the other end of the inductor L2 is connected with the second end of the Grid interface Grid. In the above circuit, each of the transistors S1, S2, S3, S4, and S7 may be connected in parallel with a diode, and the current direction of the parallel diode when conducting is opposite to the current direction of the corresponding transistor when conducting, that is, the transistor S1 is connected in parallel with the diode D1, the transistor S2 is connected in parallel with the diode D2, the transistor S3 is connected in parallel with the diode D3, the transistor S4 is connected in parallel with the diode D4, and the transistor S7 is connected in parallel with the diode D7.

It should be noted that the parallel diode of the transistor S5 and the transistor S6 is necessary in the above circuit, and the parallel diode of the other transistors except the transistor S5 and the transistor S6 is not necessary. The transistor and the parallel diode may be integrated in the form of a transistor with a body diode. S1, S2, S3, S4, S7 shown in fig. 3 are igbts or mosfets with or without body diodes, and S5 and S6 shown in fig. 3 are igbts or mosfets with body diodes.

Fig. 4 is a schematic diagram of an alternative transistor driving signal according to an embodiment of the present invention, and the driving signal shown in fig. 4 may be used to drive corresponding transistors (switching tubes) in the circuit diagram shown in fig. 3, and the gate of each transistor is used to receive the driving signal. As shown in fig. 4, the driving signal of the Grid is a sinusoidal signal with a period of 360 °; the driving signals of the transistors S1 and S3 are sine pulse width modulation signals at 1-180 degrees and are the minimum value of the sine pulse width modulation signals at 180-360 degrees without fluctuation; the driving signal of the transistor S5 is a constant value at 1-180 degrees, is immediately reduced when reaching 180 degrees, and is a reduced value at 180-360 degrees as a constant value; the driving signals of the transistors S2, S4 and S7 are the minimum value of the sine pulse width modulation signals at 1-180 degrees and do not fluctuate, and the driving signals are the sine pulse width modulation signals at 180-360 degrees; the driving signal of the transistor S6 is null at 1-180 deg. and constant at 180-360 deg..

When the transistor driving signal shown in fig. 4 is received for driving, the operation principle of the grid-connected inverter circuit shown in fig. 3 will be described as follows:

1. when the grid voltage is in the positive half-cycle condition

Fig. 5 is a schematic diagram of an alternative current path during the inversion phase of the positive half cycle of the grid voltage according to an embodiment of the present invention, as shown in fig. 5, the transistors S1, S3, S5 are turned on, and the transistors S2, S4, S6, S7 are turned off. The current path is: vdc + → S1 → S5 → L1 → Grid → L2 → S3 → Vdc-. At the moment, the inverter is in an inversion stage, and an inversion loop is formed to convey current to a power grid.

Fig. 6 is a schematic diagram of an alternative current path during the freewheeling stage of the positive half cycle of the grid voltage according to the embodiment of the present invention, as shown in fig. 6, when the transistors S1 and S3 are turned off, the transistor S5 remains on, and the transistors S2, S4, S6, and S7 remain off, because the current in the inductors L1 and L2 cannot change abruptly, the current path is: grid → L2 → D6 → S5 → L1, which is the inductive freewheeling stage, forming the inductive freewheeling circuit to deliver current to the Grid.

2. When the grid voltage is negative for a half cycle

Fig. 7 is a schematic diagram of an alternative current path during the inversion phase of the negative half cycle of the grid voltage according to an embodiment of the present invention, as shown in fig. 7, the transistors S2, S4, S6, S7 are turned on, and the transistors S1, S3, S5 are turned off. The current path is: vdc + → S4 → S7 → L2 → Grid → L1 → S2 → Vdc-. At the moment, the inversion stage is performed, and an inversion loop is formed to convey current to a power grid.

Fig. 8 is a schematic diagram of an alternative current path during the freewheeling stage of the negative half-cycle of the grid voltage according to an embodiment of the present invention, as shown in fig. 8, when the transistors S2, S4, and S7 are turned off, the transistor S6 remains on, and the transistors S1, S3, and S5 remain off, because the current of the inductors L1 and L2 cannot change abruptly, the current path is: grid → L1 → D5 → S6 → L2. At the moment, the inductive freewheeling stage is formed, and an inductive freewheeling loop is formed to transmit current to the power grid.

When the power grid voltage is in a positive half cycle, the transistors S1 and S3 are switched on and off at high frequency by sine pulse width modulation with the same driving signal. Transistor S5 is switched on and off at the same low frequency as the grid frequency. When the power grid voltage is in a negative half cycle, the transistors S2, S4 and S7 are switched on and off in a high frequency mode by sine pulse width modulation with the same driving signals. Transistor S6 is switched on and off at the same low frequency as the grid frequency.

According to the invention, by newly adding the transistor S7 and the transistors S5 and S6 with the diodes, when the positive and negative half cycles L1 and L2 of the grid voltage follow current, a new follow current path is provided, the capacitor C does not participate in follow current any more, and the follow current path becomes small. Meanwhile, common mode leakage current is restrained, and the efficiency of the inverter is improved.

In the embodiment of the invention, the transistor S5 and the transistor S6 and the diodes connected in parallel are added to form the follow current circuit, so that the follow current path in the inversion working is different from the follow current path in the bipolar modulation working and the follow current path in the unipolar modulation working, the follow current path in the full-bridge inverter in the inversion working state is reduced, the power loss of the circuit is reduced, the common-mode leakage current is restrained, the problem of large loss caused by the follow current flowing through the capacitor C in the bipolar modulation working and the problem of large common-mode leakage current in the full-bridge inverter in the unipolar modulation working are solved, and the efficiency of the inverter is improved.

The order of the above-described embodiments of the present invention is merely for description and does not represent the merits of the embodiments.

In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented in other manners. The above-described embodiments are merely illustrative, and for example, the division of the circuit may be a logic function division, and there may be another division manner in actual implementation, for example, a plurality of circuits or devices may be combined or may be integrated into another circuit or device, or some devices may be omitted, or some devices may be added.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims

1. An inverter, comprising a full bridge inverter circuit and a freewheel circuit, wherein:

the full-bridge inverter circuit is connected between a direct current power supply and an alternating current power supply and is used for converting direct current of the direct current power supply into alternating current and merging the alternating current into the alternating current power supply,

the full-bridge inverter circuit comprises four bridge arms, wherein the four bridge arms are a first bridge arm, a second bridge arm, a third bridge arm and a fourth bridge arm which are sequentially connected to form a bridge circuit, and the follow current circuit comprises the following components under the condition that a first end of the first bridge arm and a first end of the second bridge arm are connected with a first end of the alternating current power supply:

the first switching tube is connected in series between the first end of the first bridge arm and the second end of the alternating-current power supply, the first switching tube comprises a control end, the control end of the first switching tube is used for receiving a first switch driving signal, and the first switch driving signal is used for controlling the first switching tube to be cut off when the first bridge arm is switched on;

the first diode is connected with the first switching tube in parallel, wherein the current direction of the first diode when the first diode is conducted is opposite to the current direction of the first bridge arm when the first bridge arm is conducted;

the second switch tube is connected between the first end of the first bridge arm and a first node, the first node is a node at which the first end of the second bridge arm is connected with the first end of the alternating current power supply, the second switch tube comprises a control end, the control end of the second switch tube is used for receiving a second switch driving signal, and the second switch driving signal is used for controlling the second switch tube to be conducted when the first bridge arm is conducted;

a second diode connected in parallel with the second switching tube, wherein a current direction of the second diode when the second diode is conducted is opposite to a current direction of the first bridge arm when the second bridge arm is conducted,

each of the four bridge arms comprises at least one switching tube, the switching tubes in the same bridge arm are controlled to be opened and closed by the same modulation signal, the switching tubes in the opposite bridge arms are controlled to be opened and closed by the same modulation signal, and the modulation signals are sine pulse width modulation signals.

2. The inverter according to claim 1, wherein any one of the switching transistors in the four legs is an insulated gate bipolar transistor or a metal oxide semiconductor field effect transistor.

3. The inverter according to claim 1, wherein a diode is connected in parallel to any one of the switching tubes in the four bridge arms.

4. The inverter of claim 3, wherein the diode when conducting has a current direction opposite to the parallel switching tube when conducting.

5. The inverter according to claim 3, wherein the switching tube connected with the diode in parallel in any one of the four bridge arms is a switching tube with a diode.

6. The inverter of claim 1, further comprising:

and the processor is connected with the control end of each switching tube in the four bridge arms and is used for outputting the modulation signal to control the on and off of each switching tube in the four bridge arms.

7. The inverter of claim 1, further comprising:

and the capacitor is connected between the anode and the cathode of the direct current power supply.

8. The inverter of claim 1, further comprising:

the first inductor is connected between the first end of the alternating current power supply and the second switching tube;

and the second inductor is connected between the second end of the alternating current power supply and the third bridge arm, and the third bridge arm and the first bridge arm are opposite bridge arms.

9. The inverter of claim 1, further comprising:

and the processor is connected with the control end of the first switch tube and the control end of the second switch tube and is used for outputting the first switch driving signal to the first switch tube and outputting the second switch driving signal to the second switch tube.