CN106991243B - Method for rapidly checking overlapping of silk-screen layer and solder mask layer - Google Patents
Method for rapidly checking overlapping of silk-screen layer and solder mask layer Download PDFInfo
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- CN106991243B CN106991243B CN201710236893.3A CN201710236893A CN106991243B CN 106991243 B CN106991243 B CN 106991243B CN 201710236893 A CN201710236893 A CN 201710236893A CN 106991243 B CN106991243 B CN 106991243B
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- silk
- solder mask
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- 229910000679 solder Inorganic materials 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 23
- 238000013461 design Methods 0.000 claims abstract description 10
- 238000007689 inspection Methods 0.000 claims abstract description 10
- 230000006870 function Effects 0.000 claims description 5
- 238000007650 screen-printing Methods 0.000 claims description 5
- 238000005259 measurement Methods 0.000 claims description 3
- 238000011179 visual inspection Methods 0.000 abstract 1
- 238000011161 development Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Abstract
The invention relates to a method for rapidly checking the overlapping of a silk-screen layer and a solder mask layer, which is characterized in that a program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer is compiled, then a part of configuration files of software are modified, and a program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer and a shortcut key related program are added and loaded; the software is opened, a shortcut key is pressed, the overlapped silk-screen layer and the solder mask layer are quickly checked, the overlapped part is highlighted, an inspection report is popped up, the inspection report contains coordinate indexes, the overlapped part is quickly positioned and is modified one by one, the overlapped condition of the silk-screen layer and the solder mask layer is quickly checked, the process of design inspection is greatly simplified, efficiency is improved, and omission and errors possibly caused by visual inspection are avoided.
Description
Technical Field
The invention belongs to the technical field of PCB design, and particularly relates to a method for rapidly checking the overlapping of a silk-screen layer and a solder mask layer.
Background
At present, a plurality of PCB design software exist in the market, Allegro is used as the most widely applied software in the industry, not only does the Allegro have strong functions and a plurality of relevant software as support, but also because the Allegro provides an open secondary development interface and a more perfect development language library, users can develop the Allegro according to the requirements of the users.
The twist language is a high-level programming language based on a C language and an LISP language and is built in Allegro software, the Allegro provides rich interactive functions for the twist language, the twist language is researched, then a tool is compiled, and the work efficiency can be greatly improved after the twist language is put into use.
In PCB design inspection, the inspection method adopted at present is manual inspection, which is time-consuming, labor-consuming, low in efficiency and easy to omit. This is a disadvantage of the prior art.
Disclosure of Invention
The invention aims to provide a method for rapidly detecting the overlapping of a silk-screen layer and a solder mask layer aiming at the defects of low efficiency, easy omission and the like of the detection method so as to solve the problems.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a method for rapidly checking the overlapping of a silk-screen layer and a solder mask layer is characterized by comprising the following steps:
step 1: writing a program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer;
step 2: modifying a configuration file of software, and adding and loading a program for quickly checking the overlapping of the silk-screen layer and the solder mask layer and a program related to a shortcut key;
and step 3: operating software, pressing a shortcut key, quickly checking out the overlapped silk-screen layer and the solder mask layer, highlighting the overlapped part and popping up a checking report, wherein the checking report contains coordinate indexes, quickly positioning the overlapped part and modifying one by one;
in the step 1, a program for quickly checking the overlapping of the silk-screen layer and the solder mask layer is designed, and the method comprises the following steps:
step 11: firstly, making the whole design invisible, and opening the relevant layers of the solder mask layer and the silk-screen printing layer;
step 12: respectively selecting all objects with different types on the surfaces of the solder mask layer and the silk-screen layer;
step 13: traversing each object in the silk-screen layer and the solder mask layer, and obtaining the measurement distance airgap between every two objects in different layers through functions;
step 14: judging the airgap one by one, if the airgap is not 0, skipping the step 3, integrating the departments with the airgap value of 0 into a set, highlighting the objects involved in the set, and writing the names and the coordinates of the objects involved in the set into a file;
step 15: and after the inspection is finished, displaying the file through a pop-up window.
The solder mask layer selects all objects with types of shape and lines, and the silk screen layer selects all objects with types of shape, text and lines.
The value of airgap can only be 0 or a positive integer and is independent of how much overlap is present.
Preferably, the software is Allegro software, and a skip program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer is written in the Allegro software.
And adding shortcut keys in the env file.
Preferably, the addition of F4 is a shortcut key.
And the highlight of the modified object is cancelled.
The method has the advantages that the overlapped silk-screen layer and the solder mask layer are quickly checked through a design skip program in the PCB design check, the overlapped part is highlighted, a check report is popped up, coordinate indexes are contained, the overlapped part can be quickly positioned and modified one by one, the overlapping condition of the silk-screen layer and the solder mask layer is quickly checked, the process of the design check is greatly simplified, the efficiency is improved, and simultaneously omission and errors possibly caused by visual check are avoided; the method is simple to operate, the checking result can be obtained after one-key operation, the brd file is not limited, any data does not need to be input, the checking result can be obtained without selecting any object, the checking result is organized accurately, and the efficiency is greatly improved.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Therefore, compared with the prior art, the invention has prominent substantive features and remarkable progress, and the beneficial effects of the implementation are also obvious.
Drawings
Fig. 1 is a flow chart of a program design of a method for rapidly checking the overlap of a silk-screen layer and a solder resist layer.
Fig. 2 is a screenshot of the pop-up window presentation file in fig. 1.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings by way of specific examples, which are illustrative of the present invention and are not limited to the following embodiments.
In the method for rapidly inspecting the overlap between the screen printing layer and the solder resist layer provided in this embodiment, a guilll program for rapidly inspecting the overlap between the screen printing layer and the solder resist layer is first written, and as shown in fig. 1, the step of writing the guilll program is as follows:
step 11: firstly, making the whole design invisible, and opening the relevant layers of the solder mask layer and the silk-screen printing layer;
step 12: respectively selecting all objects with different types on the surfaces of the solder mask layer and the silk-screen layer;
step 13: traversing each object in the silk-screen layer and the solder mask layer, and obtaining the measurement distance airgap between every two objects in different layers through functions;
step 14: judging the airgap one by one, if the airgap is not 0, skipping the step 3, integrating the departments with the airgap value of 0 into a set, highlighting the objects involved in the set, and writing the names and the coordinates of the objects involved in the set into a file;
step 15: and after the inspection is finished, displaying the file through a pop-up window.
The solder mask layer selects all objects with types of shape and lines, and the silk screen layer selects all objects with types of shape, text and lines.
The value of airgap can only be 0 or a positive integer and is independent of how much overlap is present.
Then, modifying a part of configuration files of the Allegro software, adding and loading a kill and a shortcut related program, and comprising the following steps: step 21: adding a load ("silonsold. il") in an allegor. ilinit file, wherein silonsold. il is a source program file, and the command is used for loading a program; step 22: a shortcut key is added in the env file, in the embodiment, a keystroke F4 is taken as an example, funckey F4 silkonsolid, wherein silkonsolid is a command defined in a program, the program referred to in the present invention is executed after the command is executed, and now, the command is replaced by a shortcut key F4.
The allegoro software is opened, and the F4 key is pressed, so that the program can be run; after the operation is finished, highlighting the overlapped part, popping up an inspection report, quickly positioning the objects by clicking the coordinates, modifying the objects one by one, and canceling the highlighting of the modified objects.
The above disclosure is only for the preferred embodiments of the present invention, but the present invention is not limited thereto, and any non-inventive changes that can be made by those skilled in the art and several modifications and amendments made without departing from the principle of the present invention shall fall within the protection scope of the present invention.
Claims (8)
1. A method for rapidly checking the overlapping of a silk-screen layer and a solder mask layer is characterized by comprising the following steps:
step 1: writing a program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer;
step 2: modifying a configuration file of software, and adding and loading a program for quickly checking the overlapping of the silk-screen layer and the solder mask layer and a program related to a shortcut key;
and step 3: operating software, pressing a shortcut key, quickly checking out the overlapped silk-screen layer and the solder mask layer, highlighting the overlapped part and popping up a checking report, wherein the checking report contains coordinate indexes, quickly positioning the overlapped part and modifying one by one;
in the step 1, a program for quickly checking the overlapping of the silk-screen layer and the solder mask layer is designed, and the method comprises the following steps:
step 11: firstly, making the whole design invisible, and opening the relevant layers of the solder mask layer and the silk-screen printing layer;
step 12: respectively selecting all objects with different types on the surfaces of the solder mask layer and the silk-screen layer;
step 13: traversing each object in the silk-screen layer and the solder mask layer, and obtaining the measurement distance airgap between every two objects in different layers through functions;
step 14: judging the airgap one by one, if the airgap is not 0, skipping back to the step 3, integrating the part of the airgap with the value of 0 into a set, highlighting the object involved in the set, and writing the name and the coordinate of the object involved in the set into a file;
step 15: and after the inspection is finished, displaying the file through a pop-up window.
2. The method as claimed in claim 1, wherein in step 12, the solder mask layer selects all objects of shape and lines, and the screen layer selects all objects of shape, text and lines.
3. The method for rapidly checking the overlapping of the silk-screen layer and the solder mask layer as claimed in claim 2, wherein the value of airgap can only be 0 or a positive integer.
4. A method for rapidly checking the overlap of the silk-screen layer and the solder mask layer according to claim 3, wherein the value of airgap is independent of the overlap.
5. The method of claim 1, wherein the modified object is de-highlighted.
6. The method for rapidly checking the overlapping of the silk-screen layer and the solder mask layer as claimed in claim 1, wherein the software is Allegro software.
7. The method for rapidly checking the overlapping of the silk-screen layer and the solder mask layer as claimed in claim 6, wherein a still program for rapidly checking the overlapping of the silk-screen layer and the solder mask layer is written in Allegro software.
8. The method for rapidly checking the overlapping of the silk-screen layer and the solder mask layer as claimed in claim 7, wherein the shortcut key is added as a key F4.
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| CN201710236893.3A CN106991243B (en) | 2017-04-12 | 2017-04-12 | Method for rapidly checking overlapping of silk-screen layer and solder mask layer |
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| CN106991243B true CN106991243B (en) | 2020-04-03 |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107704707A (en) * | 2017-10-26 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of method for checking word on pad |
| CN107885956A (en) * | 2017-11-30 | 2018-04-06 | 上海安路信息科技有限公司 | The method for replacing domain label |
| CN108153963B (en) * | 2017-12-21 | 2022-02-18 | 郑州云海信息技术有限公司 | Method for checking connector connection layer number in PCB design |
| CN108460179A (en) * | 2018-01-11 | 2018-08-28 | 郑州云海信息技术有限公司 | Belong to the method and system of line in pcb board design using quick key switch GND |
| CN109492306B (en) * | 2018-11-12 | 2020-04-07 | 北京华大九天软件有限公司 | Association layer denotation method for design rule verification result |
| CN113642287B (en) * | 2021-08-20 | 2023-06-16 | 苏州浪潮智能科技有限公司 | Method, system, storage medium and equipment for checking screen printed text overlapping |
| CN114297977B (en) * | 2021-12-16 | 2024-01-23 | 苏州浪潮智能科技有限公司 | Method and device for cutting off silk screen printing |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103593526A (en) * | 2013-11-15 | 2014-02-19 | 浪潮电子信息产业股份有限公司 | Design method for automatically searching copper foil clearances in stacks of PCBs |
| CN105246264A (en) * | 2015-10-20 | 2016-01-13 | 江门崇达电路技术有限公司 | Manufacturing method of solder resisting layer with solder resisting steps |
| CN106529106A (en) * | 2017-01-09 | 2017-03-22 | 郑州云海信息技术有限公司 | Hole building method and device as well as PCB |
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2017
- 2017-04-12 CN CN201710236893.3A patent/CN106991243B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103593526A (en) * | 2013-11-15 | 2014-02-19 | 浪潮电子信息产业股份有限公司 | Design method for automatically searching copper foil clearances in stacks of PCBs |
| CN105246264A (en) * | 2015-10-20 | 2016-01-13 | 江门崇达电路技术有限公司 | Manufacturing method of solder resisting layer with solder resisting steps |
| CN106529106A (en) * | 2017-01-09 | 2017-03-22 | 郑州云海信息技术有限公司 | Hole building method and device as well as PCB |
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