CN106935480A - A kind of cleaning method implemented after cmp copper metal interconnection layer - Google Patents

A kind of cleaning method implemented after cmp copper metal interconnection layer Download PDF

Info

Publication number
CN106935480A
CN106935480A CN201511018593.5A CN201511018593A CN106935480A CN 106935480 A CN106935480 A CN 106935480A CN 201511018593 A CN201511018593 A CN 201511018593A CN 106935480 A CN106935480 A CN 106935480A
Authority
CN
China
Prior art keywords
wafer
seconds
deionized water
grinding pad
duration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201511018593.5A
Other languages
Chinese (zh)
Other versions
CN106935480B (en
Inventor
施成
唐强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp, Semiconductor Manufacturing International Beijing Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201511018593.5A priority Critical patent/CN106935480B/en
Publication of CN106935480A publication Critical patent/CN106935480A/en
Application granted granted Critical
Publication of CN106935480B publication Critical patent/CN106935480B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02074Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers

Abstract

The present invention provides the cleaning method implemented after a kind of cmp copper metal interconnection layer, including:By by the wafer of cmp copper-connection metal level feeding cleaning operation room, deionized water rinsing is used;The wafer is immersed in the container for filling the deionized water after heating up, the duration is -90 seconds 80 seconds;Perform and scrub process for the first time, the first time scrubs process includes three steps implemented successively:The first step, the wafer is scrubbed with deionized water, and second step adsorbs the wafer using wafer head, and the front of the wafer is ground with miniature grinding pad, and the 3rd step scrubs the wafer using citric acid and deionized water;Perform second and scrub process, the wafer is scrubbed using citric acid and deionized water;Dry the wafer.According to the present invention it is possible to substantially reduce the chemical residue after grinding, suppress the generation of corrosion phenomenon.

Description

A kind of cleaning method implemented after cmp copper metal interconnection layer
Technical field
The present invention relates to semiconductor fabrication process, in particular to a kind of cmp copper The cleaning method implemented after metal interconnecting layer.
Background technology
In the back-end process (BEOL) of semiconductor devices, dual damascene work is generally used Skill forms the copper metal interconnection structure for filling copper metal interconnection layer.Using electroplating technology in copper To be located at, it is necessary to implement cmp after filling copper metal interconnection layer in metal interconnection structure Copper removal outside copper metal interconnection structure is clean.During cmp is implemented, The lapping liquid for using belongs to chemical substance, and the effect of external force is, it is necessary to strict control avoids grinding in addition Existing defects in copper metal interconnection layer after mill, therefore, the cleaning after grinding to wafer just seems It is particularly important.However, existing cleaning is deposited in can not completely removing copper metal interconnection layer Defect, can also cause the residual of chemical substance, thus can cause copper spread aggravation, lead Cause the decline of device performance.
It is, therefore, desirable to provide a kind of method, to solve the above problems.
The content of the invention
In view of the shortcomings of the prior art, the present invention provides a kind of cmp copper metal interconnection The cleaning method implemented after layer, including:Will be by the cmp copper-connection metal level Wafer feeding cleaning operation room, use deionized water rinsing;Wafer immersion is filled into intensification In the container of deionized water afterwards, the duration is -90 seconds 80 seconds;Perform and scrubbed for the first time Journey, the first time scrubs process includes three steps implemented successively:The first step, spend from Sub- water scrubs the wafer, and second step adsorbs the wafer using wafer head, with miniature Grinding pad grinds the front of the wafer, and the 3rd step scrubs institute using citric acid and deionized water State wafer;Perform second and scrub process, the wafer is scrubbed using citric acid and deionized water; Dry the wafer.
In one example, the deionization that will implement behind wafer feeding cleaning operation room The duration that water is rinsed is -90 seconds 80 seconds.
In one example, the duration of the cmp is -80 seconds 70 seconds.
In one example, the duration that the first time scrubs the first step of process is 10 - 15 seconds seconds.
In one example, the duration of the miniature grinding pad grinding is -25 seconds 20 seconds, The composition that the miniature grinding pad grinds the chemicals of used lapping liquid is additive, dioxy SiClx and water, the flow velocity of the lapping liquid is the ml/min of 200 ml/min -220.
In one example, the speed of rotation of the miniature grinding pad is 25 revs/min -30 revs/min, The direction of rotation of the miniature grinding pad is rotate counterclockwise, the rotation side of the wafer head To turn clockwise, the speed of rotation is 30 revs/min -40 revs/min.
In one example, the material of the miniature grinding pad is polyurethane, the miniature grinding A diameter of 205 millimeters -210 millimeters of pad, gather circular groove, institute on the miniature grinding pad State circular groove a diameter of 3.5 millimeters -3.8 millimeters, the depth of the circular groove is 50 - 80 microns of micron.
In one example, the second step and the 3rd step of the first time scrub process repeat real Apply.
In one example, the volume basis of the citric acid for being used during the first time scrub Content is 25%-30%, and the duration that the first time scrubs the 3rd step of process is 35 seconds - 40 seconds.
In one example, the volume basis of the citric acid used during scrubbing for described second Content is 25%-30%, and the duration of second scrub process is -90 seconds 80 seconds
According to the present invention it is possible to substantially reduce the chemical residue after grinding, suppress corrosion existing The generation of elephant.
Brief description of the drawings
Drawings below of the invention is in this as a part of the invention for understanding the present invention.It is attached Embodiments of the invention and its description are shown in figure, for explaining principle of the invention.
In accompanying drawing:
Figure 1A is the chemical-mechanical grinding device for implementing to be used during cleaning method proposed by the present invention Schematic cross sectional view;
The signal of the miniature grinding pad in chemical-mechanical grinding devices of the Figure 1B shown in Figure 1A Figure;
Fig. 2 is the flow of the step of being implemented successively according to the method for exemplary embodiment of the present Figure.
Specific embodiment
In the following description, a large amount of concrete details are given to provide to the present invention more Thoroughly understand.It is, however, obvious to a person skilled in the art that of the invention Can be carried out without one or more of these details.In other examples, in order to keep away Exempt to obscure with the present invention, be not described for some technical characteristics well known in the art.
It should be appreciated that the present invention can be implemented in different forms, and it is not construed as office It is limited to embodiments presented herein.On the contrary, providing these embodiments disclosure will be made thoroughly and complete Entirely, and will fully convey the scope of the invention to those skilled in the art.In the accompanying drawings, For clarity, the size and relative size in Ceng He areas may be exaggerated.It is identical attached from start to finish Icon note represents identical element.
It should be understood that be referred to as when element or layer " ... on ", " with ... it is adjacent ", " being connected to " Or when " being coupled to " other elements or layer, its can directly on other elements or layer and It is adjacent, be connected or coupled to other elements or layer, or there may be element or layer between two parties. Conversely, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " being directly connected to " Or when " being directly coupled to " other elements or layer, then in the absence of element or layer between two parties.Should Understand, although can be used term first, second, third, etc. describe various elements, part, Area, floor and/or part, these elements, part, area, floor and/or part should not be by these Term is limited.These terms be used merely to distinguish element, part, area, floor or part with Another element, part, area, floor or part.Therefore, do not depart from present invention teach that under, First element discussed below, part, area, floor or part be represented by the second element, part, Area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... it Under ", " ... on ", " above " etc., can describe for convenience herein and by using from And an element shown in figure or feature are described with other elements or the relation of feature.Should be bright In vain, in addition to the orientation shown in figure, spatial relationship term is intended to also include using and operating In device different orientation.If for example, the device upset in accompanying drawing, then, is described as " below other elements " or " under it " or " under it " element or feature will be orientated Be other elements or feature " on ".Therefore, exemplary term " ... below " and " ... Under " may include upper and lower two orientations.Device can additionally be orientated and (be rotated by 90 ° or other Orientation) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as this hair Bright limitation.When using herein, " one " of singulative, " one " and " described/should " It is also intended to include plural form, unless context is expressly noted that other mode.It is also to be understood that art Language " composition " and/or " including ", when using in this specification, determine the feature, The presence of integer, step, operation, element and/or part, but be not excluded for it is one or more its The presence or addition of its feature, integer, step, operation, element, part and/or group. When using herein, term "and/or" includes any and all combination of related Listed Items.
[exemplary embodiment]
Reference picture 2, illustrated therein is method according to an exemplary embodiment of the present invention and implements successively The step of flow chart, the flow for schematically illustrating manufacturing process.
First, in step 201, by by the wafer of cmp copper-connection metal level Feeding cleaning operation room, with deionized water rinsing -90 seconds 80 seconds.
The composition of the chemicals of the lapping liquid used during cmp copper-connection metal level is Additive, silica and water, the percentage by weight of additive are less than 1.0%, silica Percentage by weight be 1.0%-10.0%, the percentage by weight of water is 89.0%-98.0%.It is described The duration of cmp is -80 seconds 70 seconds.
Implementing the wafer before the cmp includes:Semiconductor substrate, in semiconductor Isolation structure and various traps (well) structure are formed with substrate, as an example, isolation structure For shallow trench isolates (STI) structure or selective oxidation silicon (LOCOS) isolation structure;It is formed in Front-end devices in Semiconductor substrate, the front-end devices refer to the back segment system in semiconductor devices Before journey formed device, herein the concrete structure not to front-end devices be defined;Formed The etching stopping layer being laminated from bottom to top on a semiconductor substrate, low k dielectric, cushion And hard mask layer, material preferred SiCN, SiC, SiN or BN of etching stopping layer, its work It is subsequent etch low k dielectric forming the etching stopping layer of upper copper metal interconnection structure Meanwhile, the copper in lower floor's copper metal interconnection line can be prevented to be diffused into the dielectric substance layer (example on upper strata Such as low k dielectric) in, the constituent material of low k dielectric can be selected from the common tool in this area There is the material of low k-value (dielectric constant is less than 4.0), including but not limited to k values are 2.6-2.9 Silicate compound (Hydrogen Silsesquioxane, referred to as HSQ), k values be 2.8 HOSPTM(the mixture based on organic matter and Si oxide of Honeywell companies manufacture Advanced low-k materials) and k values for 2.65 SiLKTM(Dow Chemical companies A kind of advanced low-k materials of manufacture) etc., cushion can include what is be laminated from bottom to top OMCTS (prestox cyclisation tetrasiloxane) layers and TEOS (tetraethyl orthosilicate) layer, OMCTS The transition material functioned as between the low k dielectric and TEOS layer of layer is to increase the two Between adhesive force, TEOS layers of effect is kept away in the copper-connection metal of follow-up grinding filling Exempt from mechanical stress the porous structure of low k dielectric is caused to damage, hard mask layer can be wrapped Include the metal hard mask layer and oxide hard-mask layer being laminated from bottom to top, this double-deck hard mask The structure of layer ensure that the craft precision of Dual graphing or multiple graphical, it is ensured that in hard The depth and the uniformity of side wall profile of the whole figures formed needed for mask layer, i.e., first will tool The pattern for having different characteristic size is formed in oxide hard-mask layer, then with oxide hardmask The figure that layer is formed for needed for mask etch metal hard mask layer makes in hard mask layer, metal The constituent material of hard mask layer includes Ti, TiN, BN, AlN, CuN or its arbitrary group Close, preferably TiN;The constituent material of oxide hard-mask layer includes SiO2, SiON etc., and It is required that it has preferable etching selectivity relative to the constituent material of metal hard mask layer;Formed Copper metal interconnection layer in low k dielectric, before forming copper metal interconnection layer, need to form The bottom of the copper metal interconnection structure for filling copper metal interconnection layer in low k dielectric With sequentially form copper metal diffusion impervious layer and copper metal Seed Layer on the wall of side, copper metal diffusion resistance Barrier can prevent the copper in copper metal interconnection layer to the diffusion in low k dielectric, copper metal kind Sublayer can strengthen the tack between copper metal interconnection layer and copper metal diffusion impervious layer, be formed Copper metal diffusion impervious layer and copper metal Seed Layer can be familiar with using those skilled in the art Various suitable technology, for example, using physical gas-phase deposition formed copper metal expand Barrier layer is dissipated, copper metal Seed Layer is formed using sputtering technology or chemical vapor deposition method, The material of copper metal diffusion impervious layer is metal, metal nitride or its combination, such as Ta The combination of combination or Ti and TiN with TaN.
Then, in step 202., wafer immersion is filled the container of the deionized water after heating up In, the duration is -90 seconds 80 seconds.As an example, the temperature of the deionized water after the intensification Spend is 45 DEG C -65 DEG C.
Then, in step 203, perform and scrub process for the first time, it includes what is implemented successively Three steps:The first step, wafer is scrubbed -15 seconds 10 seconds with deionized water;Second step, such as schemes Shown in 1A, wafer 100 is adsorbed using wafer head 101, ground with miniature grinding pad 104 Grind the front of wafer 100-25 seconds 20 seconds, lapping liquid is flowed out by nozzle 107, and flow velocity is 200 The ml/min of ml/min -220, the composition of the chemicals of lapping liquid is additive, silica and Water, the percentage by weight of additive is less than 1.0%, and the percentage by weight of silica is 1.0%-10.0%, the percentage by weight of water is 89.0%-98.0%, the front of wafer 100 with it is miniature Contact between grinding pad 104 is 5.0 pounds -5.5 pounds, the rotation of miniature grinding pad 104 Speed is 25 revs/min -30 revs/min, and the direction of rotation of miniature grinding pad 104 is rotate counterclockwise, Miniature grinding pad 104 is fixed in grinding pad supporting table 103, and grinding pad supporting table 103 passes through Rotating shaft 106 is connected with the motor 105 for being fixed on supporting plate 102, as shown in Figure 1B, The material of miniature grinding pad 104 is polyurethane, a diameter of 205 millimeters of miniature grinding pad 104 - 210 millimeters, on grinding pad 104 gather circular groove 108, circular groove 108 it is a diameter of 3.5 millimeters -3.8 millimeters, the depth of circular groove 108 is 50 microns -80 microns, wafer Head 101 produce certain vacuum to adsorb wafer 100, wafer by air-pressure chamber therein 100 and the vacuum that is fixed between the film of wafer head 101 be 1.2 pounds -3.2 pounds, it is brilliant The direction of rotation of circle slide glass first 101 to turn clockwise, the speed of rotation is 30 revs/min -40 turns/ Point;3rd step, using volume ratio for the citric acid and deionized water of 25%-30% scrub wafer - 40 seconds 35 seconds.In order to fully remove the chemical substance of defect and residual, above-mentioned second step and the Three steps can repeat to implement.
Then, in step 204, perform second and scrub process, be using volume ratio The citric acid and deionized water of 25%-30% scrub wafer -90 seconds 80 seconds.
Then, in step 205, wafer is dried, as an example, can be in wafer spinner Middle drying wafer.Then, wafer is sent to the operating unit of subsequent processing.
So far, the processing step that method according to an exemplary embodiment of the present invention is implemented is completed. According to the present invention, process is scrubbed by performing the first time, i.e., that implements successively uses deionization Water scrubs wafer 100, the front with the grinding crystal wafer 100 of miniature grinding pad 104 and uses volume ratio For the citric acid and deionized water of 25%-30% scrub wafer 100, after grinding can be substantially reduced Chemical residue, especially the chemical substance in the defect of copper metal interconnection layer is residual Stay, suppress the generation of corrosion phenomenon.
The present invention is illustrated by above-described embodiment, but it is to be understood that, it is above-mentioned Embodiment is only intended to citing and descriptive purpose, and is not intended to limit the invention to described Scope of embodiments in.In addition it will be appreciated by persons skilled in the art that the present invention not office It is limited to above-described embodiment, teaching of the invention can also make more kinds of modifications and repair Change, these variants and modifications are all fallen within scope of the present invention.It is of the invention Protection domain is defined by the appended claims and its equivalent scope.

Claims (10)

1. the cleaning method implemented after a kind of cmp copper metal interconnection layer, including:
Cleaning operation room will be sent into by the wafer of the cmp copper-connection metal level, Use deionized water rinsing;
In the container of the deionized water that the wafer is immersed after filling intensification, the duration is - 90 seconds 80 seconds;
Perform and scrub process for the first time, the first time scrubs process includes three implemented successively Step:The first step, the wafer is scrubbed with deionized water, and second step uses wafer head The wafer is adsorbed, the front of the wafer is ground with miniature grinding pad, the 3rd step uses lemon Lemon acid and deionized water scrub the wafer;
Perform second and scrub process, the wafer is scrubbed using citric acid and deionized water;
Dry the wafer.
2. method according to claim 1, it is characterised in that by wafer feeding The duration of the deionized water rinsing implemented behind cleaning operation room is -90 seconds 80 seconds.
3. method according to claim 1, it is characterised in that the chemical machinery grinds The duration of mill is -80 seconds 70 seconds.
4. method according to claim 1, it is characterised in that the first time scrubs The duration of the first step of process is -15 seconds 10 seconds.
5. method according to claim 1, it is characterised in that the miniature grinding pad The duration of grinding is -25 seconds 20 seconds, and the miniature grinding pad grinds used lapping liquid The composition of chemicals be additive, silica and water, the flow velocity of the lapping liquid is 200 The ml/min of ml/min -220.
6. method according to claim 1, it is characterised in that the miniature grinding pad The speed of rotation be 25 revs/min -30 revs/min, the direction of rotation of the miniature grinding pad is the inverse time Pin rotates, and to turn clockwise, the speed of rotation is 30 for the direction of rotation of the wafer head Revs/min -40 revs/min.
7. method according to claim 1, it is characterised in that the miniature grinding pad Material be polyurethane, it is a diameter of 205 millimeters -210 millimeters of the miniature grinding pad, described Gather circular groove on miniature grinding pad, a diameter of 3.5 millimeter of -3.8 milli of the circular groove Rice, the depth of the circular groove is 50 microns -80 microns.
8. method according to claim 1, it is characterised in that the first time scrubs The second step of process and the 3rd step repeat to implement.
9. method according to claim 1, it is characterised in that the first time scrubs During the volumn concentration of citric acid that uses be 25%-30%, the first time scrubs The duration of the 3rd step of process is -40 seconds 35 seconds.
10. method according to claim 1, it is characterised in that scrub for described second During the volumn concentration of citric acid that uses be 25%-30%, scrub for described second The duration of process is -90 seconds 80 seconds.
CN201511018593.5A 2015-12-29 2015-12-29 Cleaning method implemented after chemical mechanical polishing of copper metal interconnection layer Active CN106935480B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201511018593.5A CN106935480B (en) 2015-12-29 2015-12-29 Cleaning method implemented after chemical mechanical polishing of copper metal interconnection layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201511018593.5A CN106935480B (en) 2015-12-29 2015-12-29 Cleaning method implemented after chemical mechanical polishing of copper metal interconnection layer

Publications (2)

Publication Number Publication Date
CN106935480A true CN106935480A (en) 2017-07-07
CN106935480B CN106935480B (en) 2020-02-11

Family

ID=59442355

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201511018593.5A Active CN106935480B (en) 2015-12-29 2015-12-29 Cleaning method implemented after chemical mechanical polishing of copper metal interconnection layer

Country Status (1)

Country Link
CN (1) CN106935480B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111834259A (en) * 2020-07-17 2020-10-27 中国科学院微电子研究所 Cleaning assembly
CN111900200A (en) * 2020-06-24 2020-11-06 西安交通大学 Diamond-based gallium nitride composite wafer and bonding preparation method thereof
CN114473845A (en) * 2020-11-11 2022-05-13 中国科学院微电子研究所 Cleaning device
CN114887976A (en) * 2022-05-25 2022-08-12 宁波芯丰精密科技有限公司 Cleaning device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303551B1 (en) * 1997-10-21 2001-10-16 Lam Research Corporation Cleaning solution and method for cleaning semiconductor substrates after polishing of cooper film
US6479443B1 (en) * 1997-10-21 2002-11-12 Lam Research Corporation Cleaning solution and method for cleaning semiconductor substrates after polishing of copper film
CN1618569A (en) * 2003-11-17 2005-05-25 台湾积体电路制造股份有限公司 Cmp process and process for polishing copper layer oxide on base
CN101752206A (en) * 2008-12-01 2010-06-23 中芯国际集成电路制造(上海)有限公司 Method for improving grinding particle residue
CN101908465A (en) * 2009-06-04 2010-12-08 中芯国际集成电路制造(上海)有限公司 Method for removing residues after chemical mechanical polishing
CN102810459A (en) * 2011-06-03 2012-12-05 中国科学院微电子研究所 Method for cleaning wafer after chemical-mechanical
CN103035504A (en) * 2011-10-09 2013-04-10 中芯国际集成电路制造(北京)有限公司 Chemical machinery polishing method and chemical machinery polishing device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303551B1 (en) * 1997-10-21 2001-10-16 Lam Research Corporation Cleaning solution and method for cleaning semiconductor substrates after polishing of cooper film
US6479443B1 (en) * 1997-10-21 2002-11-12 Lam Research Corporation Cleaning solution and method for cleaning semiconductor substrates after polishing of copper film
CN1618569A (en) * 2003-11-17 2005-05-25 台湾积体电路制造股份有限公司 Cmp process and process for polishing copper layer oxide on base
CN101752206A (en) * 2008-12-01 2010-06-23 中芯国际集成电路制造(上海)有限公司 Method for improving grinding particle residue
CN101908465A (en) * 2009-06-04 2010-12-08 中芯国际集成电路制造(上海)有限公司 Method for removing residues after chemical mechanical polishing
CN102810459A (en) * 2011-06-03 2012-12-05 中国科学院微电子研究所 Method for cleaning wafer after chemical-mechanical
CN103035504A (en) * 2011-10-09 2013-04-10 中芯国际集成电路制造(北京)有限公司 Chemical machinery polishing method and chemical machinery polishing device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111900200A (en) * 2020-06-24 2020-11-06 西安交通大学 Diamond-based gallium nitride composite wafer and bonding preparation method thereof
CN111834259A (en) * 2020-07-17 2020-10-27 中国科学院微电子研究所 Cleaning assembly
CN114473845A (en) * 2020-11-11 2022-05-13 中国科学院微电子研究所 Cleaning device
CN114887976A (en) * 2022-05-25 2022-08-12 宁波芯丰精密科技有限公司 Cleaning device
CN114887976B (en) * 2022-05-25 2024-01-23 宁波芯丰精密科技有限公司 Cleaning device

Also Published As

Publication number Publication date
CN106935480B (en) 2020-02-11

Similar Documents

Publication Publication Date Title
US6383928B1 (en) Post copper CMP clean
KR20030014123A (en) Fabrication method of semiconductor integrated circuit device
CN106935480A (en) A kind of cleaning method implemented after cmp copper metal interconnection layer
US20160035582A1 (en) Chemical-mechanical planarization of substrates containing copper, ruthenium, and tantalum layers
TW200406063A (en) Method for producing semiconductor device and semiconductor device
US20080119050A1 (en) Semiconductor device manufacture method
JP4864402B2 (en) Manufacturing method of semiconductor device
US8187966B2 (en) Manufacturing method for semiconductor integrated circuit device
US20050067702A1 (en) Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing
US20050239289A1 (en) Method for reducing integrated circuit defects
JP4987254B2 (en) Manufacturing method of semiconductor device
JP2006179948A (en) Semiconductor device and method of manufacturing device
CN103839876B (en) The manufacturing method and device of semiconductor devices
JP2007305755A (en) Method of manufacturing semiconductor device
US20040074518A1 (en) Surfactants for post-chemical mechanical polishing storage and cleaning
US6551943B1 (en) Wet clean of organic silicate glass films
CN104733373A (en) Manufacturing method for semiconductor component
Mosig et al. Single and dual damascene integration of a spin-on porous ultra low-k material
JP2006165597A (en) Method of manufacturing semiconductor device
JP2004022986A (en) Cleaning liquid used after chemomechanical polishing
CN104681483A (en) Manufacturing method of semiconductor device
CN105336679B (en) A method of forming metal interconnection structure
US9370854B2 (en) Method of fabricating a semiconductor device, and chemical mechanical polish tool
CN104112699B (en) The method for eliminating salient point effect in the semiconductor structure
JP2006156519A (en) Method of manufacturing semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant