Measuring device with AM modulation function
Technical Field
The invention relates to the technical field of signal testing and measuring, in particular to a measuring device with an AM modulation function.
Background
AM (amplitude Modulation) is an important means of wireless communication, and any waveform generator, radio frequency signal source and other devices can generate AM signals for communication system research or test. Part of any waveform generator using analog synthesis and most of radio frequency signal sources can adopt a mode of controlling an analog attenuator to realize AM. Compared with a radio frequency signal source, the frequency of a signal generated by an arbitrary waveform generator is generally low, and the arbitrary waveform generator is mostly used for pre-research or design of communication schemes and technologies. The frequency of the modulation signal generated by the radio frequency signal source is equivalent to the actual use range, and the radio frequency signal source can be used for research or test of practical communication equipment and devices. The radio frequency signal source is mainly used for generating radio frequency signals with a certain frequency range and amplitude range, and the radio frequency signals are used as excitation or reference of the device to be tested to assist in testing and measuring of the electronic device. Amplitude accuracy and stability are one of important technical indexes of a radio frequency signal source, and are mainly guaranteed by an Automatic Level Control (ALC). When the AM is turned on, it is also necessary that the amplitude of the carrier signal (basic rf signal) of the signal source is substantially unchanged and the original stability is maintained.
Patent CN201310721663.8 discloses a rf signal source, whose functional block diagram is shown in fig. 1, and the rf signal source mainly includes a frequency synthesizer 101, an automatic level control circuit 102 and a step attenuator 103. The frequency synthesizer 101 is mainly used for generating a radio frequency signal with a frequency set by a user, the automatic level control circuit 102 controls the amplitude accuracy and stability of the radio frequency signal, and the step attenuator 103 uses a relatively large attenuation step to further adjust the amplitude of an output signal, so that the amplitude range which can be output by a radio frequency signal source is expanded.
In the rf signal source, AM is implemented in the automatic level control circuit 102 as an extended function thereof. The patent CN201310721663.8 describes a common analog ALC scheme and its AM implementation, as shown in fig. 2.
The ALC part is composed of an adjustable radio frequency attenuator 201, a matching resistor 202, a radio frequency amplifier 203, a directional coupler 204, an exponential amplifier 205, an adder 206, a comparison integrator (composed of a capacitor 207 and an amplifier 208), an adder 209, a logarithmic amplifier 210, a logarithmic amplifier 211 and a detector 212. 2A is the input RF signal, 2F is the output RF signal, and 2G is the set reference signal. If the amplitude of the output rf signal 2F is not equal to the amplitude represented by the set reference signal 2G, the output of the comparator integrator (composed of the capacitor 207 and the amplifier 208) will change, and after being amplified by the exponential amplifier 205, the change will be used as the attenuation of the adjustable rf attenuator 201 until the amplitude of the output signal reaches the set value. The AM modulation signal (baseband signal, 2H) passes through the logarithmic amplifier 211 and then enters the adder 209 and the adder 206 before and after the comparator integrator, respectively, so as to control ALC to realize AM.
In the analog ALC scheme, AM is attached to ALC, and the requirement on an adjustable radio frequency attenuator is high.
In view of the problems of the analog ALC scheme, patent CN201310721663.8 proposes a digital ALC structure and a corresponding AM implementation, as shown in fig. 3.
The power divider 802, the detector 803, the digital processing module 804 and the adjustable radio frequency attenuator 801 in the digital chip 806 form a relatively independent digital ALC loop, and the data output by the digital chip 806 directly drives the separated adjustable radio frequency attenuator 805 to realize AM after passing through the data processing unit 807.
In the digital ALC scheme, AM is not attached to ALC, and the requirement on an adjustable radio frequency attenuator is not high. The composition and connection of the AM are described only in hardware, and no explicit solution is available for implementing the AM within a digital chip.
Disclosure of Invention
The embodiment of the invention provides a measuring device with an AM modulation function, and provides a reference scheme for realizing AM in a digital chip. The measuring device comprises a digital chip for realizing an AM modulation function;
the digital chip comprises a calibration module, a frequency synthesizer, a modulation switch, a modulation coefficient module, a baseband bias module, a combiner module and a nonlinear compensation module;
the input end of the calibration module is the input end of the digital chip;
when external modulation is carried out, the output end of the calibration module is connected with the input end of the modulation coefficient module through a modulation selector switch; when internal modulation is carried out, the output end of the frequency synthesizer is connected with the input end of the modulation coefficient module through a modulation selector switch;
the input end of the baseband bias module is connected with the output end of the modulation coefficient module, the first output end of the baseband bias module is connected with the input end of the combining module, and the second output end of the baseband bias module is connected with the input end of the nonlinear compensation module;
the output end of the nonlinear compensation module is connected with an external AM attenuator;
the calibration module is used for calibrating a signal input by a user to obtain an external modulation signal;
the frequency synthesizer is used for generating an inner modulation signal;
the modulation coefficient module is used for changing the modulation depth of the external modulation signal or the internal modulation signal;
the baseband offset module is used for changing the offset of the outer modulation signal or the inner modulation signal;
the combining module is used for combining the external modulation signal or the internal modulation signal with ALC reference voltage;
the nonlinear compensation module is used for carrying out nonlinear compensation on the external modulation signal or the internal modulation signal.
In one embodiment, the calibration module includes a sampling coefficient unit and a sampling offset unit;
the input end of the sampling coefficient unit is the input end of the calibration module, the output end of the sampling coefficient unit is connected with the input end of the sampling offset unit, and the output end of the sampling offset unit is connected with the modulation selector switch;
or, the input end of the sampling offset unit is the input end of the calibration module, the output end of the sampling offset unit is connected with the input end of the sampling coefficient unit, and the output end of the sampling coefficient unit is connected with the modulation changeover switch.
In one embodiment, a first adder is further included in the digital chip;
the output end of the calibration module and the output end of the frequency synthesizer are simultaneously connected with a first adder through a modulation switch;
and adding the result of multiplying the inner modulation signal by the inner modulation coefficient and the result of multiplying the outer modulation signal by the outer modulation coefficient by the first adder to obtain a mixed modulation signal.
In one embodiment, the digital chip further comprises a delay module;
the input end of the delay module is connected with the output end of the baseband offset module, the first output end of the delay module is connected with the input end of the combining module, and the second output end of the delay module is connected with the input end of the nonlinear compensation module;
the delay module is used for adjusting the phase of the internal modulation signal or the external modulation signal or the mixed modulation signal.
In one embodiment, a normalization module is included in the digital chip;
the input end of the normalization module is connected with the first output end of the delay module, and the output end of the normalization module is connected with the input end of the combining module;
the normalization module is used for normalizing the internal modulation signal or the external modulation signal or the mixed modulation signal and the ALC reference voltage.
In one embodiment, the normalization module is a logarithmic amplifier and the combining module is a summer.
In one embodiment, the normalization module is a divider and the combining module is a multiplier.
In one embodiment, the nonlinear compensation module comprises a main wave table unit, a frequency compensation table unit, a first multiplier, a second adder, a temperature compensation unit and a third adder;
the input end of the main wave meter unit is connected with the output end of the delay module, and the input end of the frequency compensation meter unit is connected with the output end of the delay module;
the main wave table module is used for searching in the main wave table according to the internal modulation signal or the external modulation signal or the mixed modulation signal to obtain a first table searching result;
the frequency compensation table unit is used for searching in the frequency compensation table according to the internal modulation signal or the external modulation signal or the mixed modulation signal to obtain a second table searching result;
the first multiplier is used for multiplying the second table look-up result by the frequency coefficient to obtain a multiplication result;
the second adder is used for adding the multiplication result and the first table look-up result to obtain a control voltage;
the temperature compensation unit is used for performing temperature compensation on the control voltage to obtain temperature compensation voltage;
and the third adder is used for adding the temperature compensation voltage and the control voltage to obtain the final control voltage.
In one embodiment, the temperature compensation unit comprises a second stage amplifier, a temperature compensation table unit and a second multiplier;
the second-stage amplifier is used for linearly amplifying the control voltage;
the temperature compensation table unit is used for searching in the temperature compensation table according to the linearly amplified control voltage to obtain a temperature compensation result;
and the second multiplier is used for multiplying the temperature compensation result by the compensation coefficient to obtain the temperature compensation voltage.
In one embodiment, the non-linearity compensation module further comprises a first stage amplifier;
the input end of the first-stage amplifier is the input end of the nonlinear compensation module, and the output end of the first-stage amplifier is connected with the input end of the main wave meter unit and used for linearly amplifying the internal modulation signal or the external modulation signal or the mixed modulation signal.
In the embodiment of the invention, on the basis of a digital AM scheme, AM requirements (internal modulation, external modulation, modulation depth and the like) are analyzed, and an implementation reference scheme of the AM in a digital chip is provided by combining the actual performance and the calibration requirement of the attenuator.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
fig. 1 is a schematic diagram of a basic structure of a radio frequency signal source according to an embodiment of the present invention;
FIG. 2 is a block diagram of an analog ALC circuit provided by an embodiment of the present invention;
fig. 3 is a block diagram of a digital AM circuit according to an embodiment of the present invention;
fig. 4 is a structural diagram of a measuring apparatus with AM modulation function according to an embodiment of the present invention;
fig. 5 is a block diagram of a nonlinear compensation module according to an embodiment of the present invention;
fig. 6 is a structural diagram of another measuring apparatus with AM modulation function according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the following embodiments and accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
In the existing digital ALC scheme, only the composition and connection of AM are described in hardware, and no explicit scheme for implementing AM in a digital chip is available. The invention combines the actual requirement and calibration of AM to design the structure in digital chip in detail based on the digital AM scheme proposed by patent CN201310721663.8, forming a digital AM scheme which can be used in practice.
Fig. 4 is a structural diagram of a measuring apparatus having an AM modulation function according to an embodiment of the present invention, and as shown in fig. 4, the measuring apparatus includes a digital chip for implementing the AM modulation function;
the digital chip comprises a calibration module, a frequency synthesizer 403, a modulation switch, a modulation coefficient module 406, a baseband bias module 407, a combiner module and a nonlinear compensation module 411;
the input end of the calibration module is the input end of the digital chip;
when external modulation is performed, the output end of the calibration module is connected with the input end of the modulation coefficient module 406 through a modulation selector switch; when performing internal modulation, the output end of the frequency synthesizer 403 is connected to the input end of the modulation factor module 406 through a modulation switch;
an input end of the baseband bias module 407 is connected to an output end of the modulation coefficient module 406, a first output end of the baseband bias module 407 is connected to an input end of the combining module, and a second output end of the baseband bias module 407 is connected to an input end of the nonlinear compensation module 411;
the output end of the nonlinear compensation module 411 is connected with an external AM attenuator;
the calibration module is used for calibrating a signal input by a user to obtain an external modulation signal;
the frequency synthesizer 403 is used for generating an inner modulation signal;
the modulation coefficient module 406 is configured to change a modulation depth of the outer modulation signal or the inner modulation signal;
the baseband offset module 407 is configured to change an offset of the outer modulation signal or the inner modulation signal;
the combining module is used for combining the external modulation signal or the internal modulation signal with ALC reference voltage;
the non-linear compensation module 411 is configured to perform non-linear compensation on the external modulation signal or the internal modulation signal.
In specific implementation, the calibration module is used for calibrating the non-ideal characteristics of the sampling circuit, namely when a user inputs a signal (such as a 1Vpp sine signal) specified by a device manual, the calibrated signal is the same as an internally generated modulation signal. Specifically, the calibration block may include a sampling offset unit 401 (subtractor) and a sampling coefficient unit 402 (multiplier);
the input end of the sampling coefficient unit 402 is the input end of the calibration module, the output end of the sampling coefficient unit 402 is connected with the input end of the sampling bias unit 401, and the output end of the sampling bias unit is connected with the modulation changeover switch;
or, the input end of the sampling offset unit 401 is the input end of the calibration module, the output end of the sampling offset unit 401 is connected with the input end of the sampling coefficient unit 402, and the output end of the sampling coefficient unit 402 is connected with the modulation changeover switch;
the sampling bias unit 401 and the sampling coefficient unit 402 are used for calibrating a link error (mainly including a system design error and a device batch consistency error) from the beginning of user input to the end of digital sampling, so that the calibrated signal amplitude is consistent with a standard signal amplitude input by a user. Calibration is done before the device leaves the factory, typically only once. When the user uses the module, the coefficient of the module is fixed.
The specific structures of the sampling bias unit 401 and the sampling coefficient unit 402 can be adjusted according to specific circuits, and the sampling bias unit 401 can be eliminated.
In specific implementation, the AM needs to realize functions of adjusting modulation frequency and modulation depth, needs to realize internal modulation and external modulation, and some devices may have an "internal + external" modulation mode. At this time, the modulation switch may be replaced with a weight calculation switching module and a first adder.
In the internal modulation, a signal generated inside a Digital chip is used as a modulation signal (baseband signal) in the internal modulation, and the modulation signal may be directly generated by a DDS (Direct Digital Synthesizer) 403, and the weight calculation switching module simultaneously sets a weight-inside (internal modulation coefficient) 405 to "1" and a weight-outside (external modulation coefficient) 406 to "0".
When outer modulation is performed, using the user-supplied modulation signal 4A, the calculation switching module sets the weight-inner (inner modulation factor) 405 to "0" and the weight-outer (outer modulation factor) 406 to "1".
When performing hybrid modulation ("inner + outer" mode), the weight calculation switching module sets both the weight-inner (inner modulation factor) 405 and the weight-outer (outer modulation factor) 406 to "0.5". The "inside + outside" mode multiplies the modulation signal generated inside the device and the modulation signal provided by the user by 0.5, and adds them together by the first adder to obtain the final modulation signal (hybrid modulation signal or final baseband signal).
The inner modulation signal and the outer modulation signal are both in the form of y ═ sin (w0 × t), where w0 is the modulation frequency. In the case of hybrid modulation, both the internal source and the external source generate a modulation factor of y ═ sin (w0 × t), and both the set weight-inside and the set weight-outside are "0.5".
In specific implementation, during internal modulation, subsequent operation is carried out on baseband signals generated inside; during external modulation, enabling a modulation signal which is input from the outside and calibrated to enter subsequent operation; in the mixed modulation, the inner modulation signal is multiplied by 0.5, and the outer modulation signal is multiplied by 0.5, and then the subsequent operation is carried out.
Subsequent operations include adjusting the depth and offset of the modulated signal. The modulation coefficient module 406 is configured to change modulation depths of the external modulation signal, the internal modulation signal, and the hybrid modulation signal, where the modulation depths are adjustable from 0% to 100%. The baseband bias module 407 is used to change the offsets of the outer modulation signal, the inner modulation signal, and the hybrid modulation signal, which facilitates subsequent logic design. The signal after baseband bias can be represented by y ═ 1+ ma × sin (w0 × t), where w0 is the modulation frequency and ma is the modulation depth.
In particular, the digital chip may further include a delay module (408, 410) for adjusting a phase error of the AM in cooperation with the ALC, i.e., a phase of the inner modulation signal or the outer modulation signal or the hybrid modulation signal. There may be 1 or 2, or none, depending on the actual situation.
When there is one, the input terminal of the delay module is connected to the output terminal of the baseband bias module 407, the first output terminal of the delay module is connected to the input terminal of the combining module, and the second output terminal of the delay module is connected to the input terminal of the nonlinear compensation module 411.
When there are two, the input end of the delay module 408 is connected to the first output end of the baseband bias module 407, and the output end of the delay module 408 is connected to the input end of the combining module; an input terminal of the delay module 410 is connected to a second output terminal of the baseband bias module 407, and an output terminal of the delay module 410 is connected to an input terminal of the non-linearity compensation module 411.
In particular, for AM modulation in ALC loop, the baseband signal (inner modulation signal or outer modulation signal or mixed modulation signal) needs to be converted according to ALC mode before entering ALC. Therefore, the digital chip further comprises a normalization module, an input end of the normalization module is connected with the first output end of the delay module, and an output end of the normalization module is connected with an input end of the combining module.
If the ALC reference is a logarithmic mode (the reference voltage is expressed by a unit in a dB form), the normalization module is a logarithmic amplifier, the inner modulation signal or the outer modulation signal or the mixed modulation signal is subjected to logarithmic amplification and then added with the ALC reference voltage 4C, namely the combining module is an adder, and the added result is used as the final reference voltage of the ALC loop. If the ALC reference is in a linear mode (the reference voltage is expressed in a unit of volt-V form), the normalization module needs to divide the value of the baseband offset module by the normalization module and then multiply the value of the ALC reference, namely, the combining module is a multiplier, and the multiplied result is used as the final reference voltage of the ALC loop. In linear ALC, the normalization block can be eliminated if the modulation signal is already centered at "1".
Since the design and processing of general digital chips on integers are somewhat simpler than decimal, it is conceivable to multiply the modulation signal by a larger multiplying factor and then finally normalize or directly convert it into final output.
In an analog implementation, the nonlinear compensation of the attenuator is performed on the output signal in dB. And the measure of AM distortion is based on volts (V). As the modulation depth approaches 100%, a 1% change in modulation depth will correspond to a small change in dB at the positive peak of the AM and a large change at the negative peak. Nonlinear compensation in the form of dB is not practical for AM, which is easily distorted at positive peaks. In a digital AM scheme, a compensation scheme for AM applications, i.e., the non-linear compensation module 411, may be designed for AM characteristics.
Fig. 5 is a block diagram of a nonlinear compensation module according to an embodiment of the present invention, and as shown in fig. 5, the nonlinear compensation module 411 includes a main wave table unit 502, a frequency compensation table unit 503, a first multiplier, a second adder, a temperature compensation unit, and a third adder;
the input end of the main wave meter unit 502 is connected with the output end of the delay module, and the input end of the frequency compensation meter unit 503 is connected with the output end of the delay module;
the main wave table unit 502 is configured to perform lookup in a main wave table according to an internal modulation signal, an external modulation signal, or a mixed modulation signal, so as to obtain a first lookup result;
the frequency compensation table unit 503 is configured to search in a frequency compensation table according to the internal modulation signal or the external modulation signal or the hybrid modulation signal to obtain a second table search result;
the first multiplier is used for multiplying the second table look-up result by the frequency coefficient to obtain a multiplication result;
the second adder is used for adding the multiplication result and the first table look-up result to obtain a control voltage;
the temperature compensation unit is used for performing temperature compensation on the control voltage to obtain temperature compensation voltage;
and the third adder is used for adding the temperature compensation voltage and the control voltage to obtain the final control voltage.
In specific implementation, the nonlinear compensation module 411 may further include a first-stage amplifier 501, an input end of the first-stage amplifier is an input end of the nonlinear compensation module, an output end of the first-stage amplifier is connected to an input end of the main wavetable unit, and the first-stage amplifier is used to convert the input amplitude signal 5A into a wavetable input (table lookup address), which is a linear amplifier. The first stage amplifier 501 may also be absent if the incoming amplitude signal is already able to be directly looked up.
The working principle of the nonlinear compensation module is as follows:
the input voltage 5A passes through the first stage linear amplifier 501 and then enters the main wave table and the frequency compensation table respectively, and the corresponding output is obtained by table lookup. And multiplying the table look-up result of the frequency compensation table by the frequency coefficient, and adding the result of the table look-up of the main wave table to obtain the attenuator control voltage 5C without temperature compensation. The uncompensated control voltage 5C enters the temperature compensation module to obtain a corresponding temperature compensation value, and is added to the uncompensated control voltage 5C to obtain a final control voltage 5B.
In specific implementation, the temperature compensation unit is composed of a second-stage amplifier 505, a temperature compensation wavetable unit 506 and a second multiplier. The second stage amplifier 505 is used to convert the control voltage 5C to be compensated into the input of the temperature compensation wave table (table lookup address), after table lookup, an initial compensation voltage is obtained, and the final temperature compensation voltage is obtained only by multiplying the initial compensation voltage by the temperature coefficient 507 through the multiplier.
In specific implementation, the AM attenuator nonlinearity compensation module is used to convert an input signal expressed in units of volts (V) into an actual control voltage of the attenuator, and needs to compensate for a frequency error and a temperature error of the attenuator. Its input 5A can be represented by y ═ a × (1+ sinw0t), and its output 5B is the control voltage of the attenuator at the corresponding frequency and temperature. The attenuator error is measured in volts (V) and is based on a fixed voltage value, which is larger when the difference between the required voltage value and the reference value is larger. The nonlinear compensation module well compensates nonlinearity under one frequency by means of the main wave meter, then compensates control voltages of different frequencies under specific temperature by means of the frequency compensation module, and the result after the frequency compensation is finished enters the temperature compensation module to perform temperature compensation. The temperature compensation module is not arranged in parallel with the frequency compensation module, because the part of the voltage added during the frequency compensation has temperature error, and temperature compensation is also needed.
The basic setting of the frequency compensation is that the attenuation quantity-control voltage curve changes uniformly under different frequencies. That is, if the attenuation versus control voltage curve of the attenuator at the frequency freq1 can be expressed by the function y ═ f1(x), (y is the attenuation, and x is the control voltage) at the frequency freq2 can be expressed by y ═ f2(x), then the curves of the function at other frequencies can be expressed by the function y ═ f1(x) + kf (f2(x) -f1(x)), and kf is the undetermined frequency compensation coefficient, and changes with the frequency. In order to perform frequency compensation, the attenuator is first scanned for attenuation versus control voltage relationships at two frequencies (freq1 and freq2), and a curve at one frequency (reference frequency, freq1) is used as the content of the master wave table (502), and the error between a curve at the other frequency (reference frequency, freq2) and a curve at the previous frequency (control voltage difference at the same attenuation) is used as the content of the frequency compensation wave table (503). The frequency coefficients (504) at the different frequencies are obtained by calibration.
The basic setting of temperature compensation is similar to frequency compensation, i.e. the control voltage varies uniformly with temperature for the same attenuation, but the speed of the control voltage variation with temperature is related to the attenuation and frequency. The temperature characteristic of the attenuator is compensated using a function y0 + m (freq) (T-T0) g (y0), the temperature coefficient 507 comprising the product of m (freq) and (T-T0). Wherein, the input is the control voltage (y0) without compensation (reference temperature, T0), and the output is the control voltage under the current temperature (T) and frequency (freq); m (freq) is a frequency factor which changes with frequency; g (y0) is a damping amount compensation factor, and is related to the control voltage (damping amount). When temperature compensation is carried out, the attenuation quantity-control voltage curve of the attenuator at different temperatures needs to be measured firstly. Then, the attenuation-control voltage curve temperature error under the main wave table frequency (reference frequency, freq1) is calculated and normalized to 1 ℃, and the basic temperature error is obtained. Next, the abscissa (attenuation amount) of the base temperature error is converted into a control voltage at the reference temperature (T0). And finally, linearizing the control voltage-basic temperature error curve to the abscissa (control voltage) to obtain a temperature error wavetable. The frequency factor can be calculated by calculating the basic temperature error proportional coefficient corresponding to the same attenuation (or control voltage) with different frequencies, or can be measured by using a temperature test mode.
The present invention also proposes an embodiment of a digital AM scheme, as shown in fig. 6, a test register 611 is added after the non-linearity compensation module 610.
The working principle is as follows:
after being calibrated by the sampling offset unit 601 and the sampling coefficient unit 602, the user input signal 6A is input as one path of the modulation switch 604, and the modulation signal generated by the internal source 603 is input as the other path. The modulation switch 604 realizes the switching of the internal/external modulation, the modulation factor module 605 realizes the modulation depth variation, and the baseband bias module 606 realizes the offset of the modulation signal. Linear mode ALC requires multiplication of the baseband signal after delay block 607 divided by the baseband offset 608 with the ALC reference DAC. The ALC in the logarithmic mode needs to perform logarithmic amplification on the baseband signal after the delay module 607, and add the baseband signal after amplification by a proper linear multiplying power to the ALC reference DAC. The baseband signal (i.e. the inner modulation signal or the outer modulation signal or the mixed modulation signal) adjusted by the baseband bias module 606 needs to pass through the delay module 609 and the non-linear compensation module 610 to output a signal 6B for controlling the external AM attenuator.
The test register 611 functions to: when the test mode is enabled, the attenuator is controlled directly using the value of test register 611, helping to test the attenuator performance.
The invention has the following effects:
when the attenuator is not subjected to frequency temperature compensation, if the AM carrier frequency changes, the deviation of the positive peak value and the negative peak value of the demodulated AM can reach more than 10%. After a frequency and temperature compensation scheme of a logarithmic mode is used, AM distortion is calibrated, and positive and negative peak value errors under different carrier frequencies can be within 3%. However, the peak error varies greatly with temperature, the modulation depth is set to 90%, the temperature varies by about 5 degrees celsius, and the positive peak varies by about 7%. By using the compensation scheme of the invention, the temperature is-5-55 ℃, the debugging depth is 100%, and the variation of the positive and negative peak value errors is less than about 5%.
It will be apparent to those skilled in the art that the modules or steps of the embodiments of the invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes may be made to the embodiment of the present invention by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.