CN106911906A - It is a kind of to realize the method that 4K ultra high-definition video inputs show - Google Patents
It is a kind of to realize the method that 4K ultra high-definition video inputs show Download PDFInfo
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- CN106911906A CN106911906A CN201510967674.3A CN201510967674A CN106911906A CN 106911906 A CN106911906 A CN 106911906A CN 201510967674 A CN201510967674 A CN 201510967674A CN 106911906 A CN106911906 A CN 106911906A
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- input
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- dvi interface
- dvi
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
Defect it is an object of the invention to solve prior art, there is provided a kind of to realize the method that 4K ultra high-definition video inputs show.Including HDMI (or DVI interface), dual link DVI interface and other different types of video input interfaces, after video data input, by data link processes, then by input mixer, then by image procossing, exported finally by LVDS.After the dual link DVI interface input data, give the corresponding data link of HDMI (or DVI interface) by the data link signal of half (3 tunnel) and processed.After dual link DVI interface input data, with HDMI (or DVI interface) multiplexing clock link signal.The method that utilization DVI dual links of the present invention realize ultra high-definition video input, the DVI double-strand circuit-switched datas of half are processed using HDMI (or DVI interface), the input of dual link DVI signals is realized by multiplexing, to realize processing the image of higher resolution.
Description
Technical field
This patent is related to a kind of method for processing video frequency.
Background technology
At this stage, liquid crystal display is due to having the advantages that lightweight, small volume, little power consumption, radiating low, good quality,
It is widely used in the individual consumer's goods such as notebook computer, computer monitor, TV.Liquid crystal panel can match somebody with somebody when dispatching from the factory
Standby liquid crystal driving plate in itself, but because the occasion of lcd applications is different, may require that matching is various types of
Interface (such as USB interface, AV interfaces, DVI interface, HDMI (or DVI interface), DP interface etc.),
So also needing to increase decoding of the decoding deck to complete all signals.
The decoding deck of current China in the market, primary solutions are provided for MStar.The decoding scheme of MStar
TV market is mainly directed towards, with cheap, the features such as supporting interface is more.There are many video IC companies in addition,
Various types of decoding scheme is provided.
In the decoding scheme that all markets provide at present, DVI dual link input schemes are not supported.DVI dual links have
There is the characteristic of high bandwidth, single channel video input supports that 1920*1080,120Hz refresh rates and 3840*2160,30Hz are brushed
New rate.For the transmission of ultra high-definition signal and 3D signals provides extraordinary solution.
The content of the invention
Defect it is an object of the invention to solve prior art, there is provided a kind of to realize the side that 4K ultra high-definition video inputs show
Method.
To achieve the above object, the present invention uses following technical scheme:
It is a kind of to realize the method that 4K ultra high-definition video inputs show, including HDMI (or DVI interface), dual link
DVI interface and other different types of video input interfaces, after video data input, by data link processes, so
Afterwards by input mixer, then by image procossing, exported finally by LVDS.
After the dual link DVI interface input data, HDMI is given by the data link signal of half (3 tunnel)
(or DVI interface) corresponding data link is processed.After dual link DVI interface (2) input data, with HDMI
Interface (or DVI interface) (1) multiplexing clock link signal.
The input mixer (4) can simultaneously process the data of at least 2 circuit-switched data link processings (3).
The highest resolution that the described dual link DVI interface is supported is 1920*1080P120 and 3840*2160P30.
When dual link DVI interface (2) is input into valid data, the HDMI (or DVI interface) (1) of its multiplexing
Taken by it, it is impossible to be input into other valid data again.
The method that utilization DVI dual links of the present invention realize ultra high-definition video input, using HDMI (or DVI
Interface) treatment half DVI double-strand circuit-switched datas, the input of dual link DVI signals is realized by multiplexing, to realize treatment
The image of higher resolution.
Brief description of the drawings
Fig. 1 is common decoder plate data processing schematic diagram;
Fig. 2 is decoding deck data processing schematic diagram of the invention;
Wherein:1-HDMI interfaces (or DVI interface), 2- dual link DVI interfaces, 3- data link processes, 4- inputs
Blender, 5- image procossings.
Specific embodiment
The present invention will be described in detail below in conjunction with the accompanying drawings:
As shown in figure 1, being the data processing schematic diagram of common decoder plate.Distinct interface (such as USB interface, DP interfaces,
HDMI (or DVI interface) and DVI interface etc.) data output after, by corresponding data link processes, so
View data mixing is carried out by input mixer afterwards, then by image procossing, is finally exported by LVDS.
Because dual link DVI interface is made up of 7 road Low Voltage Differential Signals, wherein 1 road clock differential signal and 6 tunnels regard
Frequency data differential signals.Common link processing only supports the treatment of the Low Voltage Differential Signal on 4 tunnels, including 1 road clock difference
Sub-signal and 3 road video data differential signals.
The present invention transfers to HDMI data link processes by by a half data of dual link DVI signals, will dual link
The multiplexing of clock differential signal, and give HDMI by the video data differential signal of 0-2 roads/3-5 roads (the two selects one)
Data link processes.The link processing of dual link DVI signals is so capable of achieving, the later stage incite somebody to action the two by input mixer again
Signal synthesizes, to complete the treatment of dual link DVI signals.When dual link DVI interface is input into valid data, it is answered
HDMI (or DVI interface) is taken by it, it is impossible to be input into other valid data again.Realized by being multiplexed
The input of dual link DVI signals, to realize the image for the treatment of display higher resolution.
Claims (6)
- It is 1. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:Including HDMI, (or DVI connects Mouthful) (1), dual link DVI interface (2) and other different types of video input interfaces, after video data input, pass through Data link processes (3), it is defeated finally by LVDS then by image procossing (5) then by input mixer (4) Go out.
- It is 2. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:Dual link DVI interface (2) is input into After data, give HDMI (or DVI interface) (1) corresponding data link the data link signal of half (three tunnels) (3) processed.
- It is 3. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:Dual link DVI interface (2) is input into After data, with HDMI (or DVI interface) (1) multiplexing clock link signal.
- It is 4. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:Input mixer (4) can be simultaneously Process the data of at least 2 circuit-switched data link processings (3).
- It is 5. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:The dual link DVI interface (2) is propped up The highest resolution held is 1920*1080P120 and 3840*2160P30.
- It is 6. a kind of to realize the method that 4K ultra high-definition video inputs show, it is characterised in that:It is defeated in dual link DVI interface (2) When entering valid data, the HDMI (or DVI interface) (1) of its multiplexing is taken by it, it is impossible to be input into other significant figures again According to.
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CN201510967674.3A CN106911906A (en) | 2015-12-23 | 2015-12-23 | It is a kind of to realize the method that 4K ultra high-definition video inputs show |
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CN201510967674.3A CN106911906A (en) | 2015-12-23 | 2015-12-23 | It is a kind of to realize the method that 4K ultra high-definition video inputs show |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107911701A (en) * | 2017-11-27 | 2018-04-13 | 南京巨鲨显示科技有限公司 | A kind of 4K Video codings, storage and Transmission system |
CN112312044A (en) * | 2019-07-31 | 2021-02-02 | 西安诺瓦星云科技股份有限公司 | Video interface mode detection method, device and system and display controller |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1761321A (en) * | 2004-10-14 | 2006-04-19 | 安捷伦科技有限公司 | Fiber optic connection for digital displays |
CN102930817A (en) * | 2012-11-15 | 2013-02-13 | 常州电子研究所有限公司 | Digital video interactive (DVI) signal receiver of three-dimensional (3D) light-emitting diode (LED) display screen, and working method of DVI signal receiver |
CN103189852A (en) * | 2010-06-07 | 2013-07-03 | 杰森·A·苏利万 | Systems and methods for dynamic multi-link compilation partitioning |
CN103686123A (en) * | 2012-09-26 | 2014-03-26 | 三星电子株式会社 | Multi viewer display and displaying method of the same |
CN103826081A (en) * | 2013-11-28 | 2014-05-28 | 苏州长风航空电子有限公司 | Dual link DVI signal producing system |
CN103916619A (en) * | 2014-04-11 | 2014-07-09 | 公安部第一研究所 | DVI video signal transmission method and device |
-
2015
- 2015-12-23 CN CN201510967674.3A patent/CN106911906A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1761321A (en) * | 2004-10-14 | 2006-04-19 | 安捷伦科技有限公司 | Fiber optic connection for digital displays |
CN103189852A (en) * | 2010-06-07 | 2013-07-03 | 杰森·A·苏利万 | Systems and methods for dynamic multi-link compilation partitioning |
CN103686123A (en) * | 2012-09-26 | 2014-03-26 | 三星电子株式会社 | Multi viewer display and displaying method of the same |
CN102930817A (en) * | 2012-11-15 | 2013-02-13 | 常州电子研究所有限公司 | Digital video interactive (DVI) signal receiver of three-dimensional (3D) light-emitting diode (LED) display screen, and working method of DVI signal receiver |
CN103826081A (en) * | 2013-11-28 | 2014-05-28 | 苏州长风航空电子有限公司 | Dual link DVI signal producing system |
CN103916619A (en) * | 2014-04-11 | 2014-07-09 | 公安部第一研究所 | DVI video signal transmission method and device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107911701A (en) * | 2017-11-27 | 2018-04-13 | 南京巨鲨显示科技有限公司 | A kind of 4K Video codings, storage and Transmission system |
CN112312044A (en) * | 2019-07-31 | 2021-02-02 | 西安诺瓦星云科技股份有限公司 | Video interface mode detection method, device and system and display controller |
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Application publication date: 20170630 |