CN106897232A - Dynamic Configuration and device - Google Patents
Dynamic Configuration and device Download PDFInfo
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- CN106897232A CN106897232A CN201510947210.6A CN201510947210A CN106897232A CN 106897232 A CN106897232 A CN 106897232A CN 201510947210 A CN201510947210 A CN 201510947210A CN 106897232 A CN106897232 A CN 106897232A
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- dynamic configuration
- buffer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
Abstract
The present invention provides a kind of Dynamic Configuration and device, wherein, described Dynamic Configuration includes：The request of a part in bus freezes the period by waiting from least one of multiple core/processors to dynamic configuration buffer, freeze the bus between at least one in the part and the plurality of core/processor in dynamic configuration buffer, wherein, the plurality of core/processor is used to access at least one part for accessing in the dynamic configuration buffer in the dynamic configuration buffer and the plurality of core/processor；And the size of the part in the dynamic configuration buffer is adjusted, wherein, at least one information that the part in the dynamic configuration buffer is used in the plurality of core/processor of buffer/store.The Dynamic Configuration that the present invention is provided can make portable electronic equipment be equipped with the processor with computing capability/power higher.
Description
Technical field
The present invention is related to Dynamic Configuration, more specifically, being related to Dynamic Configuration and device.
Background technology
According to prior art, in order to save the relevant cost of portable electron device, in portable electron device
Computing capability (calculation capability)/power of processor is generally subject to limitation, wherein, it is portable
Electronic installation can such as mobile phone (such as multifunctional mobile telephone), personal digital assistant (PDA), flat board
Computer (tablet) or notebook (laptop).Assuming that it is cost-effective not in the range of considering, eventually
End subscriber may want to possess in the future the portable electronic dress of the processor for being equipped with computing capability/power higher
Put.However, some problems may be produced therewith.For example, the legacy system framework of correlation technique it is simple and
Polycaryon processor (multi-core processor) may not be supported, can not but ignore the tight of portable electron device
Gather type demand (compact requirement).Again for example, the legacy system framework of correlation technique may be too simple
Multiprocessor (multiple processor) singly cannot be supported, is but still necessary to meet portable electron device
Compact demand.Accordingly, it would be desirable to a kind of novel method has the place of computing capability/power higher to realize outfit
Manage the portable electronic equipment of device.
The content of the invention
In view of this, the present invention provides a kind of Dynamic Configuration and device.
The present invention provides a kind of Dynamic Configuration, including：Bus freeze the period by wait from multiple cores/
The request of a part at least one of processor to dynamic configuration buffer, freezes dynamic configuration caching
The bus between at least one in part and the plurality of core/processor in device, wherein, the plurality of core/
Processor be used to accessing in the dynamic configuration buffer and the plurality of core/processor this at least one be used to access
The part in the dynamic configuration buffer；And adjust the size of the part in the dynamic configuration buffer,
Wherein, the part in the dynamic configuration buffer be used for the plurality of core/processor of buffer/store in this at least
The information of one.
The present invention also provides a kind of dynamic configuration device, including：Multiple core/processors, for performing the dynamic
Multiple operations of configuration device；Dynamic configuration buffer, for the information of the plurality of core/processor of buffer/store,
Wherein, the plurality of core/processor be used to accessing in the dynamic configuration buffer and the plurality of core/processor this extremely
Few one is used to access the part in the dynamic configuration buffer；And dynamic configuration cache controller, use
In the period is freezed by waiting from least one of multiple core/processors to dynamic configuration buffer in bus
A part request, freeze in the part in dynamic configuration buffer and the plurality of core/processor this extremely
Bus between few one, and adjust the size of the part of the dynamic configuration buffer.
Brief description of the drawings
Fig. 1 is the schematic diagram according to one embodiment of the invention dynamic configuration device；
Fig. 2 is the flow chart of the Dynamic Configuration according to one embodiment of the invention；
Fig. 3 is that the dynamic configuration mechanism of the Dynamic Configuration according to second embodiment of the invention Fig. 2 is illustrated
Figure；
Fig. 4 is the configuration schematic diagram of the dynamic configuration buffer according to one embodiment of the invention Fig. 3；
Fig. 5 is that the dynamic configuration mechanism of the Dynamic Configuration according to third embodiment of the invention Fig. 2 is illustrated
Figure；
Fig. 6 is another configuration schematic diagram of the dynamic configuration buffer according to one embodiment of the invention Fig. 5；
Fig. 7 is that the core/processor protection of the dynamic configuration buffer according to another instance graph 5 of the invention is matched somebody with somebody
The schematic diagram put；
Fig. 8 is some related DCCA shapes of Dynamic Configuration according to one embodiment of the invention Fig. 2
The schematic diagram of state and corresponding configuration；
Fig. 9 is the flow chart of the Dynamic Configuration according to another embodiment of the present invention.
Specific embodiment
Some vocabulary have been used in the middle of specification and claims to censure specific element.Affiliated technology
The technical staff in field is, it is to be appreciated that hardware manufacturer may call same element with different nouns.
This specification and claims book, as in the way of distinguishing element, but is existed not by the difference of title with element
Difference functionally is used as the criterion distinguished.In the "comprising" mentioned in specification in the whole text and claim
It is an open term, therefore " include but be not limited to " should be construed to.Additionally, " coupling " one word is herein
Comprising it is any directly and indirectly electrical connection.Therefore, if first device is coupled to second described in text
Device, then representing first device can directly be electrically connected in second device, or through other devices or connection hand
Intersegmental ground connection is electrically connected to second device.
Fig. 1 is refer to, Fig. 1 is the schematic diagram according to one embodiment of the invention dynamic configuration device 100.Root
According to different embodiments, such as first embodiment or its deformation, dynamic configuration device 100 may include electronic installation
At least a portion (such as part or all).For example, dynamic configuration device 100 may include above-mentioned electronics
A part for device, more specifically, dynamic configuration device 100 can be the control circuit (example inside electronic installation
Such as integrated circuit (integrated circuit, IC)).Again for example, dynamic configuration device 100 can be above-mentioned electronics
Device entirety.The example of electronic installation may include, mobile phone (for example, multi-functional mobile phone), PDA, portable
Electronic installation and personal computer, wherein, portable electron device for example (can be based on generalized definition)
Tablet PC, personal computer can such as notebook or desktop computer.
As shown in figure 1, dynamic configuration device 100 may include multiple core/processors 110, and dynamic configuration is filled
Putting 100 can further include on piece (on-chip) memory module 120.Wherein, multiple core/processors 110 include core
/ processor 110-1,110-2 ..., and 110-N.Module 120 can for on-chip memory (On-chip memory)
Cached including on-chip memory 122 (such as static random access memory (SRAM)) and dynamic configuration
(dynamic configurable cache) controller 124.Wherein, on-chip memory 122 may include multiple
Thesaurus (memory bank) 122-1,122-2 ..., and 122-M.Multiple cores/processor 110-1,
110-2 ..., and 110-N be allowed to access on-chip memory 122.Multiple cores/processor 110-1,110-2 ...,
And multiple operations of the executable dynamic configuration devices 100 of 110-N.For example, multiple core/processor 110-1,
110-2 ..., and 110-N at least a portion (such as part or all) can be respectively perform dynamic configuration
Core in one or more processors of the operation of device 100.Again for example, multiple core/processor 110-1,
110-2 ..., and 110-N at least a portion (such as part or all) can be respectively perform dynamic configuration
One or more processors of the operation of device 100.Note that, according to different embodiments, such as first implements
Example or its deformation, core/processor 110-1,110-2 ..., and 110-N may include that one or more center treatment are single
First (central processing unit, CPU), one or more GPUs (graphic processing unit,
GPU), one or more digital signal processors (digital signal processor, DSP), one or more regard
Frequency codec (video coder-decoder, CODEC) and/or one or more audios CODEC.
According to first embodiment, dynamic configuration device 100 may include dynamic configuration buffer, wherein it is possible to
On-chip memory (on-chip memory 122 as shown in Figure 1) realizes dynamic configuration buffer.Dynamic configuration
Buffer can buffer/store multiple core/processor 110-1,110-2 ..., and 110-N information.It is the plurality of
Core/processor 110-1,110-2 ..., and 110-N is for accessing the dynamic configuration buffer and the plurality of core/place
At least one of reason device is for accessing the part in the dynamic configuration buffer.Additionally, dynamic configuration is slow
Memory controller 124 can control the operation of on-chip memory 122 to control the configuration of above-mentioned dynamic configuration buffer.
Note that above-mentioned framework can regard dynamic configuration cache structure (dynamic configurable cache as
Architecture, DCCA).Reference picture 2, the correlative detail of DCCA operations is further described below.
Fig. 2 is the flow chart of the Dynamic Configuration 200 according to one embodiment of the invention.Dynamic configuration side
Method 200 can operate with dynamic configuration device 100 as shown in Figure 1, more specifically, can operate with above-mentioned moving
State allocating cache controller 124.
In step 210, dynamic configuration cache controller 124 can freeze the period (freeze at bus (Bus)
Period) by refusal come from multiple core/processor 110-1,110-2 ..., and in 110-N it is any one
Request, freezes above-mentioned dynamic configuration buffer with multiple (such as multiples in this embodiment of core/processor 110
Core/processor 110-1,110-2 ..., and 110-N) between bus, wherein, the dynamic configuration buffer
Realized with on-chip memory 122.Dynamic configuration cache controller 124 can freeze period refusal and come from bus
Multiple cores/processor 110-1, any one request in 110-2 ..., and 110-N, rather than right refusing
Exhausted any request.That is, dynamic configuration cache controller 124 can freeze the period and temporarily freeze bus in bus,
Rather than freezing bus always.
In a step 220, dynamic configuration cache controller 124 can adjust a part for dynamic configuration buffer
Size, wherein, the part of dynamic configuration buffer can buffer/store multiple core/processor 110-1,
110-2 ..., and one of them of 110-N information.In certain embodiments, dynamic configuration buffer
The part may include thesaurus 122-1,122-2 ..., and at least one of 122-M thesaurus.
Fig. 9 is the flow chart of the Dynamic Configuration 900 according to one embodiment of the invention.Dynamic configuration side
Method 900 can operate with dynamic configuration device 100 as shown in Figure 1, more specifically, can operate with above-mentioned moving
State allocating cache controller 124.
In step 910, dynamic configuration cache controller 124 can freeze the period (freeze period) in bus
By waiting (pend) or postponing (stoll) from least one of the plurality of core/processor 110 (such as sheet
Multiple cores/processor 110-1,110-2 in embodiment ..., and 110-N) in the dynamic configuration buffer
The request of a part, freezes above-mentioned dynamic configuration buffer with multiple (such as this embodiment of core/processor 110
In multiple cores/processor 110-1,110-2 ..., and 110-N) between bus, wherein, the dynamic is matched somebody with somebody
Buffer is put to be realized with on-chip memory 122.That is, during freezing in bus, from the plurality of core/from
Reason device 110-1,110-2 ..., and at least one of 110-N is to the part in the dynamic configuration buffer
Request is waited for.Dynamic configuration cache controller 124 can freeze period wait from multiple in bus
Core/processor 110-1, at least one request in 110-2 ..., and 110-N, rather than right etc.
Treat any request.That is, dynamic configuration cache controller 124 can freeze the period and temporarily freeze bus in bus,
Rather than freezing bus always.In one embodiment, part in the dynamic configuration buffer is adjusted
Size when, the request from the core/processor only related to the part in the dynamic configuration buffer
To be waited/postponed.It should be noted that the request of the wait in the present embodiment includes accessing the dynamic configuration buffer
In the part request.Dynamic configuration cache controller 124 can respond from the plurality of core/processor one
The bus freeze request of individual core/processor and freeze the bus.In one embodiment, the bus freeze request
Can be asked for system random access memory (system random access memory, SYSRAM).Deng
Treat that request is different from bus freeze request.
In step 920, dynamic configuration cache controller 124 can adjust a part for dynamic configuration buffer
Size, wherein, the part of dynamic configuration buffer can buffer/store multiple core/processor 110-1,
110-2 ..., and one of them of 110-N information.In certain embodiments, dynamic configuration buffer
The part may include thesaurus 122-1,122-2 ..., and at least one of 122-M thesaurus.
According to this embodiment, dynamic configuration cache controller 124 can be responded from the plurality of core/processor 110
A core/processor freeze bus to the bus freeze request of the dynamic configuration buffer.For example, ringing
The bus freeze request should be submitted in the core/processor, the bus freeze request may require distributing dynamic configuration
The storage space (memory space) of buffer.Again for example, submitting the bus in response to the core/processor
Freeze request, the bus freeze request may require distributing the exceptional space (additional of dynamic configuration buffer
space).Because the demand of storage space/exceptional space is temporary transient, dynamic configuration cache controller 124
May be in response to the notice of the bus freeze request from core/processor submission and freeze (re-freeze) bus again,
To discharge the storage space/exceptional space, wherein, the notice indicates not needing the exceptional space.Additionally,
For some embodiments, dynamic configuration cache controller 124 can control starting and the frame that bus freezes the period
(frame) change (being for example changed into another frame from a frame) time point alignment (align), with realize maintain/
Improve the purpose of the overall performance of dynamic configuration device 100.This is of the invention not limit merely for the purpose of illustration
In this.According to the deformation of this embodiment, dynamic configuration cache controller 124 can control bus and freeze the period
Initial delay one predefined retardation, to realize maintaining/improving the overall performance of dynamic configuration device 100
Purpose.According to another deformation of this embodiment, when a request is received, dynamic configuration cache controller 124
Can trigger a delay counter to start counting up, and prolonged the starting that bus freezes the period using delay counter
A slow predefined retardation, to realize the purpose of the overall performance for maintaining/improving dynamic configuration device 100.
In certain embodiments, after the operation for completing the size of the part of adjustment dynamic configuration buffer, move
State allocating cache controller 124 can control the bus to be freezed the period and terminates.
According to any deformation of this embodiment or this embodiment, in certain embodiments, when no matter bus is freezed
Whether the starting of section controlled, dynamic configuration cache controller 124 all can the dynamic control freezing period starting.
Therefore in certain embodiments, dynamic configuration cache controller 124 can determine that above-mentioned dynamic is matched somebody with somebody at runtime
Put the conversion timing sequence (timing of switching) between the different configurations of buffer.
The use of the part of correspondence dynamic configuration buffer in different situations may be different.For example, dynamic
The part of allocating cache device can temporarily serve as caching.Again for example, the part of dynamic configuration buffer can be temporary
When be used as buffer (scratch pad memory).Because the use of the part of dynamic configuration buffer is spirit
It is living, dynamic configuration cache controller 124 when needed can dynamic control dynamic configuration buffer configuration.
Thus, it is capable of achieving the purpose of the overall performance of maintenance/improvement dynamic configuration device 100.
Fig. 3 is Dynamic Configuration 200 or dynamic shown in Fig. 9 according to second embodiment of the invention Fig. 2
The dynamic configuration schematic diagram of mechanism of collocation method 900.Wherein, label 320 is used to represent that above-mentioned dynamic is matched somebody with somebody
Put buffer.In this embodiment, by two CPU312 and CPU314 and engine (engine) 316
(for example multimedia (multimedia, MM) processes engine (processing engine)) is used as step 210
The example of middle multiple core/processors 110.Wherein, MM processors may include video CODEC and audio
CODEC etc..
According to this embodiment, CPU312 and CPU314 and engine 316 can be cached using dynamic configuration respectively
Device 320.One of such as any one usable dynamic configuration buffer 320 in CPU312 and CPU314
Partly (such as the part described in step 220) conduct is cached, more specifically, the second level (level two,
L2) cache.Again for example, engine 316 can be used a part (such as step of dynamic configuration buffer 320
The part described in 220 or 920) as buffer, therefore, by using Dynamic Configuration 200 or
Dynamic Configuration 900 come implement adjustment, any one that can be distributed exactly in CPU312 and CPU314
The size of the buffer that the cache size and/or engine 316 for using are used.
Especially, when engine 316 needs (as escribed above) storage space/exceptional space and sends bus
When freeze request (request as escribed above) requires storage space/exceptional space, dynamic configuration buffer control
Device 124 by temporarily for the allocation space of engine 316 (such as one or more thesaurus, it is described above one or more
Individual thesaurus 122-1,122-2 ..., and 122-M), storage space/exceptional space can be provided to engine 316.
For example, one or more thesaurus initially can be used by one of them in CPU312 and CPU314, and it is present
Reallocation (re-arrange) uses this one or more thesaurus by engine 316.Again for example, can not make initially
One or more thesaurus are used, and is distributed now and this one or more thesaurus is used by engine 316.When detecting
When engine 316 does not need storage space/exceptional space (for example, engine 316 sends above-mentioned notice), move
State allocating cache controller 124 can again freeze bus to reallocate/discharge the memory used by engine 316
Space/exceptional space.For example, can be reallocated to for one or more thesaurus by dynamic configuration cache controller 124
One of them in CPU312 and CPU314 is reused or not used.
Fig. 4 is the configuration schematic diagram of the dynamic configuration buffer 320 according to one embodiment of the invention Fig. 3.
For example, due to implementing adjustment, CPU312 by using Dynamic Configuration 200 or Dynamic Configuration 900
96KB (kilobyte) is equal to the cache size that CPU314 is used, and the buffer that engine 316 is used is big
It is small equal to 32KB.Therefore, the cache tag for CPU312 and CPU314 being used is " 96KB cachings ",
And the buffer for using engine 316 is labeled as " 32KB memories ".In certain embodiments, CPU312
With CPU314 can accessed cache (such as 96KB cachings) first finding the data of needs.When in 96KB
When the data of needs are can not find in caching, CPU312 and CPU314 can access external storage by system bus
Device (such as dynamic random access memory (dynamic random access memory, DRAM)).
Fig. 5 is Dynamic Configuration 200 or dynamic shown in Fig. 9 according to third embodiment of the invention Fig. 2
The dynamic configuration schematic diagram of mechanism of collocation method 900, wherein, label 520 is used to represent that above-mentioned dynamic is matched somebody with somebody
Put buffer.In this embodiment, using GPU512 and MM processors 516 as multiple in step 210
The example of core/processor 110.
According to this embodiment, GPU512 and MM processors 516 can respectively use dynamic configuration buffer 520.
Such as GPU512 can be used a part (such as being somebody's turn to do described in step 220 of dynamic configuration buffer 520
Part) as caching.Again for example, MM processors 516 can be used of dynamic configuration buffer 520
Divide (such as the part described in step 220) as buffer, therefore, by using dynamic configuration side
Method 200 come implement adjustment, can exactly distribute cache size and/or MM processors 516 that GPU512 is used
The size of the buffer for using.
Please note the first configuration schematic diagram that Fig. 5 is the dynamic configuration buffer 520 before above-mentioned adjustment.Root
Configure accordingly, the cache size that GPU512 is used is equal to 96KB, and MM processors 516 use it is temporary
Device size is equal to 32KB.Therefore, the cache tag for GPU512 being used is " 96KB cachings ", and will
The buffer that MM processors 516 are used is labeled as " 32KB memories ".When MM processors 516 need
(as escribed above) storage space/exceptional space simultaneously sends bus freeze request (request as escribed above)
It is required that during storage space/exceptional space, dynamic configuration cache controller 124 is by being temporarily MM processors
516 allocation spaces (such as one or more thesaurus, one or more thesaurus 122-1,122-2 ... described above,
And 122-M), storage space/exceptional space can be provided to MM processors 516.For example, according to such as Fig. 6
Shown arrangement, initially can use one or more thesaurus by GPU512, and reallocation is by MM treatment now
Device 516 uses this one or more thesaurus.In this case, dynamic configuration cache controller 124 is in bus
The bus that can freeze between GPU512 and MM processors 516 and dynamic configuration buffer 520 during freezing.
Fig. 6 is that another configuration of the dynamic configuration buffer 520 according to one embodiment of the invention Fig. 5 is shown
It is intended to.For example, due to implementing adjustment, the caching that GPU512 is used by using Dynamic Configuration 200
Size is equal to 64KB, and the buffer size that MM processors 516 are used is equal to 64KB.Therefore, will
The cache tag that GPU512 is used is " 64KB cachings ", and the buffer that MM processors 516 are used
Labeled as " 64KB memories ".Similarly, storage space is not needed when detecting MM processors 516
(such as MM processors 516 send notice as escribed above), dynamic configuration buffer control during/exceptional space
Device 124 can again freeze bus to reallocate/discharge the storage space used by MM processors 516/extra
Space.For example, one or more thesaurus can be reallocated to GPU512 by dynamic configuration cache controller 124
Reuse or do not use.Therefore, the first above-mentioned configuration can be reapplied in dynamic configuration buffer 520.
In another example, when MM processors 516 need above-mentioned memory space/exceptional space and send
Bus freeze request (request as escribed above) to require memory space/exceptional space, control by dynamic configuration caching
Device processed 124 responds the bus freeze request can be freezed MM processors 516 and be exclusively used in during bus is freezed
Bus between a part for the dynamic configuration caching 520 of MM processors 516.Dynamic configuration buffer control
Device 124 can be by the way that for the interim allocation space of MM processors 516, (such as one or more thesaurus are (as described above
One or more thesaurus 122-1,122-2 ..., and 122-M)) for MM processors 516, to provide storage empty
Between/exceptional space.For example, one or more thesaurus can be initially idle storage space, and reset to now by
MM processors are used.Again for example, when the memory space reduction needed for MM processors 516, and MM
Processor 516 sends bus freeze request to notify during dynamic configuration controller 124, dynamic configuration caching control
Device processed 124 responds the bus freeze request can be freezed MM processors 516 and be exclusively used in during bus is freezed
Bus between a part for the dynamic configuration caching 520 of MM processors 516.Dynamic configuration buffer control
Device 124 can by interim distribution be formerly dedicated to MM processors 516 (such as idle storage space or
Shared memory space one or more thesaurus (one or more thesaurus 122-1,122-2 described above ..., and
122-M)) for MM processors 516 provide the memory space for reducing.Fig. 7 is according to another reality of the invention
The core of dynamic configuration buffer 520 shown in illustration 5/processor relaying configuration (protection configuration)
Schematic diagram, wherein, the dynamic configuration cache controller 124 of this embodiment is integrated in dynamic configuration buffer
Among 520.The number M of the thesaurus inside on-chip memory 122 be equal to 4 when, symbol BK0, BK1,
BK2 and BK3 can represent respectively above-mentioned thesaurus 122-1,122-2 ..., and 122-M (more specifically,
Thesaurus 122-1,122-2,122-3 and 122-4).
According to this embodiment, by system random access memory (system random access memory,
SYSRAM) ask as the example of above-mentioned request.Response SYSRAM requests, dynamic configuration buffer control
Device 124 freezes period controllable bus and is frozen in bus.In the dynamic configuration buffer 520 of this embodiment
Dynamic configuration cache controller 124 it is transmittable freeze activity notification (freeze active notification) (
Mark is to freeze activity in Fig. 7 ") to GPU512, to notify that GPU512 freezes the period into bus,
GPU512 is transmittable to freeze completion notice (freeze done notification) (in the figure 7 labeled as " freezing
Complete ") as the response for freezing activity notification.
In this embodiment, according to core/processor relaying configuration, thesaurus BK0 is specific to GPU 512, and
Can not be used by MM processors 516.That is, thesaurus BK0 is GPU exclusive (GPU-dedicated)
Thesaurus, and any one in thesaurus BK0, BK1, BK2 and BK3 can be by GPU 512 and MM
Processor 516 is shared, more specifically, the same time by GPU 512 and MM processors 516 wherein
One is used.The size of each is equal to 32KB's in thesaurus BK0, BK1, BK2 and BK3
In the case of, the big I of the caching that GPU 512 is used is more than or equal to 32KB, and MM processors 516
The buffer for being used can be less equal than 96KB.Therefore, by providing to GPU512, GPU is exclusive deposits
Bank, core/processor relaying configuration can prevent the hydraulic performance decline of GPU512.The similar description of this embodiment is not
It is repeated herein.
Fig. 8 is some DCCA of the correlation of Dynamic Configuration 200 according to one embodiment of the invention Fig. 2
The schematic diagram of state and corresponding configuration.According to this embodiment, can respectively by above-mentioned thesaurus BK0, BK1,
BK2 and BK3 (more specifically, is deposited as the example of above-mentioned thesaurus 122-1,122-2 ..., and 122-M
Bank 122-1,122-2,122-3 and 122-4).For example, each thesaurus BK0, BK1, BK2 and BK3
Big I be equal to 32KB.
As shown in figure 8, the top curve is the demand of MM processors 516 indicates (indicator), its middle finger
The low-level state (low state) for showing can represent that MM processors 516 do not need memory space/exceptional space.
For the DCCA states shown in Fig. 8, DCCA can be in multiple states (such as normal condition and distribution state)
Between changed.For example, dynamic configuration cache controller 124 can control DCCA acquiescences in normal shape
State, and corresponding configuration " 128KB L2 cachings " indicates GPU512 to use thesaurus BK0, BK1, BK2
And the common 128KB memory spaces of whole of BK3 are cached as L2.When the demand of MM processors 516 indicate into
When entering its high-level state, dynamic configuration cache controller 124 can determine that conversion to (dynamic configuration buffer
520) another sequential for configuring can slightly postpone, therefore the first bus freezes the period (i.e. left the half of Fig. 8
Bus shown in part freezes the period) than indicate turning point (transition) (such as rising edge) a little later
Time point start.Therefore, dynamic configuration cache controller 124 the first bus freeze the period can control
DCCA enters distribution state, and matching somebody with somebody for dynamic configuration buffer 520 is changed with according to Dynamic Configuration 200
Put.
Freeze after the period terminates in the first bus, dynamic configuration cache controller 124 can control DCCA again
It is secondary in normal condition, and corresponding configuration " 32KB L2 are cached and 96KB L2 memories " indicates GPU512
Using the 32KB memory spaces in thesaurus BK0, BK1, BK2 and BK3 (for example, such as thesaurus BK0
The exclusive thesaurus of GPU memory space) cached as L2, and more indicate MM processors 516 to use
96KB memory spaces in storehouse BK0, BK1, BK2 and BK3 are (for example, such as thesaurus BK1, BK2
And the memory space of some other thesaurus of BK3) as L2 memories.When MM processors 516
When demand indicates to enter low-level state, dynamic configuration cache controller 124 can determine that conversion to (dynamically matching somebody with somebody
Put buffer 520) another sequential for configuring can slightly postpone, therefore the second bus is freezed the period (i.e.
Bus shown in the right half part of Fig. 8 freezes the period) than indicate turning point (such as rising edge) a little later
Time point start.Therefore, dynamic configuration cache controller 124 the second bus freeze the period can control
DCCA enters distribution state, and matching somebody with somebody for dynamic configuration buffer 520 is changed with according to Dynamic Configuration 200
Put.
Freeze after the period terminates in the second bus, dynamic configuration cache controller 124 can control DCCA again
It is secondary in normal condition, and corresponding configuration " 128KB L2 cachings " indicate GPU512 using thesaurus BK0,
The 128KB memory spaces of BK1, BK2 and BK3 all as L2 cache.The similar of this embodiment is retouched
State and be not repeated herein.
One deformation of the present embodiment according to Fig. 8, freezes after the period terminates, root in the second bus
According to different design requirements, the configuration of dynamic configuration buffer 520 can be any kind of configuration.For example,
Second bus is freezed after the period terminates, a part of above-mentioned thesaurus 122-1,122-2 ..., and 122-M
(more specifically, one or more thesaurus in thesaurus 122-1,122-2,122-3 and 122-4) can
It is (idle) that leaves unused, the preceding sections conduct without reusing thesaurus 122-1,122-2 ..., and 122-M
Caching.The similar description of this deformation is no longer repeated.
Advantage of the invention be method and apparatus proposed by the present invention can provide the release of dynamic configuration buffer/point
With hardware to realize DCCA, without introducing software synchronization punishment (software synchronization penalty).
Additionally, dynamic configuration cache controller can determine that the exchange sequential between different configurations at runtime.And,
The L2 cachings realized according to DCCA can be transparent (user-transparent) storage system of user (i.e. user
The storage system known), and therefore, L2 cachings when needed can services end users well.According to above-mentioned
In embodiment/deformation any one, due to using DCCA electronic installations can be equipped with computing capability higher/
The processor of power, more specifically, polycaryon processor or multiple processors can be equipped with, before ignoring
The compact demand stated simultaneously can be efficiently used buffer/store.
Those skilled in the art understands without departing from the spirit and scope of the present invention, a little when that can do
Changing ought be defined with retouching, therefore protection scope of the present invention depending on appended claims and its equivalent variations
Person is defined.
Claims (20)
1. a kind of Dynamic Configuration, including：
Freeze the period by waiting from least one of multiple core/processors to dynamic configuration buffer in bus
In a part request, freeze in the part in dynamic configuration buffer and the plurality of core/processor should
Bus between at least one, wherein, the plurality of core/processor is used to access the dynamic configuration buffer and be somebody's turn to do
This in multiple core/processors at least one is used to access the part in the dynamic configuration buffer；And
The size of the part in the dynamic configuration buffer is adjusted, wherein, in the dynamic configuration buffer
At least one information that the part is used in the plurality of core/processor of buffer/store.
2. Dynamic Configuration as claimed in claim 1, it is characterised in that the dynamic configuration buffer is with piece
Upper memory is realized and the on-chip memory includes multiple thesaurus；And the part of the dynamic configuration buffer
At least one thesaurus including the plurality of thesaurus.
3. Dynamic Configuration as claimed in claim 1, it is characterised in that the period should be freezed in bus and passed through
Wait from the part at least one to the dynamic configuration buffer in the plurality of core/processor please
Ask, freeze this in the part and the plurality of core/processor in the dynamic configuration buffer between at least one
The step of bus further include：
Respond the bus freeze request from a core/processor of the plurality of core/processor and freeze the bus.
4. Dynamic Configuration as claimed in claim 3, it is characterised in that carried in response to the core/processor
The bus freeze request is handed over, bus freeze request requirement distributes the exceptional space of the dynamic configuration buffer.
5. Dynamic Configuration as claimed in claim 4, it is characterised in that the Dynamic Configuration is further included：
Freeze the bus again in response to submitting the notice of the bus freeze request to from the core/processor, to release
The exceptional space is put, wherein, the notice indicates not needing the exceptional space.
6. Dynamic Configuration as claimed in claim 1, it is characterised in that the Dynamic Configuration is further included：
The time point that the starting for controlling the bus to freeze the period changes with frame aligns.
7. Dynamic Configuration as claimed in claim 1, it is characterised in that the Dynamic Configuration is further included：
The bus is controlled to freeze one pre-set delay amount of initial delay of period.
8. Dynamic Configuration as claimed in claim 1, it is characterised in that the Dynamic Configuration is further included：
After the operation of the size for completing to adjust the dynamic configuration buffer, control the bus to freeze the period and terminate.
9. Dynamic Configuration as claimed in claim 1, it is characterised in that by the dynamic configuration buffer
The part temporarily serves as caching.
10. Dynamic Configuration as claimed in claim 1, it is characterised in that by the dynamic configuration buffer
The part temporarily serve as buffer.
A kind of 11. dynamic configuration devices, including：
Multiple core/processors, the multiple operations for performing the dynamic configuration device；
Dynamic configuration buffer, for the information of the plurality of core/processor of buffer/store, wherein, the plurality of core
/ processor be used to accessing in the dynamic configuration buffer and the plurality of core/processor this at least one be used to deposit
Take the part in the dynamic configuration buffer；And
Dynamic configuration cache controller, for freezing the period by waiting from multiple core/processors in bus
The request of a part at least one to dynamic configuration buffer, freezes the portion in dynamic configuration buffer
Point with the plurality of core/processor in the bus between at least one, and adjust the dynamic configuration buffer
The size of the part.
12. dynamic configuration devices as claimed in claim 11, it is characterised in that the dynamic configuration buffer with
On-chip memory is realized and the on-chip memory includes multiple thesaurus；And the portion of the dynamic configuration buffer
Dividing includes at least one thesaurus of the plurality of thesaurus.
13. dynamic configuration devices as claimed in claim 11, it is characterised in that the dynamic configuration buffer control
Device is more used to respond the bus freeze request from a core/processor of the plurality of core/processor and freeze this
Bus.
14. dynamic configuration devices as claimed in claim 13, it is characterised in that in response to the core/processor
Submit the bus freeze request to, bus freeze request requirement distributes the exceptional space of the dynamic configuration buffer.
15. dynamic configuration devices as claimed in claim 14, it is characterised in that the dynamic configuration buffer control
Device is more used to freeze the bus again in response to submitting the notice of the bus freeze request to from the core/processor,
To discharge the exceptional space；And the notice indicates not needing the exceptional space.
16. dynamic configuration devices as claimed in claim 11, it is characterised in that the dynamic configuration buffer control
The starting that device is more used to control the bus to freeze the period is alignd with the time point of frame change.
17. dynamic configuration devices as claimed in claim 11, it is characterised in that the dynamic configuration buffer control
Device is more used to control the bus to freeze one predefined retardation of initial delay of period.
18. dynamic configuration devices as claimed in claim 11, it is characterised in that adjust the dynamic in completion and match somebody with somebody
After the operation of the size for putting the part of buffer, the dynamic configuration cache controller is more used to control this
Bus is freezed the period and is terminated.
19. dynamic configuration devices as claimed in claim 11, it is characterised in that by the dynamic configuration buffer
The part temporarily serve as caching.
20. dynamic configuration devices as claimed in claim 11, it is characterised in that by the dynamic configuration buffer
The part temporarily serve as buffer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510947210.6A CN106897232A (en) | 2015-12-17 | 2015-12-17 | Dynamic Configuration and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510947210.6A CN106897232A (en) | 2015-12-17 | 2015-12-17 | Dynamic Configuration and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106897232A true CN106897232A (en) | 2017-06-27 |
Family
ID=59188234
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510947210.6A Withdrawn CN106897232A (en) | 2015-12-17 | 2015-12-17 | Dynamic Configuration and device |
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| Country | Link |
|---|---|
| CN (1) | CN106897232A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1043211A (en) * | 1988-12-09 | 1990-06-20 | 比尔股份有限公司 | The electronic system of a plurality of removable units |
| CN103150276A (en) * | 2011-11-28 | 2013-06-12 | 联发科技股份有限公司 | Method and apparatus for performing dynamic configuration |
| US20140365730A1 (en) * | 2011-11-28 | 2014-12-11 | Mediatek Inc. | Method and apparatus for performing dynamic configuration |
-
2015
- 2015-12-17 CN CN201510947210.6A patent/CN106897232A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1043211A (en) * | 1988-12-09 | 1990-06-20 | 比尔股份有限公司 | The electronic system of a plurality of removable units |
| CN103150276A (en) * | 2011-11-28 | 2013-06-12 | 联发科技股份有限公司 | Method and apparatus for performing dynamic configuration |
| US20140365730A1 (en) * | 2011-11-28 | 2014-12-11 | Mediatek Inc. | Method and apparatus for performing dynamic configuration |
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Application publication date: 20170627 |