CN106874218B - A kind of distribution method and its device of mapped address space - Google Patents
A kind of distribution method and its device of mapped address space Download PDFInfo
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- CN106874218B CN106874218B CN201710023593.7A CN201710023593A CN106874218B CN 106874218 B CN106874218 B CN 106874218B CN 201710023593 A CN201710023593 A CN 201710023593A CN 106874218 B CN106874218 B CN 106874218B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
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Abstract
The present invention is suitable for database technical field, provide the distribution method and its device of a kind of mapped address space, if method includes: to detect the first newly-increased memory node in mapped system, the characteristic information of the corresponding mapping address block of the second memory node in mapped system is obtained;According to preset mapping address allocation rule and the characteristic information of mapping address block, determines and need to be migrated from second memory node to the characteristic information of the target mapping address block of the first memory node;According to the characteristic information of target mapping address block by the corresponding data block migration of the target mapping address block to the first memory node;The corresponding memory node information of the characteristic information of target mapping address block is changed to the first memory node.Since the embodiment of the present invention in each original memory node by when the memory node of mapped system changes, extracting corresponding target mapping address block, distributes to newly-increased memory node, realize load balancing.
Description
Technical field
The invention belongs to database technical field more particularly to the distribution methods and its device of a kind of mapped address space.
Background technique
It is also more and more big for the storage demand of data with the fast development of communication network.And existing data storage
Mode data are stored into the storage unit of corresponding mapping address generally by set mapping algorithm.However, existing
Some mapped address space distribution techniques cannot achieve load balancing when the memory node of mapped system changes, and increase newly
The case where storage space utilization of memory node is low, and part memory node is still in high load storage.
Summary of the invention
The distribution method and its device for being designed to provide a kind of mapped address space of the embodiment of the present invention, it is intended to solve
Existing mapped address space distribution technique cannot achieve load balancing, newly when the memory node of mapped system changes
The problem of storage space utilization for increasing memory node is low, and part memory node is still in high load storage.
In a first aspect, the embodiment of the present invention provides a kind of distribution method of mapped address space, the mapped address space
Distribution method include:
If detecting the first newly-increased memory node in mapped system, the second storage section in the mapped system is obtained
The characteristic information of the corresponding mapping address block of point;Second memory node is that original before increasing first memory node newly deposits
Node is stored up, the characteristic information of the mapping address block includes the number and mark of mapping address block;
According to preset mapping address allocation rule and the characteristic information of the mapping address block, determines and need from described
It is migrated in second memory node to the characteristic information of the target mapping address block of first memory node;Wherein, the target
The characteristic information of mapping address block includes the mark of target mapping address block, the corresponding memory node of the target mapping address block
Information and the corresponding data block of the target mapping address block;
According to the characteristic information of the target mapping address block by the corresponding data block migration of the target mapping address block
To first memory node;
The corresponding memory node information of the characteristic information of the target mapping address block is changed to the first storage section
Point.
Second aspect, the embodiment of the present invention provide a kind of distributor of mapped address space, the mapped address space
Distributor include:
Newly-increased nodal test unit, if obtaining institute for detecting the first newly-increased memory node in mapped system
State the characteristic information of the corresponding mapping address block of the second memory node in mapped system;Second memory node is newly-increased described
Original memory node before first memory node, the characteristic information of the mapping address block include mapping address block number and
Mark;
Migration address block message determination unit, for according to preset mapping address allocation rule and the mapping address
The characteristic information of block determines and needs to be migrated from second memory node to the target mapping address of first memory node
The characteristic information of block;Wherein, the characteristic information of the target mapping address block includes the mark of target mapping address block, the mesh
Mark the corresponding memory node information of mapping address block and the corresponding data block of the target mapping address block;
Data block transmission unit, for according to the characteristic information of the target mapping address block by the target mapping address
The corresponding data block migration of block is to first memory node;
Address block corresponding informance changing unit, for saving the corresponding storage of the characteristic information of the target mapping address block
Point information is changed to first memory node.
The distribution method and its device for implementing a kind of mapped address space provided in an embodiment of the present invention have beneficial below
Effect:
If the embodiment of the present invention obtains the mapping by detecting the first newly-increased memory node in mapped system
The characteristic information of the corresponding mapping address block of second memory node in system;Second memory node is to increase described first newly to deposit
Original memory node before storing up node, the characteristic information of the mapping address block includes the number and mark of mapping address block;
According to preset mapping address allocation rule and the characteristic information of the mapping address block, determines and need from second storage
It is migrated in node to the characteristic information of the target mapping address block of first memory node;Wherein, the target mapping address
The characteristic information of block include the mark of target mapping address block, the corresponding memory node information of the target mapping address block and
The corresponding data block of the target mapping address block;The target is mapped according to the characteristic information of the target mapping address block
The corresponding data block migration of address block is to first memory node;The characteristic information of the target mapping address block is corresponding
Memory node information is changed to first memory node, so as to when the memory node of mapped system changes, In
Corresponding target mapping address block, distribution to newly-increased memory node are extracted in each original memory node, and each storage saves
Point reduces the storage pressure of its own, and newly-increased memory node also reaches biggish storage space utilization, realizes that load is equal
The purpose of weighing apparatus.
Detailed description of the invention
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only of the invention some
Embodiment for those of ordinary skill in the art without any creative labor, can also be according to these
Attached drawing obtains other attached drawings.
Fig. 1 is a kind of flow chart of the distribution method of mapped address space provided in an embodiment of the present invention;
Fig. 2 a be another embodiment of the present invention provides a kind of mapped address space distribution method flow chart;
Fig. 2 b be another embodiment of the present invention provides a kind of mapped address space distribution method according to preset step-length
The schematic diagram that mapping address block is migrated;
Fig. 3 is a kind of structural block diagram of the distributor of mapped address space provided in an embodiment of the present invention;
Fig. 4 be another embodiment of the present invention provides a kind of mapped address space distributor structural block diagram.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The embodiment of the present invention in each original memory node by mentioning when the memory node of mapped system changes
Corresponding target mapping address block is taken, distribution to newly-increased memory node solves existing mapped address space distribution technique,
When the memory node of mapped system changes, load balancing cannot achieve, increase the storage space utilization of memory node newly
The problem of low, and part memory node is still in high load storage.
In embodiments of the present invention, the executing subject of process is the distributor of mapped address space.The mapping address is empty
Between distributor can be mapped system server, in addition to the address space for the memory node for including to mapped system is allocated
Outside, the other functions such as data mapping storage be can also carry out;The device device of mapped address space can also be separately as a third
Square address management and control devices execute batch operation to the mapped address space of mapped system.Particularly, the mapping of the embodiment of the present invention
System is specially hash mapping (Hash mapping) system, and mapping address is data corresponding hash after hash functional operation
Value.Fig. 1 shows the implementation flow chart of the objective method of distribution of mapped address space provided in an embodiment of the present invention, and details are as follows:
In S101, if detecting the first newly-increased memory node in mapped system, obtain in the mapped system
The characteristic information of the corresponding mapping address block of second memory node;Second memory node is to increase first memory node newly
The characteristic information of preceding original memory node, the mapping address block includes the number and mark of mapping address block.
In the present embodiment, whether the distributor real-time monitoring of mapped address space has memory node to be added to mapping system
In system, the memory node of the addition is the first memory node.
In the present embodiment, which can be one, or at least two, mapped address space
Distributor will acquire the number of the second memory node when judging whether there is newly-increased memory node.And it second is deposited according to this
The number for storing up node executes corresponding batch operation.The number of second memory node can be one, or at least two.
In the present embodiment, if judgement has newly-increased memory node and is added to mapped system, the related streams of S101 will be executed
Journey operation;If judgement is not present, monitoring operation is continued to execute.
In the present embodiment, mapped system when establishing for the first time, by preset mapping address allocation rule, by mapping ground
Location block distributes to the second memory node.
In the present embodiment, the distributor of mapped address space will acquire the corresponding mapping address block of the second memory node
Characteristic information.Mapped system is unable to ensure the mapping that each original memory node includes when carrying out mapping address distribution
Number of addresses is consistent, in order to obtain better load balancing effect, before carrying out address space allocation, first obtains the second storage section
The corresponding mapping address block of point.
In the present embodiment, the characteristic information of mapping address block includes the number and mark of mapping address block, wherein institute
The mark for stating mapping address block includes but is not limited to: the mapping address block pair in all mapping address blocks that mapped system includes
The label answered, the corresponding label of mapping address block and mapping in all mapping address blocks that the second memory node includes
The mapping address that address block includes.
In S102, according to preset mapping address allocation rule and the characteristic information of the mapping address block, determine
It needs to migrate from second memory node to the characteristic information of the target mapping address block of first memory node;Its
In, the characteristic information of the target mapping address block includes the mark of target mapping address block, the target mapping address block pair
The memory node information and the corresponding data block of the target mapping address block answered.
In the present embodiment, it due to needing that the mapping address information of the second memory node will be corresponded to originally, migrates to the
In one memory node, then need to learn the mark of the mapping address and the corresponding stored data information of the mapping address.
Therefore, in S102, the characteristic information of target mapping address block will be determined.
In the present embodiment, target mapping address block is specially to be migrated in mapping address block that the second memory node includes
Mapping address block, the number of target mapping address block is at least one.
In the present embodiment, the corresponding memory node of each target mapping address block, the memory node and target
The corresponding relationship of location block is memory node information.
In the present embodiment, each mapping address have corresponding data space, by the data space into
The storage of row data, the set of the stored data of the data space for the mapping address that mapping address block includes is that this is reflected
Penetrate the corresponding data block of address block.
In S103, according to the characteristic information of the target mapping address block by the corresponding number of the target mapping address block
It migrates according to block to first memory node.
In S104, the corresponding memory node information of the characteristic information of the target mapping address block is changed to described
One memory node.
In the present embodiment, it due to needing the characteristic information to target mapping address block to migrate, will actually be somebody's turn to do
The corresponding memory node of mapping address block identification is changed to the first memory node and stores the mapping address block identification and first
Node associates, which is also correspondingly migrated to the first memory node and carries out corresponding deposit
Storage.Illustratively, when user needs to inquire the data in target mapping address block, mapped system will directly inquire the first storage
Data in node in respective objects mapping address block carry out inquiry operation without visiting again the second memory node.
In the present embodiment, the corresponding data block of target mapping address can be migrated by communication network, it can also be with
Corresponding data block is migrated by movable storage device.
Above as can be seen that a kind of distribution method of mapped address space provided in an embodiment of the present invention is reflected by preset
Address division rule is penetrated, the mapping address of memory node original in mapped system is divided, each original storage section
Point includes multiple mapping address blocks;It judges whether there is newly-increased memory node and is added to the mapped system;If it exists, according to pre-
If mapping space allocation algorithm and original memory node in include mapping address block, in each original storage
Specific mapping address block is extracted in node as mapping address block to be transferred;By mapping address block to be transferred and described
The corresponding data of mapping address block to be transferred are sent to the newly-increased memory node, so as to work as the storage section of mapped system
When point changes, suitable mapping address block is extracted in each original memory node, is distributed to newly-increased memory node, and
Each memory node reduces the storage pressure of its own, and newly-increased memory node also reaches biggish storage space utilization,
Realize the purpose of load balancing.
On the other hand, the embodiment of the present invention is only by the mapping address and the corresponding number of mapping address in original memory node
It is transferred to newly-increased memory node according to orientation, the process of data exchange is not generated between original memory node, to reduce newly-increased
Data exchange amount when node, to improve the rate of mapped address space foundation.
Fig. 2 shows another embodiment of the present invention provides a kind of mapped address space distribution method flow chart.Ginseng
As described in Fig. 2 a, relative to a upper embodiment, a kind of distribution method of mapped address space provided in this embodiment further include with
Lower step, details are as follows:
Further, as another embodiment of the present invention, if described detect that newly-increased first is deposited in mapped system
Node is stored up, then before obtaining the corresponding mapping address block feature information of the second memory node in the mapped system further include:
In S201, according to the preset modulus factor, mapping address identical with the modulus factor value quantity is set.
In the present embodiment, mapping corresponding relationship function is modular arithmetic function, by data and preset modulus to be mapped
The factor carries out modulo operation, determines the corresponding mapping address of the data according to operation result.Therefore, when mapped system is established,
It needs to plan the mapping address with modulus factor value equivalent, in order to actually deposit in the mapping address and mapped system after operation
Mapping address correspond.
Illustratively, the preset modulus factor is 10240, certain data is " 56 ", then transports the data by mould with 10240
It calculates function and carries out modulo operation, is i.e. 56%10240=56, then the data are stored in packet by the corresponding mapping address 56 of the data
In memory node containing the mapping address marked as 56.
In S202, the mapping address is combined with preset quantity, obtains multiple mapping address blocks.
In the present embodiment, the mapping address of preset quantity is combined, obtains a mapping address block.It is to mapping
All mapping address carry out above-mentioned operation in system, will obtain multiple mapping address blocks.Illustratively, with 10 mapping address
As a mapping address block, which includes 10240 mapping address, will obtain 1024 mapping address blocks.
Optionally, the mapping address in a mapping address block is continuous mapping address.Illustratively, a certain mapping ground
Location block includes 10 mapping address, and mapping address is 0 to 9.
In S203, the multiple mapping address block is individually assigned to second memory node, establishes mapping address
The corresponding relationship of block and the second memory node.
In the present embodiment, when mapped system is established for the first time, the second memory node is unallocated mapping address, therefore will
Obtained multiple mapping address blocks are divided, are individually assigned to the second memory node, wherein the second memory node only exists one
When, all mapping address blocks are distributed on second memory node.
In the present embodiment, it after mapping address block being assigned to corresponding second memory node, also needs to establish mapping address
The corresponding relationship of block and the second memory node, when in order to receive the data wait store when mapped system, by number to be stored
According to being stored in the memory node of correspondence mappings address block.
In embodiments of the present invention, corresponding mapping address is arranged by the preset modulus factor, and by mapping address into
Row, which combines, the relevant operations such as is allocated as a whole, handles and inquires, and will improve address lookup and data store
Rate.Also, when memory node number, which is sent, to be changed, the migration of mapping address is carried out also based on mapping address block, convenient for reflecting
Penetrate the batch operation of the distributor of address space.
In S204, if detecting the first newly-increased memory node in mapped system, obtain in the mapped system
The characteristic information of the corresponding mapping address block of second memory node;Second memory node is to increase first memory node newly
The characteristic information of preceding original memory node, the mapping address block includes the number and mark of mapping address block
Since S204 is identical as the step S101 in a upper embodiment, referring specifically to step S101 in a upper embodiment
Associated description, details are not described herein again.
Further, described according to preset mapping address allocation rule and institute as another embodiment of the present invention
The characteristic information of mapping address block is stated, determines and needs to be migrated from second memory node to the mesh of first memory node
Mark the characteristic information of mapping address block specifically:
In S205, the mapping address block sum that the mapped system includes, and the newly-increased rear mapped system are obtained
The memory node number for including.
In S206, according to the mapping address block sum and memory node number, determine each in the mapped system
The number for the mapping address block that memory node distributes.
In the present embodiment, in order to reach the load balancing of each memory node in mapped system after distribution, according to acquisition
Obtained mapping address block sum and memory node number, determines the load capacity that each memory node should bear, i.e., each deposits
Store up the corresponding mapping address block number mesh of node.
In the present embodiment, since comprising mapping address block number purpose memory node the more, storage demand amount also will
The more, thus to the mapping address block of each memory node distribution corresponding number, guarantee the storage demand amount of each memory node
It is same or equivalent.
Illustratively, the mapped system includes 1024 mapping address blocks, and after increasing memory node newly, mapped system includes
3 memory nodes, then first memory node distributes 342 mapping address blocks, second memory node distributes 341 mapping ground
Location block, third memory node distribute 341 mapping address blocks.As it can be seen that the mapping address block number phase of each memory node distribution
It is same or suitable.
In S207, the number of the mapping address distributed according to each memory node and the mapping address
The number of mapping address block in the characteristic information of block determines and needs to migrate from each second memory node to described the
The migration number of the target mapping address block of one memory node.
In the present embodiment, due to increasing memory node, i.e. after the first memory node, the storage pressure of the second memory node
Power drop is reduced, that is, needs to migrate the mapping address block of respective numbers to the first memory node.And the migration number is each to deposit
Mapping address block in the number mapping address block message corresponding with the second memory node of mapping address after storing up node distribution
Number between difference.
Illustratively, the number for the mapping address that each memory node distributes is 341, and a certain second memory node
The number of mapping address block in corresponding mapping address block message is 512, then the mapping address number for needing to migrate is 512-
341=171.
Optionally, in the present embodiment, the mapping address block number mesh that each second memory node includes indicates with a [i], wherein
I is the corresponding label of each second memory node, it is assumed that mapped system original includes N number of memory node, is deposited after newly-increased comprising N+1
Node is stored up, then the corresponding migration number of each second memory node
In S208, by preset address extraction rule, extracts from each second memory node and moved with described
Move the characteristic information of the identical target mapping address block of number quantity.
In the present embodiment, by preset address extraction rule, in the mapping address block that the second memory node includes,
Extract the characteristic information of target mapping address block identical with transport number mesh number amount.
Optionally, it is sequentially arranged according to the mark of mapping address from as low as big, chooses and identify less or identify larger
Mapping address block as target mapping address block, and obtain the characteristic information of target mapping address block.
In embodiments of the present invention, it by the mapping address block number mesh after each memory node distribution of determination, then determines
The target mapping address block number mesh for needing to migrate, realizes the equilibrium assignment of mapping address block, to realize the negative of mapped system
It carries balanced.
Further, described by preset address extraction rule as another embodiment of the present invention, from each described
The characteristic information of target mapping address block identical with the transport number mesh number amount is extracted in second memory node specifically:
In S2081, according to the mark of preset step interval and the mapping address block, from the second storage section
The characteristic information of target mapping address block identical with the transport number mesh number amount is extracted in point;Wherein, the preset step-length
For the memory node number.
In the present embodiment, the mapping address root tuber in the second memory node corresponds to mark according to it and is sequentially arranged, by basis
The numerical values recited of memory node number determines the target mapping address block in the second memory node as step-length, until determining and institute
The identical target mapping address block of transport number mesh number amount is stated, the corresponding characteristic information of target mapping address block is then extracted.
Optionally, in the present embodiment, it according to the label of the second memory node, is stored with mapping address block identification and second
The consistent mapping address block of nodal scheme is as first aim mapping address block.
Illustratively, if certain the second memory node marked as 2, preset step-length be 3, then will be in second memory node
2 mapping address block is identified as first aim mapping address block, then the target mapping address block of next determination reflects
Address block is penetrated marked as 5, and so on, until determining required amount of destination address block.
Method described in embodiment to facilitate the understanding of the present invention, illustratively, referring to fig. 2 shown in b, mapped system includes
Two the second memory nodes and first memory node, each second memory node has 6 mapping address blocks, wherein respectively
The identification number of mapping address block is as shown in the figure.According to S207 it is found that each second memory node need to migrate 2 mapping address blocks.
In the present embodiment, since mapped system includes 3 memory nodes, then preset step-length is 3.First choose the second storage
Mapping address block in node 1 marked as 1 extracts second as target mapping address block, then with the step-length of 3 address date blocks
4th mapping address block in memory node 1, i.e., the mapping address block marked as 7 is as target mapping address block;For second
Memory node 2 is chosen since the memory node is marked as 2, thus from second mapping address BOB(beginning of block), i.e., will be marked as 4
Mapping address block as target mapping address block;It can similarly obtain, the mapping address block marked as 10 will also be mapped as target
Address block.It this four target mapping address blocks will be migrated to the first memory node marked as 1,4,7 and 10.
In embodiments of the present invention, it is distributed and stores for the ease of mapping address, by preset step-length, interval, which is chosen, to be corresponded to
Mapping address block as target mapping address block.Since data generally have continuity, if by being mapped similar in mapping address
Address block is placed in same memory node, then when carrying out data storage may certain memory nodes data traffic will suddenly on
It rises, and the routing for being sent to other memory nodes would sit idle for, to reduce the efficiency of data storage.Thus, pass through preset step-length
Target mapping address block is chosen at interval, then can effectively solve above-mentioned situation.
In S209, according to the characteristic information of the target mapping address block by the corresponding number of the target mapping address block
It migrates according to block to first memory node.
Since S209 is identical as the step S103 in a upper embodiment, referring specifically to step S101 in a upper embodiment
Associated description, details are not described herein again.
In S210, the corresponding memory node information of the characteristic information of the target mapping address block is changed to described
One memory node.
Since S210 is identical as the step S104 in a upper embodiment, referring specifically to step S104 in a upper embodiment
Associated description, details are not described herein again.
In S211, according to the characteristic information of the target mapping address block, the target mapping address block and institute are established
The corresponding relationship of the first memory node is stated, and removes target mapping address block pass corresponding with second memory node
System.
In the present embodiment, since the corresponding memory node of mapping address block in mapped system is changed, in order to
Mapping address inquiry and data storage are carried out convenient for mapped system, will be obtained and be established target mapping address block from newly and deposited with first
The corresponding relationship of node is stored up, and removes the corresponding relationship of target mapping address block and the second memory node, avoids information entanglement
Situation.
In the present embodiment, the corresponding relationship is stored in the distributor of mapped address space, when each mapping system
When the memory node of system changes, the relevant entry information that will update in the corresponding relationship.
In embodiments of the present invention, by establishing the corresponding relationship list of mapping address block and memory node, convenient for mapping
System carries out the operation of inquiry and data storage.
Fig. 3 shows the structural block diagram of the distributor of mapped address space provided in an embodiment of the present invention, the mapping
The each unit that the distributor in location space includes is used to execute each step in the corresponding embodiment of Fig. 1.Referring specifically to Fig. 1 with
Associated description in embodiment corresponding to Fig. 1.For ease of description, only the parts related to this embodiment are shown.
Referring to Fig. 3, the distributor of the mapped address space includes:
Newly-increased nodal test unit 31, if being obtained for detecting the first newly-increased memory node in mapped system
The characteristic information of the corresponding mapping address block of second memory node in the mapped system;Second memory node is newly-increased institute
Original memory node before stating the first memory node, the characteristic information of the mapping address block include the number of mapping address block with
And mark;
Migration address block message determination unit 32, for according to preset mapping address allocation rule and mapping ground
The characteristic information of location block determines the target mapping ground for needing to migrate from second memory node to first memory node
The characteristic information of location block;Wherein, the characteristic information of the target mapping address block includes the mark, described of target mapping address block
The corresponding memory node information of target mapping address block and the corresponding data block of the target mapping address block;
Data block transmission unit 33, for mapping ground for the target according to the characteristic information of the target mapping address block
Block corresponding data block migration in location is to first memory node;
Address block corresponding informance changing unit 34, for by the corresponding storage of characteristic information of the target mapping address block
Nodal information is changed to first memory node.
Optionally, shown in Figure 4, in another embodiment, the distributor of the mapped address space in the embodiment
Including each module be used to run each step in the corresponding embodiment of Fig. 2, details are as follows:
Mapping address setting unit 401, for according to the preset modulus factor, setting and the modulus factor value quantity
Identical mapping address;
Mapping address block generation unit 402 obtains multiple reflect for being combined the mapping address with preset quantity
Penetrate address block;
Mapping address block corresponding informance determination unit 403, it is described for the multiple mapping address block to be individually assigned to
Second memory node establishes the corresponding relationship of mapping address block and the second memory node.
Newly-increased nodal test unit 404, if being obtained for detecting the first newly-increased memory node in mapped system
The characteristic information of the corresponding mapping address block of second memory node in the mapped system;Second memory node is newly-increased institute
Original memory node before stating the first memory node, the characteristic information of the mapping address block include the number of mapping address block with
And mark;
Mapped system information acquisition unit 405, the mapping address block sum for including for obtaining the mapped system, and
The memory node number that the mapped system includes after newly-increased;
Average address block number mesh determination unit 406 is used for according to the mapping address block sum and memory node number, really
The number for the mapping address block that each memory node distributes in the fixed mapped system;
Migration address block number decision unit 407, the mapping address for being distributed according to each memory node
Number and the mapping address block in the mapping address block feature information number, determine need deposited from each described second
It migrates in storage node to the migration number of the target mapping address block of first memory node;
Migration address block message extraction unit 408, for being deposited from each described second by preset address extraction rule
Store up the characteristic information that target mapping address block identical with the transport number mesh number amount is extracted in node.
Step-length extraction unit 4081, for the mark according to preset step interval and the mapping address block, from institute
State the characteristic information that target mapping address block identical with the transport number mesh number amount is extracted in the second memory node;Wherein, institute
Stating preset step-length is the memory node number.
Data block transmission unit 409, for being mapped the target according to the characteristic information of the target mapping address block
The corresponding data block migration of address block is to first memory node;
Address block corresponding informance changing unit 410, for depositing the characteristic information of the target mapping address block is corresponding
Storage nodal information is changed to first memory node.
Corresponding relationship list generation unit 411, for the characteristic information according to the target mapping address block, described in foundation
The corresponding relationship of target mapping address block and first memory node, and remove the target mapping address block and described second
The corresponding relationship of memory node.
Therefore, the distributor of mapped address space provided in an embodiment of the present invention can equally work as the storage of mapped system
When node changes, suitable mapping address block is extracted in each original memory node, is distributed to newly-increased memory node,
And each memory node reduces the storage pressure of its own, newly-increased memory node also reaches biggish memory space and utilizes
Rate realizes the purpose of load balancing.On the other hand, the embodiment of the present invention only by the mapping address in original memory node and is reflected
It penetrates the corresponding data orientation in address and is transferred to newly-increased memory node, do not generate the process of data exchange between original memory node,
To reduce data exchange amount when newly-increased node, to improve the rate of mapped address space foundation.
It is apparent to those skilled in the art that for convenience of description and succinctly, only with above-mentioned each function
Can unit, module division progress for example, in practical application, can according to need and by above-mentioned function distribution by different
Functional unit, module are completed, i.e., the internal structure of described device is divided into different functional unit or module, more than completing
The all or part of function of description.Each functional unit in embodiment, module can integrate in one processing unit, can also
To be that each unit physically exists alone, can also be integrated in one unit with two or more units, it is above-mentioned integrated
Unit both can take the form of hardware realization, can also realize in the form of software functional units.In addition, each function list
Member, the specific name of module are also only for convenience of distinguishing each other, the protection scope being not intended to limit this application.Above system
The specific work process of middle unit, module, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
It is implemented in hardware or software, the specific application and design constraint depending on technical solution.Professional technician
Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed
The scope of the present invention.
In embodiment provided by the present invention, it should be understood that disclosed device and method can pass through others
Mode is realized.For example, system embodiment described above is only schematical, for example, the division of the module or unit,
Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be with
In conjunction with or be desirably integrated into another system, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling or direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit or
Communication connection can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme
's.
It, can also be in addition, each functional module in each embodiment of the present invention can integrate in one processing unit
It is that modules physically exist alone, can also be integrated in one unit with two or more modules.Above-mentioned integrated list
Member both can take the form of hardware realization, can also realize in the form of software functional units.
If the integrated unit is realized in the form of SFU software functional unit and sells or use as independent product
When, it can store in a computer readable storage medium.Based on this understanding, the technical solution of the embodiment of the present invention
Substantially all or part of the part that contributes to existing technology or the technical solution can be with software product in other words
Form embody, which is stored in a storage medium, including some instructions use so that one
Computer equipment (can be personal computer, server or the network equipment etc.) or processor (processor) execute this hair
The all or part of the steps of bright each embodiment the method for embodiment.And storage medium above-mentioned include: USB flash disk, mobile hard disk,
Read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic
The various media that can store program code such as dish or CD.
Embodiment described above is merely illustrative of the technical solution of the present invention, rather than its limitations;Although referring to aforementioned reality
Applying example, invention is explained in detail, those skilled in the art should understand that: it still can be to aforementioned each
Technical solution documented by embodiment is modified or equivalent replacement of some of the technical features;And these are modified
Or replacement, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution should all
It is included within protection scope of the present invention.
Claims (10)
1. a kind of distribution method of mapped address space, which is characterized in that the distribution method of the mapped address space includes:
If detecting the first newly-increased memory node in mapped system, the second memory node pair in the mapped system is obtained
The characteristic information for the mapping address block answered;Second memory node is original storage section before increasing first memory node newly
The characteristic information of point, the mapping address block includes the number and mark of mapping address block;
According to preset mapping address allocation rule and the characteristic information of the mapping address block, determines and need from described second
It is migrated in memory node to the characteristic information of the target mapping address block of first memory node;Wherein, the target mapping
The characteristic information of address block includes the mark of target mapping address block, the corresponding memory node information of the target mapping address block
And the corresponding data block of the target mapping address block;
According to the characteristic information of the target mapping address block by the corresponding data block migration of the target mapping address block to institute
State the first memory node;The corresponding data block of the target mapping address block is specially to have stored in the target mapping address block
Data;
The corresponding memory node information of the characteristic information of the target mapping address block is changed to first memory node.
2. the distribution method of mapped address space according to claim 1, which is characterized in that described according to preset mapping
The characteristic information of address allocation rule and the mapping address block determines and needs to be migrated from second memory node to institute
State the characteristic information of the target mapping address block of the first memory node specifically:
Obtain the mapping address block sum that the mapped system includes, and the memory node that the newly-increased rear mapped system includes
Number;
According to the mapping address block sum and memory node number, determine that each memory node distributes in the mapped system
The number of the mapping address block arrived;
In the number and the mapping address block feature information of the mapping address distributed according to each memory node
Mapping address block number, determine need migrated from each second memory node to the mesh of first memory node
Mark the migration number of mapping address block;
By preset address extraction rule, extracted from each second memory node identical as the transport number mesh number amount
Target mapping address block characteristic information.
3. the distribution method of mapped address space according to claim 2, which is characterized in that described to pass through preset address
Extracting rule extracts target mapping address block identical with the transport number mesh number amount from each second memory node
Characteristic information specifically:
According to the mark of preset step interval and the mapping address block, extracted from second memory node with it is described
The characteristic information of the identical target mapping address block of transport number mesh number amount;Wherein, the preset step-length is the memory node
Number.
4. the distribution method of mapped address space according to claim 1-3, which is characterized in that it is described will be described
The corresponding memory node information of the characteristic information of target mapping address block is changed to after first memory node further include:
According to the characteristic information of the target mapping address block, the target mapping address block and first memory node are established
Corresponding relationship, and remove the corresponding relationship of the target mapping address block Yu second memory node.
5. the distribution method of mapped address space according to claim 4, which is characterized in that if described in mapped system
It detects the first newly-increased memory node, then obtains the corresponding mapping address block feature of the second memory node in the mapped system
Before information further include:
According to the preset modulus factor, mapping address identical with the modulus factor value quantity is set;
The mapping address is combined with preset quantity, obtains multiple mapping address blocks;
The multiple mapping address block is individually assigned to second memory node, mapping address block is established and the second storage saves
The corresponding relationship of point.
6. a kind of distributor of mapped address space, which is characterized in that the distributor of the mapped address space includes:
Newly-increased nodal test unit, if being reflected described in acquisition for detecting the first newly-increased memory node in mapped system
Penetrate the characteristic information of the corresponding mapping address block of the second memory node in system;Second memory node is to increase described first newly
The characteristic information of original memory node before memory node, the mapping address block includes the number and mark of mapping address block
Know;
Migration address block message determination unit, for according to preset mapping address allocation rule and the mapping address block
Characteristic information determines and needs to be migrated from second memory node to the target mapping address block of first memory node
Characteristic information;Wherein, the characteristic information of the target mapping address block includes that the mark of target mapping address block, the target are reflected
Penetrate the corresponding memory node information of address block and the corresponding data block of the target mapping address block;
Data block transmission unit, for according to the characteristic information of the target mapping address block by the target mapping address block pair
The data block migration answered is to first memory node;The corresponding data block of the target mapping address block is specially the target
Stored data in mapping address block;
Address block corresponding informance changing unit, for believing the corresponding memory node of the characteristic information of the target mapping address block
Breath is changed to first memory node.
7. the distributor of mapped address space according to claim 6, which is characterized in that the migration address block message
Determination unit specifically includes:
Mapped system information acquisition unit, for obtaining the mapping address block sum that the mapped system includes, and it is newly-increased after
The memory node number that the mapped system includes;
Average address block number mesh determination unit, described in determining according to the mapping address block sum and memory node number
The number for the mapping address block that each memory node distributes in mapped system;
Migration address block number decision unit, the number of the mapping address for being distributed according to each memory node with
And the number of the mapping address block in the characteristic information of the mapping address block, it determines and needs from each second memory node
It is middle to migrate to the migration number of the target mapping address block of first memory node;
Migration address block message extraction unit, for regular by preset address extraction, from each second memory node
The middle characteristic information for extracting target mapping address block identical with the transport number mesh number amount.
8. the distributor of mapped address space according to claim 7, which is characterized in that the migration address block message
Extraction unit specifically includes:
Step-length extraction unit is deposited for the mark according to preset step interval and the mapping address block from described second
Store up the characteristic information that target mapping address block identical with the transport number mesh number amount is extracted in node;Wherein, described preset
Step-length is the memory node number.
9. according to the distributor of the described in any item mapped address spaces of claim 6-8, which is characterized in that the mapping ground
The distributor in location space further include:
Corresponding relationship list generation unit is established the target and is reflected for the characteristic information according to the target mapping address block
The corresponding relationship of address block Yu first memory node is penetrated, and removes the target mapping address block and the second storage section
The corresponding relationship of point.
10. the distributor of mapped address space according to claim 9, which is characterized in that the mapped address space
Distributor further include:
Mapping address setting unit, for being arranged identical with the modulus factor value quantity according to the preset modulus factor
Mapping address;
Mapping address block generation unit obtains multiple mapping address for being combined the mapping address with preset quantity
Block;
Mapping address block corresponding informance determination unit, for the multiple mapping address block to be individually assigned to second storage
Node establishes the corresponding relationship of mapping address block and the second memory node.
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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US8737408B1 (en) * | 2009-03-11 | 2014-05-27 | Amazon Technologies, Inc. | Managing communications for modified computer networks |
CN104182176A (en) * | 2013-05-24 | 2014-12-03 | 华中科技大学 | Rapid dilatation method for RAID 5 (redundant array of independent disks) |
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---|---|---|---|---|
US8737408B1 (en) * | 2009-03-11 | 2014-05-27 | Amazon Technologies, Inc. | Managing communications for modified computer networks |
CN103348653A (en) * | 2012-01-17 | 2013-10-09 | 华为技术有限公司 | Capacity expansion method and device and data access method and device |
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