CN106873267A - Display panel - Google Patents

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Publication number
CN106873267A
CN106873267A CN201510924046.7A CN201510924046A CN106873267A CN 106873267 A CN106873267 A CN 106873267A CN 201510924046 A CN201510924046 A CN 201510924046A CN 106873267 A CN106873267 A CN 106873267A
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CN
China
Prior art keywords
common signal
edge
data wire
connection pad
signal connection
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Granted
Application number
CN201510924046.7A
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Chinese (zh)
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CN106873267B (en
Inventor
余翊菱
林峻良
蔡嘉豪
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Innolux Corp
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Innolux Display Corp
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Priority to CN201510924046.7A priority Critical patent/CN106873267B/en
Publication of CN106873267A publication Critical patent/CN106873267A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The present invention provides a display panel, comprising:One substrate, comprising a viewing area and a non-display area;Multi-strip scanning line, is arranged on the viewing area;A plurality of data lines, is arranged on the viewing area and is staggered to define multiple pixel cells with those scan lines;One first common signal line, is arranged on the viewing area and is staggered with those data wires;And one first common signal connection pad, it is arranged in one of them of those pixel cells of the viewing area, it is electrically connected with the first common signal line, and between the first common signal connection pad is located at wherein two adjacent data lines of those data wires;Wherein the first common signal connection pad has different minimum ranges respectively from two adjacent data line.

Description

Display panel
Technical field
The present invention is the set location tool of the first common signal connection pad in espespecially a kind of viewing area on a kind of display panel There is the display panel of particular design.
Background technology
As display technology constantly improves, all of display panel is sent out towards the trend such as small volume, thickness of thin, lightweight Exhibition, therefore the display equipment of main flow develops into thin display, such as liquid crystal by conventional cathode-ray tube on the market at present Show panel, organic LED display panel or inorganic light-emitting diode display panel etc..Wherein, thin display can be applied Field it is quite a lot of, the mobile phone that is used in daily life, notebook computer, video camera, camera, music player, movement are led The display panels such as boat device, TV, it is most of to use those display panels.
Although liquid crystal display panel or organic LED display panel have been display panel common on the market, especially It is that the technology of liquid crystal display panel is even more quite ripe, but as display panel is continued to develop and consumer shows to display panel Show that quality requirement is improved increasingly, Ge Jia manufacturers strongly develop the display panel with more high display quality invariably.Wherein, show One of element configuration and design in the viewing area of panel, the factor as influence display panel whole efficiency.
In view of this, the element configuration and design still needed at present in the viewing area for display panel are improved, more to enter One step lifts the display quality of display panel.
The content of the invention
The main object of the present invention is to provide a kind of display panel, wherein by designing the first common signal in viewing area The set location of connection pad, to avoid data wire from thering is the excessive problem of parasitic capacitance to produce with the first electrically conducting transparent interlayer above it It is raw.
Display panel of the invention is included:One substrate, comprising a viewing area and a non-display area;Multi-strip scanning line, is set In the viewing area;A plurality of data lines, is arranged on the viewing area and is staggered to define multiple pixel lists with those scan lines Unit;One first common signal line, is arranged on the viewing area and is staggered with those data wires;And one first common signal connect Pad, is arranged in one of them of those pixel cells of the viewing area, is electrically connected with the first common signal line, and this first Between common signal connection pad is located at wherein two adjacent data lines of those data wires;Wherein the first common signal connection pad and the two-phase Adjacent data wire has different minimum ranges respectively.
In display panel of the invention, the first common signal line includes a first metal layer, first common signal Connection pad includes a second metal layer, wherein one first insulating barrier is arranged between the first metal layer and the second metal layer and wraps Containing one first hole, the second metal layer is via first hole and the first metal layer directly contact.Additionally, one second insulation Layer is arranged in the second metal layer and comprising one second hole, and the second metal layer is transparent with one first via second hole Conductive layer directly contact, wherein second hole partly overlap with first hole.Furthermore, one the 3rd insulating barrier be arranged on this On two insulating barriers and comprising one the 3rd hole, one of them of first transparency conducting layer and one second transparency conducting layer were located at should 3rd insulating barrier and the second insulation interlayer and another on the 3rd insulating barrier, and first transparency conducting layer is via this 3rd hole and the second transparency conducting layer directly contact.Wherein, the 3rd hole not with first hole and the second hole weight It is folded.
In display panel of the invention, by the minimum range of the first common signal connection pad two data lines adjacent thereto It is designed to differ, to avoid data wire from having the excessive problem of parasitic capacitance to produce with the first electrically conducting transparent interlayer above it. More specifically, it is settable to have the first common signal connection pad in a pixel cell of display panel;When a common signal be intended to by When the first metal layer is transferred to the second transparency conducting layer, by can make the first metal layer and second metal layer directly contact first Hole, can make the signal transmission to second metal layer, then, directly be connect with the first transparency conducting layer by that can make second metal layer The second tactile hole, can make the signal be transferred to the first transparency conducting layer again, then, by that can make the first transparency conducting layer and 3rd hole of two transparency conducting layer directly contacts, can make the signal be transferred to the second transparency conducting layer again.Therefore, in a pixel In unit, except the first hole of the first common signal connection pad of correspondence, also need setting that the first transparency conducting layer and second is saturating The 3rd hole that bright conductive layer is electrically connected with.If by the minimum range of the first common signal connection pad two data lines adjacent thereto When being designed to identical, the position of the 3rd hole can be caused closer to data wire;Although data wire has absolutely with electrically conducting transparent interlayer Edge layer is isolated, but because the hole sidewalls of insulating barrier are sloped sidewall, in the case of the 3rd hole location is closer to data wire, Data wire top can be caused to be sloped sidewall, because sloped sidewall is exhausted with electrically conducting transparent interlayer to isolating metal layer herein Edge layer thinner thickness so that the insulating barrier shielding between first and second transparency conducting layer and data wire is poor, and have parasitic electricity Hold excessive problem.Therefore, in display panel of the invention, by the first common signal connection pad two data lines adjacent thereto Minimum range be designed to difference, can so make the position of the 3rd hole further from data wire, it is to avoid first and second is transparent The poor problem of insulating barrier shielding between conductive layer and data wire, and then reduce first and second transparency conducting layer and data wire Between parasitic capacitance.
In display panel of the invention, in sectional view or top view, the border of second hole surmounts first gold medal Belong to the edge of layer;In other words, the border of second hole is located at outside the first metal layer;More in other words, first metal The edge of layer is located in second hole.
Additionally, display panel of the invention may also include one second common signal connection pad, one the 3rd common signal connection pad, one Second common signal line and one the 3rd common signal line, wherein the second common signal line and the 3rd common signal line are arranged on The viewing area is simultaneously staggered with those data wires, and the second common signal connection pad and the 3rd common signal connection pad are arranged on The viewing area is simultaneously electrically connected with the second common signal line and the 3rd common signal line;Wherein second common signal connects Pad be located between the first common signal connection pad and the 3rd common signal connection pad, and the first common signal connection pad with this second be total to It is not equal to the spacing between the second common signal connection pad and the 3rd common signal connection pad with the spacing between signal bonding pad.
In display panel of the invention, the first common signal line includes a protuberance, is handed over positioned at those data wires Fault and towards the data wire length direction protrude.
Additionally, in display panel of the invention, at first hole, the first metal layer and the second metal layer Angle is more than 0 degree and less than 45 degree.
Furthermore, in display panel of the invention, the first common signal connection pad has a first edge and one second side Edge, and the first edge is relative with the second edge, and those data wires include one first data wire and one second data wire, its In the first common signal connection pad be located between first data wire and second data wire, the first data wire relative proximity this One edge, and the second data wire relative proximity second edge;Wherein, first data wire and the first edge and this second Data wire and minimum range of the second edge on those scan line bearing of trends be respectively one first distance and one second away from From.Wherein, in terms of the implementation, when width of those pixel cells on the bearing of trend of those scan lines is 300~320 μm when, this first distance and the second distance difference be 1.5~299 μm;In in terms of another implementation, when those pixel cells When width on the bearing of trend of those scan lines is 200~220 μm, the difference of first distance and the second distance is 1.5~196.17 μm;In in terms of another implementation, when width of those pixel cells on the bearing of trend of those scan lines is At 145~165 μm, the difference of first distance and the second distance is 1.5~144.75 μm;And in terms of the more implementation in, When width of those pixel cells on the bearing of trend of those scan lines be 100~120 μm when, this first distance and this second The difference of distance is 1.5~93.33 μm.Here, the first common signal connection pad also has one the 3rd edge, and the 3rd edge Two ends intersect with the first edge and the second edge respectively;Wherein, the bearing of trend of the 3rd edge and those scan lines It is substantial parallel.
Brief description of the drawings
Fig. 1 is the generalized section of the display panel of one embodiment of the invention.
Fig. 2 is the top view of the thin film transistor base plate viewing area of the display panel of one embodiment of the invention.
Fig. 3 A and 3B are the enlarged drawing of the subregion of the thin film transistor base plate of the display panel of one embodiment of the invention.
Fig. 4 and Fig. 5 are respectively cuing open for the subregion of the thin film transistor base plate of the display panel of one embodiment of the invention Face schematic diagram.
Fig. 6 is the enlarged drawing of the subregion of the thin film transistor base plate of the display panel of a comparative example of the invention.
Fig. 7 is the generalized section of the subregion of the thin film transistor base plate of the display panel of a comparative example of the invention.
【Symbol description】
1,21 substrate 11,11a scan lines
The data wire of 12 data wire 121 first
122 second data wire 13a the first common signal lines
The common signal lines of 13b the second common signal lines 13c the 3rd
131 protuberance 14a the first common signal connection pads
The common signal connection pads of 14b the second common signal connection pads 14c the 3rd
The second edge of 141 first edge 142
The offside substrate of 143 the 3rd edge 2
22 the first metal layer 22a edges
The hole of 23 first insulating barrier 231 first
The insulating barrier of 24 second metal layer 25 second
The hole of 25a borders 251 second
26 insulating barrier 26a hole sidewalls
The transparency conducting layer of 261,262 hole 27
The hole of 28 the 3rd insulating barrier 281 the 3rd
The display layer of 29 transparency conducting layer 3
AA viewing areas B non-display areas
C positions the first distances of D1
D2 second distance P pixel cells
R1 regions S1, S2 spacing
X bearing of trend Y directions
W, W1, W2, W3, W4, W5, width θ angles
W6
Specific embodiment
Embodiments of the present invention are illustrated the following is by particular specific embodiment, the personage for being familiar with this technology can be by this Content disclosed in specification understands other advantages of the invention and effect easily.The present invention also can be by other different tools Body embodiment is implemented or applied, and the various details in this specification can not depart from this for different viewpoints and application yet Various modifications and change are carried out under the spirit of invention.
Furthermore, the word of ordinal number such as " first ", " second ", " the 3rd " etc. used in specification and claims, with Modify claims element, itself and unexpectedly contain and represent the request element have it is any before ordinal number, do not represent a certain yet Order in request element and the order or manufacture method of another request element, the use of those ordinal numbers is only used for making having One request element of certain name is able to that with another request element with identical name clear differentiation can be made.
Fig. 1 is the generalized section of the display panel of one embodiment of the invention.Wherein, the display panel bag of the present embodiment Include:Substrate 1, is set comprising viewing area AA and non-display area B, and non-display area B around viewing area AA;Offside substrate 2, with substrate 1 is oppositely arranged;Display layer 3, between offside substrate 2 and substrate 1.In the present embodiment, substrate 1 can for top be provided with it is thin The thin film transistor base plate of film electricity crystal structure (not shown), and offside substrate 2 can (figure be not for top is provided with chromatic filter layer Show) colored filter substrate;However, in other embodiments of the invention, chromatic filter layer (not shown) may also be arranged on On substrate 1, now, substrate 1 is then thin film transistor base plate (the color filter on of integral color filter array Array, COA).Additionally, the display layer 3 in the display panel of the present embodiment can be liquid crystal layer, organic light-emitting diode element layer Or inorganic light-emitting diode element layer.When the display layer 3 in the display panel of the present embodiment is liquid crystal layer, the present embodiment it is aobvious Show that panel also includes backlight module, located at the lower section of substrate 1.Next, will be described in the set unit above the viewing area AA of substrate 1 The architectural feature of part.
Fig. 2 is the top view of the thin film transistor base plate viewing area of the display panel of one embodiment of the invention.Such as Fig. 1 and figure Shown in 2, the display panel of the present embodiment also includes:Multi-strip scanning line 11, is arranged on viewing area AA;A plurality of data lines 12, is set AA and it is staggered to define multiple pixel cell P with scan line 11 in viewing area;At least one the first common signal lines 13a, is arranged on viewing area AA and is staggered with data wire 12;And the first common signal connection pad 14a, it is arranged on viewing area AA Pixel cell P one of them in, be electrically connected with the first common signal line 13a, and the first common signal connection pad 14a be located at number Between wherein two adjacent data lines 12 according to line 12.Accordingly, the first common signal connection pad 14a can be by the first common signal line 13a Signal transmission arrive, for example, on connected transparency conducting layer.Setting and operation on the first common signal connection pad 14a Content will in detail be described after.
Fig. 3 A and Fig. 3 B are the enlarged drawing of the region R1 shown in Fig. 2, wherein in order to clearly show that, Fig. 3 B are identical with Fig. 3 A View, its difference essentially consists in the filling line during Fig. 3 B do not show Fig. 3 A;Fig. 4 is the section of the L1-L2 hatchings shown in Fig. 3 A Schematic diagram;And Fig. 5 is the generalized section of the L3-L4 hatchings shown in Fig. 3 A.As shown in Fig. 3 A to Fig. 5, display of the invention In panel, the first metal layer 22 is formed on substrate 21, wherein the first metal layer 22 is formed through the technique such as exposure imaging and etching The common signal line 13a of scan line 11 and first.The first insulating barrier 23 is formed on the first metal layer 22, and the first insulating barrier 23 has First hole 231, to appear part the first metal layer 22 (for example, first common signal line 13a).Then, in the first insulating barrier Second metal layer 24 is formed on 23, wherein second metal layer 24 is formed through the technique such as exposure imaging and etching includes the first data The data wire 12 (as shown in Figure 2) of the data wire 122 of line 121 and second and the first common signal connection pad 14a.In second metal layer 24 The second insulating barrier 25 is formed, and the second insulating barrier 25 has the second hole 251.Insulating barrier 26 is formed on second insulating barrier 25, and Insulating barrier 26 has hole 261,262 and hole sidewalls 26a.Then, transparency conducting layer 27 is formed on the insulation layer 26.It is transparent to lead The 3rd insulating barrier 28 is formed in electric layer 27, and the 3rd insulating barrier 28 has one the 3rd hole 281.Then, then in the 3rd insulating barrier Transparency conducting layer 29 is formed on 28.
In the present embodiment, substrate 21 can be used made by such as substrate material such as glass, plastics, flexible materials.The One insulating barrier 23, the second insulating barrier 25, the 3rd insulating barrier 28 and insulating barrier 26 can be used oxide (for example, silica, oxidation Aluminium), the insulating layer material such as nitride (for example, silicon nitride) or nitrogen oxides (for example, silicon oxynitride) makes.The first metal layer 22 And second metal layer 24 can be used conductive material, such as metal, alloy, metal oxide, metal oxynitride or other electrode materials Material is made.Transparency conducting layer 29 and transparency conducting layer 27 then can be used such as ITO, IZO or ITZO transparency conductive electrode material It is made.However, in other embodiments of the invention, the material of aforementioned components is not limited to that.
As shown in figure 4, in the display panel of the present embodiment, the 3rd insulating barrier 28 is arranged on the second insulating barrier 25 and wraps Containing the 3rd hole 281, transparency conducting layer 27 is located between the 3rd insulating barrier 28 and the second insulating barrier 25 and transparency conducting layer 29 then sets In on the 3rd insulating barrier 28, and transparency conducting layer 29 is via the 3rd hole 281 and the directly contact of transparency conducting layer 27.
Additionally, as shown in Fig. 3 A and Fig. 5, in the display panel of the present embodiment, the first common signal line 13a is by the first gold medal Category layer 22 is formed, and the first common signal connection pad 14a is formed by second metal layer 24, wherein the first insulating barrier 23 is arranged on the first gold medal Between category layer 22 and second metal layer 24 and comprising the first hole 231, and second metal layer 24 is via the first hole 231 and first The directly contact of metal level 22.In other words, the first common signal connection pad 14a is via the first hole 231 and the first common signal line 13 are electrically connected with.Additionally, the second insulating barrier 25 is arranged in second metal layer 24 and comprising the second hole 251, and the second metal Layer 24 is via the second hole 251 and the directly contact of transparency conducting layer 29.In other words, the first common signal line 13a is via first Common signal connection pad 14a is electrically connected with transparency conducting layer 29.Here, not formed at the first common signal connection pad 14a being formed Transparency conducting layer 27 as shown in Figure 4.
Additionally, in the display panel of the present embodiment, as shown in Fig. 3 A and Fig. 3 B, the first common signal connection pad 14a has First edge 141 and second edge 142, and first edge 141 is relative with second edge 142, the first common signal connection pad 14a In between the first data wire 121 and the second data wire 122, the relative proximity first edge 141 of the first data wire 121, and the second data The relative proximity second edge 142 of line 122.Furthermore, the first common signal connection pad 14a also has the 3rd edge 143, and the 3rd edge Intersect with first edge 141 and second edge 142 respectively at 143 two ends;Wherein, the 3rd edge 143 and the side of extension of scan line 11 It is parallel to X.Wherein, the first data wire 121 and the data wire 122 of first edge 141 and second and second edge 142 are in scan line 11 Minimum range on bearing of trend X is respectively first apart from D1 and second distance D2.
As shown in Fig. 3 A to Fig. 5, when a common signal is intended to by the first common signal line 13a (the first metal layer 22 of Fig. 5) When being transferred to transparency conducting layer 27, the first common signal connection pad 14a (second metal layer 24 of Fig. 5) via the first hole 231 with The directly contact of the first metal layer 22 and be electrically connected to each other, and it is common that common signal can be made to be transferred to first by the first metal layer 22 Signal bonding pad 14a (second metal layer 24 of Fig. 5);Then, the first common signal connection pad 14a (second metal layer 24 of Fig. 5) warps It is electrically connected to each other with the directly contact of transparency conducting layer 29 by the second hole 251, can makes to be transferred to being total to for second metal layer 24 Transparency conducting layer 29 is also transferred to again with signal;Then, transparency conducting layer 29 is straight with transparency conducting layer 27 via the 3rd hole 281 Contact and be electrically connected to each other, therefore, the common signal for being transferred to transparency conducting layer 29 can be made also to be transferred to electrically conducting transparent again Layer 27.
In the present embodiment, transparency conducting layer 27 is used as common electrode layer, and transparency conducting layer 29 is used as pixel electrode layer.This Outward, in the present embodiment, disclose transparency conducting layer 27 and be located at transparency conducting layer between the 3rd insulating barrier 28 and the second insulating barrier 25 29 on the 3rd insulating barrier 28;However, in other embodiments of the invention, as long as transparency conducting layer 29, electrically conducting transparent Layer 27, the first metal layer 22 and the mutual electrical connection of second metal layer 24 as previously described, and transparency conducting layer 29 And the setting upper and lower relation of transparency conducting layer 27 is not limited to as shown in figure 4, the 3rd insulating barrier 28 can be located at for one of them With between the second insulating barrier 25 and another on the 3rd insulating barrier 28.
As shown in Fig. 3 A to Fig. 5, in a pixel cell, except the first common signal connection pad 14a of correspondence (and its is included Second metal layer 24) the first hole 231 outside, also need setting to be electrically connected with transparency conducting layer 29 and transparency conducting layer 27 The 3rd hole 281, and the first hole 231 and the 3rd hole 281 are on the first common signal line 13a and miss one another and set Put.
Fig. 6 is the enlarged drawing of the subregion of the thin film transistor base plate of the display panel of a comparative example of the invention, its with Fig. 3 A of one embodiment of the invention are identical view;And Fig. 7 is generalized sections of the Fig. 6 along L1-L2 hatchings, itself and the present invention Fig. 4 of one embodiment is identical view.If as shown in fig. 6, the first common signal connection pad 14a is placed in into the first number adjacent thereto In the middle of the data wire 122 of line 121 and second, i.e. the first data wire 121 and second the first common signal connection pad 14a adjacent thereto When the minimum range (that is, first apart from D1 and second distance D2) of data wire 122 is designed to identical, the position of the 3rd hole 281 Can be closer to the first data wire 121;As shown in FIG. 6 and 7, although the first data wire 121 (second metal layer 24) with it is transparent There is insulating barrier 26 to isolate between conductive layer 27, but because the hole sidewalls 26a of insulating barrier 26 is sloped sidewall, in the 3rd hole 281 Put in the case of closer to the first data wire 121 (second metal layer 24), (second metal layer of the first data wire 121 can be caused 24) top is the hole sidewalls 26a of insulating barrier 26, because the sloped sidewall of hole sidewalls 26a is used to isolate the first number herein According to the thinner thickness of insulating barrier 26 between line 121 (second metal layer 24) and transparency conducting layer 27;Particularly, if pixel cell is being swept When retouching the reduced width on the bearing of trend X of line 11, in the case of the first common signal connection pad 14a sizes are similar, insulating barrier 26 Hole 261 may be located immediately at the top of the first data wire 121 (second metal layer 24) so that the data wire of part first 121 (that is, second metal layers 24) or even only transmit the second insulating barrier 25 and isolate with transparency conducting layer 27.Therefore, in this comparative example In the case of shown, the shielding of insulating barrier 26 between the data wire 121 (that is, second metal layer 24) of transparency conducting layer 27 and first compared with Difference, and have the excessive problem of parasitic capacitance.
Review embodiments of the invention, as shown in Fig. 3 B and Fig. 4, the first common signal connection pad 14a it is adjacent thereto first The data wire 122 of data wire 121 and second has different minimum ranges (that is, first apart from D1 and second distance D2) respectively, special Be not first apart from D1 more than second distance D2, can so make the position of the 3rd hole 281 further from the first data wire 121 (second metal layer 24), it is to avoid in foregoing comparative example between the data wire 121 (second metal layer 24) of transparency conducting layer 27 and first The poor problem of shielding because the hole sidewalls 26a of insulating barrier 26 is relatively thin, and then reduce the data wire of transparency conducting layer 27 and first Parasitic capacitance between 121 (second metal layers 24).
As shown in Figure 3 B, first apart from D1 and second distance D2 and the first data wire 121, the second data wire 122 and first Width of the common signal connection pad 14a on the bearing of trend X of scan line 11 is related, also with the set location of the 3rd hole 281 and its Aperture on the bearing of trend X of scan line 11 is related.In one embodiment, on the bearing of trend X of scan line 11, the 3rd hole 281 and first being at least 1 μm (micron) or more apart from width W1 between data wire 121;The aperture W2 of the 3rd hole 281 At least 1.5 μm or more;3rd hole 281 and the first common signal connection pad 14a apart from width W3 be at least 2 μm or with On;The width W4 of the first common signal connection pad 14a is at least 3.5 μm or more;First common signal connection pad 14a and the second data Between line 122 2 μm or more are at least apart from width W5;The width W6 of the first data wire 121 and the second data wire 122 is at least 2 μm or more;And the width W of pixel cell is then width W1, the summation of W2, W3, W4, W5, W6.Therefore, in the present embodiment, First can respectively by shown in following formula (1) and (2) apart from the bound of D1, and second distance D2 is then equal to width W5.
First apart from D1 lower limits=W1+W2+W3 (1)
First apart from the D1 upper limits=W-W6-W5-W4 (2)
For example, when width W of the pixel cell on the bearing of trend X of scan line 11 is 309 μm, first apart from D1 and The difference of second distance D2 can be 1.5~299 μm;When pixel cell width W be 206 μm when, first apart from D1 and second away from It can be 1.5~-196.17 μm from the difference of D2;When the width W of pixel cell is 155 μm, first apart from D1 and second distance The difference of D2 can be 1.5~144.75 μm;And when the width W of pixel cell is 103 μm, first apart from D1 and second distance D2 Difference can be 1.5~93.33 μm.If the variability of technique is considered, when pixel cell is on the bearing of trend X of scan line 11 Width W be 300~320 μm when, first apart from D1 and second distance D2 difference can be 1.5~299 μm;When the width of pixel cell Degree W be 200~220 μm when, first apart from D1 and second distance D2 difference can be 1.5~196.17 μm;When pixel cell Width W be 145-165 μm when, first apart from D1 and second distance D2 difference can be 1.5~144.75 μm;And work as pixel cell Width W be 100~120 μm when, first apart from D1 and second distance D2 difference be 1.5~93.33 μm.
Foregoing width W, W1, W2, W3, W4, W5, W6 and first, apart from the upper lower limit value of D1, is according to patterning at present Numerical value obtained by the electrical relationship of technique and required each interelement;If however, Patternized technique improvement and required each interelement Electrical relationship when having some change, foregoing width W, W1, W2, W3, W4, W5, W6, first is apart from the upper lower limit value of D1 and first Difference apart from D1 and second distance D2 can be not limited to disclosed numerical value.
Additionally, in one embodiment of this invention, as shown in Fig. 2 the display panel of the present embodiment is also common comprising second Signal bonding pad 14b, the 3rd common signal connection pad 14c, the second common signal line 13b and the 3rd common signal line 13c.Here, the The structure of two common signal connection pad 14b and the 3rd common signal connection pad 14c is identical with the first common signal connection pad 14a, therefore herein Repeat no more.Additionally, the second common signal line 13b and the 3rd common signal line 13c be arranged on viewing area AA (as shown in Figure 1) and It is staggered with data wire 12, and the second common signal connection pad 14b and the 3rd common signal connection pad 14c are arranged on viewing area AA (as shown in Figure 1) and it is electrically connected with the second common signal line 13b and the 3rd common signal line 13c;Wherein second common letter Number connection pad 14b is located between the first common signal connection pad 14a and the 3rd common signal connection pad 14c, and the first common signal connection pad 14a It is not equal between the second common signal connection pad 14b and the 3rd common signal connection pad 14c with the spacing between the second common signal connection pad 14b Spacing.Here, " spacing between the first common signal connection pad 14a and the second common signal connection pad 14b is not equal to the second common letter Spacing number between connection pad 14b and the 3rd common signal connection pad 14c " is defined by as following:If using scan line 11a as benchmark, First common signal connection pad 14a, the second common signal connection pad 14b and the 3rd common signal connection pad 14c extend with scan line 11 Can vertically be respectively corresponding to the position C on scan line 11a on direction X vertical direction Y, and the spacing between adjacent position C S1, S2 are unequal.
As it was previously stated, in Fig. 3 A to Fig. 5, when a common signal is bestowed, permeable first common signal connection pad 14a, Second common signal connection pad 14b and the 3rd common signal connection pad 14c (second metal layer 24 of Fig. 5) are transferred to transparency conducting layer 27 so that the whole face homogenization of the voltage of transparency conducting layer 27;Therefore, in the present embodiment, as shown in Fig. 2 two adjacent first is common It is unequal with the spacing between signal bonding pad 14a, the second common signal connection pad 14b and the 3rd common signal connection pad 14c, with Avoid producing the visible ripple of human eye (mura).
Additionally, in the present embodiment, as shown in Figure 3A, the first common signal line 13a also includes protuberance 131, positioned at First data wire 121 and the staggered place of the second data wire 122 and towards the first data wire 121 or the length direction of the second data wire 122 (direction Y) is prominent;Whereby, increasing the contact of the first common signal line 13a and the first data wire 121 and the second data wire 122 Area.Due to the setting of the first common signal line 13a so that first during formation the first data wire 121 and the second data wire 122 Common signal line 13a and the first data wire 121 and the staggered place of the second data wire 122 can produce a difference of height;Therefore it is common to work as first Holding wire 13a can increase the first common signal line 13a and first when this staggered place includes protuberance 131 by protuberance 131 The contact area of the data wire 122 of data wire 121 and second, breaks during reducing to form the first data wire 121 and the second data wire 122 The risk of line.Meanwhile, assemble in this staggered place prevented also from etching liquid, further to reduce the first data wire 121 and the second number According to the risk that line 122 breaks.
As shown in Fig. 3 A and Fig. 5, in the display panel of the present embodiment, the second hole 251 and the part of the first hole 231 are heavy Folded, i.e., both are dislocation design.Particularly, in the profile of Fig. 5, the border 25a of the second hole 251 surmounts the first metal layer 22 edge 22a, i.e. the border 25a of the second hole 251 be located at the first metal layer 22 outside, that is, the first metal layer 22 edge 22a is located in the second hole 251.In this case, such as Fig. 5 dotted line marked positions, the edge 22a of the first metal layer 22 can make thereon The second metal layer 24 that side is formed has a height to rise and fall, and increases the surface area of second metal layer 24;In this way, when second On metal level 24 formed transparency conducting layer 29 when, due to second metal layer 24 surface area increase, therefore transparency conducting layer 29 with Also surface contact increases second metal layer 24.
Additionally, as shown in figure 5, in the display panel of the present embodiment, at the first hole 231, the first metal layer 22 with The angle theta of second metal layer 24 is more than 0 degree and less than 45 degree (0 ° of 45 ° of < θ <).In general, the first insulating barrier 23 is to use Pair of lamina insulating materials makes, and for silicon nitride layer, upper strata is silicon oxide layer for its lower floor;When the first insulating barrier 23 of patterning is with shape During into the first hole 231, because silicon nitride layer etching speed is very fast, and the situation for easily having undercutting (undercut) is produced, and The second metal layer 24 for subsequently being formed may be had influence on and contact effect with the first metal layer 22.Therefore, in the present embodiment, lead to The parameter of adjustment etching, such as etch period, etching liquid composition and etching mode are crossed, the first hole of the first insulating barrier 2 is controlled 231 gradient causes that the first metal layer 22 is more than 0 degree and less than 45 degree with the angle theta of second metal layer 24;Now, it is possible to decrease bottom The risk of generation is cut, the first metal layer 22 can be made to be contacted with second metal layer 24 preferably, and can also avoid because of the first hole 231 The gradient causes very much the risk that subsequent clear conductive layer 29 breaks suddenly.
In the present invention, the display panel obtained by previous embodiment, can be applied to liquid crystal display panel, organic light emission two On pole pipe display panel or inorganic light-emitting diode panel.Additionally, the display panel obtained by previous embodiment, also can with touch Control panel merging is used, and as a touch control display device.Meanwhile, the display panel or tactile obtained by present invention Control display device, can be applied on the electronic installation of any required display screen known in the art, such as display, hand Machine, notebook computer, video camera, camera, music player, Mobile navigation device, TV etc. need to show the electronics of image On device.
Above-described embodiment explanation merely for convenience and illustrate, the interest field advocated of the present invention is from should be with right It is required that described be defined, rather than it is only limitted to above-described embodiment.

Claims (13)

1. a kind of display panel, it is characterised in that include:
One substrate, comprising a viewing area and a non-display area;
Multi-strip scanning line, is arranged on the viewing area;
A plurality of data lines, is arranged on the viewing area and is staggered to define multiple pixel cells with those scan lines;
One first common signal line, is arranged on the viewing area and is staggered with those data wires;And
One first common signal connection pad, is arranged in one of them of those pixel cells, is electrically connected with first common signal Line, and the first common signal connection pad is positioned between wherein two adjacent data lines of those data wires;
Wherein the first common signal connection pad has different minimum ranges respectively from two adjacent data line.
2. display panel according to claim 1, wherein the first common signal line include a first metal layer, and this first Common signal connection pad includes a second metal layer, wherein one first insulating barrier is arranged on the first metal layer and the second metal layer Between and comprising one first hole, the second metal layer is via first hole and the first metal layer directly contact.
3. display panel according to claim 1, wherein one second insulating barrier be arranged in the second metal layer and comprising One second hole, the second metal layer is via second hole and one first transparency conducting layer directly contact, wherein second hole Hole partly overlaps with first hole.
4. display panel according to claim 3, wherein an edge of the first metal layer are located in second hole.
5. display panel according to claim 3, wherein one the 3rd insulating barrier be arranged on second insulating barrier and comprising One of them of one the 3rd hole, first transparency conducting layer and one second transparency conducting layer located at the 3rd insulating barrier with this Two insulation interlayers and another on the 3rd insulating barrier, and first transparency conducting layer is saturating with second via the 3rd hole Bright conductive layer directly contact.
6. display panel according to claim 1, it is characterised in that also including one second common signal connection pad, the 3rd Common signal connection pad, one second common signal line and one the 3rd common signal line, wherein the second common signal line and the 3rd Common signal line is arranged on the viewing area and is staggered with those data wires, and the second common signal connection pad and the 3rd common The viewing area is arranged on signal bonding pad and be electrically connected with the second common signal line and the 3rd common signal line;Wherein The second common signal connection pad is located between the first common signal connection pad and the 3rd common signal connection pad, and the first common letter Spacing number between connection pad and the second common signal connection pad is not equal to the second common signal connection pad and is connect with the 3rd common signal Spacing between pad.
7. display panel according to claim 1, wherein the first common signal line include a protuberance, positioned at those Data wire staggered place and towards the data wire length direction protrude.
8. display panel according to claim 2, wherein at first hole, the first metal layer and second metal The angle of layer is more than 0 degree and less than 45 degree.
9. display panel according to claim 1, wherein the first common signal connection pad have a first edge and one the Two edges, and the first edge is relative with the second edge, and those data wires include one first data wire and one second data Line, wherein the first common signal connection pad are located between first data wire and second data wire, and first data wire is relatively adjacent The nearly first edge, and the second data wire relative proximity second edge;Wherein, first data wire and the first edge and Second data wire is respectively one first distance and one with minimum range of the second edge on those scan line bearing of trends Second distance, and when width of those pixel cells on the bearing of trend of those scan lines is 300~320 μm, this first The difference of distance and the second distance is 1.5~299 μm.
10. display panel according to claim 1, wherein the first common signal connection pad have a first edge and one the Two edges, and the first edge is relative with the second edge, and those data wires include one first data wire and one second data Line, wherein the first common signal connection pad are located between first data wire and second data wire, and first data wire is relatively adjacent The nearly first edge, and the second data wire relative proximity second edge;Wherein, first data wire and the first edge and Second data wire is respectively one first distance and one with minimum range of the second edge on those scan line bearing of trends Second distance, and when width of those pixel cells on the bearing of trend of those scan lines is 200~220 μm, this first The difference of distance and the second distance is 1.5~196.17 μm.
11. display panels according to claim 1, wherein the first common signal connection pad have a first edge and one the Two edges, and the first edge is relative with the second edge, and those data wires include one first data wire and one second data Line, wherein the first common signal connection pad are located between first data wire and second data wire, and first data wire is relatively adjacent The nearly first edge, and the second data wire relative proximity second edge;Wherein, first data wire and the first edge and Second data wire is respectively one first distance and one with minimum range of the second edge on those scan line bearing of trends Second distance, and when width of those pixel cells on the bearing of trend of those scan lines is 145~165 μm, this first The difference of distance and the second distance is 1.5~144.75 μm.
12. display panels according to claim 1, wherein the first common signal connection pad have a first edge and one the Two edges, and the first edge is relative with the second edge, and those data wires include one first data wire and one second data Line, wherein the first common signal connection pad are located between first data wire and second data wire, and first data wire is relatively adjacent The nearly first edge, and the second data wire relative proximity second edge;Wherein, first data wire and the first edge and Second data wire is respectively one first distance and one with minimum range of the second edge on those scan line bearing of trends Second distance, and when width of those pixel cells on the bearing of trend of those scan lines is 100~120 μm, this first The difference of distance and the second distance is 1.5~93.33 μm.
13. display panel according to any one of claim 9 to 12, wherein the first common signal connection pad also have one 3rd edge, and the two ends at the 3rd edge intersect with the first edge and the second edge respectively;Wherein, the 3rd edge with The bearing of trend of those scan lines is parallel.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107579081A (en) * 2017-09-27 2018-01-12 上海天马有机发光显示技术有限公司 A kind of display panel and display device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050062898A1 (en) * 2001-12-03 2005-03-24 Hitachi, Ltd. Liquid crystal display device with a substrate having an opening on an organic film thereof to accommodate sealing material therethrough
CN1601362A (en) * 2003-08-13 2005-03-30 三星电子株式会社 Liquid crystal display and panel therefor
CN1991547A (en) * 2005-12-29 2007-07-04 Lg.菲利浦Lcd株式会社 Array substrate for ips-mode LCD device and method of fabricating the same
US20070222907A1 (en) * 2006-03-27 2007-09-27 Epson Imaging Devices Corporation Liquid crystal display device
CN102411238A (en) * 2010-09-20 2012-04-11 乐金显示有限公司 Liquid crystal display device and method for manufacturing the same
US20120249914A1 (en) * 2011-03-29 2012-10-04 Jung Sang-Hun Display apparatus having improved static discharge characteristics
CN103123429A (en) * 2011-11-17 2013-05-29 乐金显示有限公司 Array substrate for fringe field switching mode liquid crystal display device and method for fabricating the same
CN104280966A (en) * 2014-08-20 2015-01-14 友达光电股份有限公司 Liquid crystal display panel

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050062898A1 (en) * 2001-12-03 2005-03-24 Hitachi, Ltd. Liquid crystal display device with a substrate having an opening on an organic film thereof to accommodate sealing material therethrough
CN1601362A (en) * 2003-08-13 2005-03-30 三星电子株式会社 Liquid crystal display and panel therefor
CN1991547A (en) * 2005-12-29 2007-07-04 Lg.菲利浦Lcd株式会社 Array substrate for ips-mode LCD device and method of fabricating the same
US20070222907A1 (en) * 2006-03-27 2007-09-27 Epson Imaging Devices Corporation Liquid crystal display device
CN102411238A (en) * 2010-09-20 2012-04-11 乐金显示有限公司 Liquid crystal display device and method for manufacturing the same
US20120249914A1 (en) * 2011-03-29 2012-10-04 Jung Sang-Hun Display apparatus having improved static discharge characteristics
CN103123429A (en) * 2011-11-17 2013-05-29 乐金显示有限公司 Array substrate for fringe field switching mode liquid crystal display device and method for fabricating the same
CN104280966A (en) * 2014-08-20 2015-01-14 友达光电股份有限公司 Liquid crystal display panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107579081A (en) * 2017-09-27 2018-01-12 上海天马有机发光显示技术有限公司 A kind of display panel and display device
CN107579081B (en) * 2017-09-27 2020-04-03 上海天马有机发光显示技术有限公司 Display panel and display device

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