CN106849908A - A kind of radiation hardened method of restructural FIR filter on star - Google Patents
A kind of radiation hardened method of restructural FIR filter on star Download PDFInfo
- Publication number
- CN106849908A CN106849908A CN201611073257.5A CN201611073257A CN106849908A CN 106849908 A CN106849908 A CN 106849908A CN 201611073257 A CN201611073257 A CN 201611073257A CN 106849908 A CN106849908 A CN 106849908A
- Authority
- CN
- China
- Prior art keywords
- fir filter
- result
- filter
- initial data
- fir
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/0033—Radiation hardening
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H15/00—Transversal filters
- H03H2015/002—Computation saving measures
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H2017/0072—Theoretical filter design
- H03H2017/0081—Theoretical filter design of FIR filters
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Radio Relay Systems (AREA)
- Image Processing (AREA)
Abstract
A kind of radiation hardened method of restructural FIR filter on star,The bit width of wave filter is obtained first,When the BRAM taken when bit width expands increases and cannot provide idle BRAM,Do not reinforced,When the BRAM that bit width expands and takes is constant,Or when expanding remaining free time BRAM,Carry out the radiation hardened of the filter parameter of ground restructural,Then idle number of multipliers on star is obtained,Idle Slice number of resources,The number of multipliers that wave filter is used,Slice number of resources,If idle multiplier plus 1 not less than the multiplier for using on star,And free time Slice resources are more than or equal to the Slice resources for using and are multiplied by (1+1/n),Then realize the fault detect of circuit Flouride-resistani acid phesphatase and correct using wave filter,If the Slice resources used less than wave filter without idle multiplier or free time Slice resources are divided by n,Circuit Flouride-resistani acid phesphatase fault detect is then realized using the wave filter of low consumption of resources,Circuit Flouride-resistani acid phesphatase fault detect is otherwise realized using the wave filter of single multiplier.
Description
Technical field
The present invention relates to Satellite Navigation Technique, the radiation hardened method of restructural FIR filter on particularly a kind of star.
Background technology
It is many that FIR filter realizes that circuit resource takes, and is navigation signal generation " single-point " on star, is vulnerable to single-particle and turns over
The influence for turning, it is therefore desirable to realize that circuit carries out triplication redundancy reinforcing to FIR filter.At present, can be by triplication redundancy
Method realizes that circuit carries out the single-particle inversion reinforcing of FPGA to FIR filter, and triplication redundancy method designs nothing with specific algorithm
Close, be a kind of general anti-single particle upset reinforcement means, but triplication redundancy method has the disadvantage that：
(1) resource, power consumption are approximately 3.2 times of mould design, and load is difficult on star；
(2) FIR filter realizes that circuit is generally operational in after signal generating circuit, and its work clock is greater than equal to letter
The work clock of number generative circuit, operating rate is higher, and FIR filter realizes that the multiplier and adder in circuit are that FPGA sets
Critical path in meter, three moulds of FIR filter circuit are easily caused sequential deterioration, it is impossible to by static timing analysis, therefore need
Propose a kind of radiation hardened method of new FIR filter.
The content of the invention
Present invention solves the technical problem that being：Overcome the deficiencies in the prior art, there is provided restructural FIR filtering on a kind of star
The radiation hardened method of device, solves that prior art resource, power consumption are high, the problem that load is difficult on star.
Technical solution of the invention is：A kind of radiation hardened method of restructural FIR filter on star, including such as
Lower step：
(1) obtain the bit width of n rank FIR filters and judge, if the bit width of FIR filter expands 3 in season
Times when, the BRAM numbers that FIR filter takes increase and FPGA when cannot provide idle BRAM, does not carry out FIR filter on star
Radiation hardened, if in season FIR filter bit width expand 3 times, FIR filter take BRAM numbers not
Become, or when the bit width of FIR filter expands 3 times in season, FPGA residue free time BRAM, then carry out ground restructural on star
FIR filter parameter radiation hardened；
(2) idle number of multipliers, free time Slice number of resources in FPGA are obtained on star, acquisition n rank FIR filters make
Number of multipliers, Slice number of resources simultaneously judge, if idle number of multipliers is filtered more than or equal to FIR in FPGA on star
The number of the multiplier that ripple device is used plus 1, and free time Slice number of resources is used more than or equal to FIR filter in FPGA on star
Slice number of resources be multiplied by (1+1/n), then using FIR filter realize the fault detect of circuit Flouride-resistani acid phesphatase with correct method,
If on star in FPGA without idle multiplier or free time Slice number of resources less than the Slice number of resources that FIR filter is used
Mesh is divided by n, the then method that circuit Flouride-resistani acid phesphatase fault detect is realized using the FIR filter of low consumption of resources, otherwise using single
The method that the FIR filter of multiplier realizes circuit Flouride-resistani acid phesphatase fault detect.
The method of the radiation hardened of the FIR filter parameter of described ground restructural comprises the following steps：
(1) will treat that the FIR filter parameter of radiation hardened is stored in dual-port Block RAM, store in dual-port
Parameter in Block RAM includes the of first copy Bi, Ai of original FIR filter parameter Ai, Ai for treating radiation hardened
Two copy Ci, Ai, Bi, Ci are respectively stored in the different pieces of information position in dual-port Block RAM identical address, dual-port Block
The width of RAM is 3 times of the FIR filter parameter digit for treating radiation hardened, and the depth of dual-port Block RAM is to treat anti-spoke
According to the number n, i=0,1 of the FIR filter parameter reinforced, 2 ... n-1；
(2) one group of parameter Ai, Bi, Ci, the circulating cycle of j, i are read from dual-port Block RAM in j-th clock cycle
Phase is n, wherein, j=0,1,2,3 ... n-1；
(3) when satellite operation on orbit, according to surface instruction generate collection period, judge step (2) reading obtain Ai,
, if Ai=Bi=Ci, there is not single-particle inversion in Bi, Ci, by original FIR filter parameter Ai outputs, if Ai ≠ Bi
, then there is many places single-particle inversion, it is impossible to corrected in ≠ Ci, and carries out integrity alarm, notifies ground intervening surface, resets FIR filters
Ripple device parameter Ai, Bi, Ci, if Ai=Bi ≠ Ci or Ai ≠ Bi=Ci or Ai=Ci ≠ Bi, Block RAM produces single-particle
Upset, as Ai=Bi ≠ Ci, original FIR filter parameter Ai is exported, and passes through the single-particle that the method for write-back corrects Ci
Upset mistake, as Ai ≠ Bi=Ci, parameter Bi is exported, and passes through the single-particle inversion mistake that the method for write-back corrects Ai,
As Ai=Ci ≠ Bi, by original FIR filter parameter Ai outputs, and the single-particle inversion of the method correction Bi for passing through write-back is wrong
By mistake.
The both-end that the described FIR filter parameter that will treat radiation hardened storage is used in dual-port Block RAM
The dual-port Block ram ports that mouth Block ram ports and reading one group of parameter Ai, Bi, Ci are used are inconsistent.
Described FIR filter according to claim 1 realizes method of the circuit Flouride-resistani acid phesphatase fault detect with correcting
Comprise the following steps：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) design and the identical fallback circuit of FIR filter, as fault correction circuit, initial data Xi are led to
Fault correction circuit is crossed, filter result Yi ' is obtained；
(3) failure detector circuit is constructed by L multiplier, L bit accumulators and L trigger, initial data Xi is led to
Cross and make failure detector circuit, obtain Yi ", wherein, L is the bit wide of FIR filter parameter；
(4) Yi, Yi are judged ' and Yi ", if Yi=Yi '=Yi ", there is not single-particle inversion phenomenon, export Yi conducts
There is single-particle inversion in the filter result of FIR filter, if Yi=Yi ' ≠ Yi ", failure detector circuit, exports Yi conducts
There is single-particle inversion in the filter result of FIR filter, if Yi ≠ Yi '=Yi ", FIR filter, exports Yi ' conducts
There is single-particle inversion in the filter result of FIR filter, if Yi=Yi " ≠ Yi ', fault correction circuit, exports Yi conducts
, there is many places single-particle inversion in the filter result of FIR filter, if Yi ≠ Yi ' ≠ Yi ", carries out integrity alarm.
Described failure detector circuit building method comprises the following steps：
(1) initial data Xi, FIR filter parameter are multiplied successively using L multiplier, obtain multiple multiplied results,
Wherein, initial data Xi, the update cycle of FIR filter be a clock cycle；
(2) multiple multiplied results that step (1) is obtained are added up using L bit accumulators, obtains accumulation result；
(3) accumulation result obtained using a clock cycle step (2) in L recording trigger, and during by upper one
The accumulation result in clock cycle delivers to L bit accumulators；
(4) this clock cycle for being obtained the accumulation result of a upper clock cycle and step (2) using L bit accumulators
Accumulation result is added up；
(5) repeat step (3)-step (4), until when the accumulative frequency in step (4) reaches n times, obtaining filtering knot
ReallyWherein, XiIt is i-th clock cycle corresponding initial data, AiIt is i-th clock cycle corresponding FIR
Filter parameter.
The FIR filter of described use low consumption of resources realizes that the method for circuit Flouride-resistani acid phesphatase fault detect includes following step
Suddenly：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) failure detector circuit that initial data Xi is passed through into low consumption of resources, obtains filter result Yi '；
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, Yi is used as FIR filter for output
Filter result, if Yi ≠ Yi ', occur single-particle inversion phenomenon, earthward send integrity alarm, by ground intervening surface
Solve upset failure.
The method of the structure of the failure detector circuit of described low consumption of resources, comprises the following steps：
(1) modulo operation is carried out to m to initial data Xi, obtains result (Xi)M=3, wherein, (Xi)M=3It is 0,1 or 2, m=
3, initial data Xi are i-th clock cycle corresponding initial data, AiIt is i-th clock cycle corresponding FIR filter ginseng
Number, the initial value of i is 0；
(2) modulo operation is carried out to m to FIR filter parameter, obtains result (Ai)M=3, wherein, (Ai)M=3It is 0,1 or 2,
M=3；
(3) to (Xi)M=3、(Ai)M=3Multiplication modulo operation is carried out, is worked as (Xi)M=3Multiplication modulo operation result when=0
It is 0, as (Xi)M=3Multiplication modulo operation result is (A when=1i)M=3, as (Xi)M=3Multiplication modulo operation result is when=2
Wherein, multiplication modulo operation is to carry out modulo operation to 3 after being multiplied；Multiplication modulo operation result is designated as
[(Xi)m·(Ai)m]m, all of i is traveled through, obtain the corresponding multiplication modulo operation result of n clock cycle difference；
(4) all multiplication modulo operation results for being obtained to step (3) carry out addition modulo operation, obtainWherein, addition modulo operation is to carry out modulo operation to 3 after being added；
(5) initial data Xi is obtained into filter result Yi by FIR filter, filter result Yi is carried out into modulus to m=3
Computing, obtains (Yi)m；
(6) compareIfThen not
There is single-particle inversion phenomenon, Yi is used as filter result for output, ifThen occur single
Particle flop phenomenon, earthward sends integrity alarm, and failure is solved by ground intervening surface.
Described comprises the following steps to initial data Xi to the method that m=3 carries out modulo operation：
(1) each in initial data Xi is carried out into modulo operation respectively to m=3, then by the modulo operation of every
Result replaces present bit, obtains and initial data Xi digit identical modulo operation data；
(2) number Num_O, number that even bit be nonzero value of the odd bits for nonzero value in modulo operation data are calculated
Num_E, and judge；
(3) if Num_O=0, the result that initial data Xi carries out modulo operation to m=3 is Num_E, if Num_E
=0, then initial data Xi carries out the result of modulo operation to m=3 for Num_O, original if Num_O and Num_E are 1
The result that data Xi carries out modulo operation to m=3 is 2, if Num_O and Num_E are 2, initial data Xi enters to m=3
The result of row modulo operation is 1, if it is 2 that Num_O and Num_E mono- are 1, one, initial data Xi takes to m=3
The result of modular arithmetic is 0.
The FIR filter of described single multiplier realizes that the method for circuit Flouride-resistani acid phesphatase fault detect comprises the following steps：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) by L multiplier, L bit accumulators, L trigger construction failure detector circuit, by initial data Xi by making
Failure detector circuit, obtains Yi '；
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, Yi is used as filter result for output,
If Yi ≠ Yi ', there is single-particle inversion phenomenon, earthward send integrity alarm, failure is solved by ground intervening surface.
Described constructs the method for failure detector circuit including such as by L multiplier, L bit accumulators and L trigger
Lower step：
(1) initial data Xi, FIR filter parameter are multiplied successively using L multiplier, obtain multiple multiplied results,
Wherein, initial data Xi, the update cycle of FIR filter be a clock cycle；
(2) multiple multiplied results that step (1) is obtained are added up using L bit accumulators, obtains accumulation result；
(3) accumulation result obtained using a clock cycle step (2) in L recording trigger, and during by upper one
The accumulation result in clock cycle delivers to L bit accumulators；
(4) this clock cycle for being obtained the accumulation result of a upper clock cycle and step (2) using L bit accumulators
Accumulation result is added up；
(5) repeat step (3)-step (4), until when the accumulative frequency in step (4) reaches n times, obtaining filtering knot
ReallyWherein, XiIt is i-th clock cycle corresponding initial data, AiIt is i-th clock cycle corresponding FIR
Filter parameter.
Present invention advantage compared with prior art is：
(1) the inventive method compared with prior art, copies parameters, by one by storing a filter parameter and two parts
Part filter parameter and two parts of copy parameters are stored in different data bit in identical address, be increased bit wide but are not increased
Storage depth, both realizes triplication redundancy, solves the problems, such as the single-particle inversion of single bit, need not take again more
Block RAM memory spaces；
(2) the inventive method compared with prior art, is compared by Ai, Bi, Ci that the data/address bus of port 2 reads
With the mode of write-back, the wrong correction of single-particle inversion is solved the problems, such as, do not accumulated with the time with single-particle inversion
Advantage；
(3) the inventive method is compared with prior art, electric by the identical backup of design and FIR filter circuit
Road, signal correctly recovers after solving the problems, such as single-particle inversion generation, between ensureing FIR filter output signal continuously not
Disconnected advantage；
(4) the inventive method is compared with prior art, individual by use one L multiplier, a L bit accumulator and L
Trigger builds the FIR filter single-particle inversion failure detector circuit of single multiplier, solves the inspection of single-particle inversion failure
Survey problem, has the advantages that to realize that simple, fault detect real-time is high；
(5) the inventive method compared with prior art, by introducing modulo operation, solves the FIR filtering of single multiplier
Device single-particle inversion failure detector circuit resource consumption problem high, it is extremely low with resource consumption and fault detect real-time is high
Advantage.
Brief description of the drawings
Fig. 1 is the FIR filter parameter anti-single particle upset reinforcement means circuit structure diagram of ground restructural；
Fig. 2 is that FIR filter realizes the upset fault detect of circuit anti-single particle and correcting method circuit structure diagram；
Fig. 3 is that the FIR filter of single multiplier realizes that circuit anti-single particle overturns fault detection method circuit structure diagram；
Fig. 4 is that the FIR filter of low consumption of resources realizes that circuit anti-single particle overturns fault detection method circuit structure diagram；
Complementation computing low consumption of resources implementation method circuit structure diagram when Fig. 5 is m=3；
Complementation computing low consumption of resources implementation method circuit structure diagram is added when Fig. 6 is m=3.
Specific embodiment
Reference picture 1, the FIR filter parameter anti-single particle upset reinforcement means of ground restructural, comprises the following steps：
(1) will treat that the FIR filter parameter of radiation hardened is stored in dual-port Block RAM, store in dual-port
Parameter in Block RAM include second the copy Ci, Ai of first copy Bi, Ai of original FIR filter parameter Ai, Ai, Bi,
Ci is respectively stored in the different pieces of information position in dual-port Block RAM identical address, and the width of dual-port Block RAM is to wait to resist
3 times of the FIR filter parameter digit of Radiation Hardened, the depth of dual-port Block RAM is to treat the FIR filtering of radiation hardened
The number n of device parameter；
(2) parameter module is noted on ground according to ground injection order and the parameter of injection, the write-in ground of Block RAM is produced
Location and data, and the write timing of port 1 of Block RAM is controlled, the parameter read-in Block RAM that ground is injected, on ground
There is note parameter module highest to write priority；
(3) address bus of port 2 accesses an accumulator of 0~n-1, therefore the parameter for reading in the 1 to n-th parameter
Between constantly circulate；Accumulator and d type flip flop form closed loop, it is ensured that each FPGA clock cycle, and the address of accumulator increases by 1；
(4) in any one clock cycle, the address bus of port 2 is i, then in next clock cycle, from port 2
Data/address bus can read Ai, Bi, Ci；
(5) when satellite operation on orbit, clock is generated as collection period with navigation signal, Ai, Bi, Ci is judged, if Ai
, then there is not single-particle inversion in=Bi=Ci, and original FIR filter parameter Ai outputs, if Ai ≠ Bi ≠ Ci, occur many
Place's single-particle inversion, it is impossible to corrected, carry out integrity alarm, if Ai=Bi ≠ Ci or Ai ≠ Bi=Ci or Ai=Ci ≠
Bi, then Block RAM generations single-particle inversion, during for Ai=Bi ≠ Ci, original FIR filter parameter Ai is exported,
And the single-particle inversion mistake of the method correction Ci for passing through write-back；As Ai ≠ Bi=Ci, by original FIR filter ginseng
Number Bi is exported, and passes through the single-particle inversion mistake that the method for write-back corrects Ai；As Ai=Ci ≠ Bi, will be original
FIR filter parameter Ai outputs, and pass through the single-particle inversion mistake that the method for write-back corrects Bi.
Reference picture 2, FIR filter realizes method of the circuit Flouride-resistani acid phesphatase fault detect with correcting, and comprises the following steps：
(1) the initial data Xi for carrying out fault detect and correcting will be needed to pass through FIR filter from dual-port Block RAM
And obtain filter result Yi；
(2) design and the identical fallback circuit of FIR filter, as fault correction circuit, initial data Xi are led to
Fault correction circuit is crossed, filter result Yi ' is obtained；
(3) failure detector circuit is constructed by L multiplier, L bit accumulators and L trigger, initial data Xi is led to
Cross and make failure detector circuit, obtain Yi "；
Described failure detector circuit building method is as follows：
(3.1) original input data stream is multiplied successively with filter parameter using L multiplier, original input data stream
A clock cycle is with the update cycle of filter parameter；
(3.2) result after multiplication is added up using L bit accumulators；
(3.3) using an accumulation result for timeticks in L recording trigger, and using backfeed loop by upper one
The accumulation result of timeticks feeds back to L bit accumulators, carries out the cumulative of this timeticks；
(3.4) after accumulative frequency reaches n times, obtain
(4) Yi, Yi are judged ' and Yi ", if Yi=Yi '=Yi ", there is not single-particle inversion phenomenon, export Yi conducts
There is single-particle inversion phenomenon in the filter result of FIR filter, if Yi=Yi ' ≠ Yi ", decision circuit, exports Yi conducts
Filter result；If Yi ≠ Yi '=Yi ", there is single-particle inversion phenomenon in decision circuit, and Yi ' is used as filter result for output；Such as
Fruit Yi=Yi " ≠ Yi ', then decision circuit there is single-particle inversion phenomenon, Yi is used as filter result for output；
(5) if Yi ≠ Yi '=Yi ", there is single-particle inversion phenomenon in FIR filter circuit, and output Yi ' is used as filtering
As a result；
Reference picture 3, the FIR filter of single multiplier realizes that circuit anti-single particle overturns fault detection method, including such as
Lower step：
(1) initial data Xi is by the FIR filter that is made up of adder and multiplier (parameter enters from Block RAM writes)
And export filter result Yi；
(2) failure detector circuit is constructed by L multiplier, L bit accumulators and L trigger, initial data Xi is led to
Cross and make failure detector circuit, obtain Yi '；
Described failure detector circuit building method is as follows：
(2.1) original input data stream is multiplied successively with filter parameter using L multiplier, original input data stream
A clock cycle is with the update cycle of filter parameter；
(2.2) result after multiplication is added up using L bit accumulators；
(2.3) using an accumulation result for timeticks in L recording trigger, and using backfeed loop by upper one
The accumulation result of timeticks feeds back to L bit accumulators, carries out the cumulative of this timeticks；
(2.4) after accumulative frequency reaches n times, obtain
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, Yi is used as filter result for output,
If Yi ≠ Yi ', there is single-particle inversion phenomenon, earthward send integrity alarm, failure is solved by ground intervening surface.
Reference picture 4, the method that circuit Flouride-resistani acid phesphatase fault detect is realized using the FIR filter of low consumption of resources, including such as
Lower step：
(1) initial data Xi is by the FIR filter that is made up of adder and multiplier (parameter writes from BlockRAM)
And export filter result Yi；
The method of the structure of the failure detector circuit of described use low consumption of resources, comprises the following steps：
(1.1) input signal is carried out to m=2k± 1 modulo operation, obtains (Xi)M=3, be that simplified operation takes k=1, then m
=3, then possible result is 0,1 or 2；Modulo operation can be realized using the method successively decreased successively, but the method realizes that resource disappears
Consumption is big, the cycle is long, and tool is time-consuming to have uncertainty, therefore designs new method and realize modulo operation, as shown in Figure 5：
● due toTherefore by non-in displacement judgement and the cumulative all odd bits of method statistic
The number of null value；Notice that accumulated value is only 0~2, if on the basis of 2 again add up 1, be changed into 0；
● by the number for shifting nonzero value in all even bits of method statistic for judging and adding up；
● due to the possibility value of the number Num_E of the number Num_O and even number nonzero value of odd number nonzero value be only 0,1,
2, so carrying out modulo operation by logic judgment, implementation method is：
If ■ Num_O=0, modulo operation result is Num_E；
If ■ Num_E=0, modulo operation result is Num_O；
If ■ Num_O and Num_E are 1, modulo operation result is 2；
If ■ Num_O and Num_E are 2, modulo operation result is 1；
If it is 2 that ■ Num_O and Num_E mono- is 1, one, modulo operation result is 0；
(1.2) the FIR filter parameter to ground restructural carries out, to 3 modulo operations, obtaining (Ai)M=3, can also count in advance
After calculation is good, and ground restructural FIR filter parameter injects satellite load together, and possible result is 0,1 or 2；
(1.3) to (Xi)M=3(Ai)M=3Carry out multiplication modulo operation：Due to (Xi)M=3(Ai)M=3Operation result be
0th, in 1,2 any one, then multiplication modulo operation can be realized by logic judgment：
If ● (Xi)M=3=0, then multiplication modulo operation result is 0；
If ● (Xi)M=3=1, then multiplication modulo operation result is (Ai)M=3；
If ● (Xi)M=3=2, then multiplication modulo operation result be
(1.4) addition modulo operation is carried out to output result, computational methods refer to Fig. 6, the two number ending phases that can be will add up
Connect, constitute a broader data, then carry out computing (note using the method for modulus：The method is only applicable to bit wide for even number
Situation)；
(1.5) initial data Xi by the FIR filter that is made up of adder and multiplier, (from BlockRAM write by parameter
Enter) and export filter result Yi, Yi modulo operation is carried out to m, obtain (Yi)m；
(1.6) completion to be calculatedAfterwards, by itself and (Yi)mIt is compared：
If ●Do not occur single-particle inversion phenomenon then, Yi is used as filter for output
Ripple result；
IfThen there is single-particle inversion phenomenon, earthward send integrity announcement
It is alert, failure is solved by ground intervening surface.
(2) failure detector circuit that initial data Xi passes through low consumption of resources, output result Yi '；
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, Yi is used as filter result for output,
If Yi ≠ Yi ', there is single-particle inversion phenomenon, earthward send integrity alarm, failure is solved by ground intervening surface.
The content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.
Claims (10)
1. on a kind of star restructural FIR filter radiation hardened method, it is characterised in that comprise the following steps：
(1) obtain the bit width of n rank FIR filters and judge, if the bit width of FIR filter expands 3 times in season,
When the BRAM numbers that FIR filter takes increase and FPGA cannot provide idle BRAM on star, the anti-spoke of FIR filter is not carried out
According to reinforcing, if the bit width of FIR filter expands 3 times in season, the BRAM invariable numbers that FIR filter takes, or
When the bit width of FIR filter expands 3 times in season, FPGA residue free time BRAM on star, then the FIR filters of ground restructural are carried out
The radiation hardened of ripple device parameter；
(2) idle number of multipliers, free time Slice number of resources in FPGA are obtained on star, acquisition n rank FIR filters are used
Number of multipliers, Slice number of resources simultaneously judge, if idle number of multipliers is more than or equal to FIR filter in FPGA on star
The number of the multiplier for using plus 1, and free time Slice number of resources is used more than or equal to FIR filter in FPGA on star
Slice number of resources is multiplied by (1+1/n), then realize method of the circuit Flouride-resistani acid phesphatase fault detect with correcting using FIR filter, such as
On fruit star in FPGA without idle multiplier or free time Slice number of resources less than the Slice number of resources that FIR filter is used
Divided by n, then the method that circuit Flouride-resistani acid phesphatase fault detect is realized using the FIR filter of low consumption of resources is otherwise multiplied using single
The method that the FIR filter of musical instruments used in a Buddhist or Taoist mass realizes circuit Flouride-resistani acid phesphatase fault detect.
2. on a kind of star according to claim 1 restructural FIR filter radiation hardened method, it is characterised in that：
The method of the radiation hardened of the FIR filter parameter of described ground restructural comprises the following steps：
(1) will treat that the FIR filter parameter of radiation hardened is stored in dual-port Block RAM, store in dual-port Block
Parameter in RAM includes second copy of first copy Bi, Ai of original FIR filter parameter Ai, Ai for treating radiation hardened
Ci, Ai, Bi, Ci are respectively stored in the different pieces of information position in dual-port Block RAM identical address, dual-port Block RAM's
Width is 3 times of the FIR filter parameter digit for treating radiation hardened, and the depth of dual-port Block RAM is to treat that Flouride-resistani acid phesphatase adds
Solid FIR filter parameter number n, i=0,1,2 ... n-1；
(2) one group of parameter Ai, Bi, Ci are read from dual-port Block RAM in j-th clock cycle, the cycle period of j, i is equal
It is n, wherein, j=0,1,2,3 ... n-1；
(3) when satellite operation on orbit, according to surface instruction generate collection period, judge step (2) reading obtain Ai, Bi,
, if Ai=Bi=Ci, there is not single-particle inversion in Ci, and original FIR filter parameter Ai is exported, if Ai ≠ Bi ≠
, then there is many places single-particle inversion, it is impossible to corrected in Ci, and carries out integrity alarm, notifies ground intervening surface, resets FIR filtering
Device parameter Ai, Bi, Ci, if Ai=Bi ≠ Ci or Ai ≠ Bi=Ci or Ai=Ci ≠ Bi, Block RAM produces single-particle to turn over
Turn, as Ai=Bi ≠ Ci, by original FIR filter parameter Ai outputs, and the single-particle of the method correction Ci for passing through write-back is turned over
Turn mistake, as Ai ≠ Bi=Ci, parameter Bi is exported, and pass through the single-particle inversion mistake that the method for write-back corrects Ai, when
During Ai=Ci ≠ Bi, by original FIR filter parameter Ai outputs, and the single-particle inversion of the method correction Bi for passing through write-back is wrong
By mistake.
3. on a kind of star according to claim 2 restructural FIR filter radiation hardened method, it is characterised in that：
The dual-port Block that the described FIR filter parameter that will treat radiation hardened storage is used in dual-port Block RAM
The dual-port Block ram ports that ram port and reading one group of parameter Ai, Bi, Ci are used are inconsistent.
4. on a kind of star according to claim 1 and 2 restructural FIR filter radiation hardened method, its feature exists
In：Described FIR filter according to claim 1 realizes that the fault detect of circuit Flouride-resistani acid phesphatase includes such as with the method corrected
Lower step：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) design and the identical fallback circuit of FIR filter, as fault correction circuit, by initial data Xi by event
Barrier correction circuit, obtains filter result Yi '；
(3) failure detector circuit is constructed by L multiplier, L bit accumulators and L trigger, by initial data Xi by making
Failure detector circuit, obtains Yi ", wherein, L is the bit wide of FIR filter parameter；
(4) Yi, Yi are judged ' and Yi ", if Yi=Yi '=Yi ", there is not single-particle inversion phenomenon, Yi is used as FIR for output
There is single-particle inversion in the filter result of wave filter, if Yi=Yi ' ≠ Yi ", failure detector circuit, and Yi is used as FIR for output
There is single-particle inversion in the filter result of wave filter, if Yi ≠ Yi '=Yi ", FIR filter, and Yi ' is used as FIR for output
There is single-particle inversion in the filter result of wave filter, if Yi=Yi " ≠ Yi ', fault correction circuit, and Yi is used as FIR for output
, there is many places single-particle inversion in the filter result of wave filter, if Yi ≠ Yi ' ≠ Yi ", carries out integrity alarm.
5. on a kind of star according to claim 4 restructural FIR filter radiation hardened method, it is characterised in that：
Described failure detector circuit building method comprises the following steps：
(1) initial data Xi, FIR filter parameter are multiplied successively using L multiplier, obtain multiple multiplied results, wherein,
Initial data Xi, the update cycle of FIR filter are a clock cycle；
(2) multiple multiplied results that step (1) is obtained are added up using L bit accumulators, obtains accumulation result；
(3) accumulation result obtained using a clock cycle step (2) in L recording trigger, and by a upper clock week
The accumulation result of phase delivers to L bit accumulators；
(4) this clock cycle for being obtained the accumulation result of a upper clock cycle and step (2) using L bit accumulators is cumulative
Result is added up；
(5) repeat step (3)-step (4), until when the accumulative frequency in step (4) reaches n times, obtaining filter resultWherein, XiIt is i-th clock cycle corresponding initial data, AiIt is the corresponding FIR filters of i-th clock cycle
Ripple device parameter.
6. on a kind of star according to claim 1 restructural FIR filter radiation hardened method, it is characterised in that：
The FIR filter of described use low consumption of resources realizes that the method for circuit Flouride-resistani acid phesphatase fault detect comprises the following steps：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) failure detector circuit that initial data Xi is passed through into low consumption of resources, obtains filter result Yi '；
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, export filters of the Yi as FIR filter
, if Yi ≠ Yi ', there is single-particle inversion phenomenon in ripple result, earthward send integrity alarm, be solved by ground intervening surface
Upset failure.
7. on a kind of star according to claim 6 restructural FIR filter radiation hardened method, it is characterised in that：
The method of the structure of the failure detector circuit of described low consumption of resources, comprises the following steps：
(1) modulo operation is carried out to m to initial data Xi, obtains result (Xi)M=3, wherein, (Xi)M=3It is 0,1 or 2, m=3, it is former
Beginning data Xi is i-th clock cycle corresponding initial data, AiIt is i-th clock cycle corresponding FIR filter parameter, i
Initial value be 0；
(2) modulo operation is carried out to m to FIR filter parameter, obtains result (Ai)M=3, wherein, (Ai)M=3It is 0,1 or 2, m=
3；
(3) to (Xi)M=3、(Ai)M=3Multiplication modulo operation is carried out, is worked as (Xi)M=3Multiplication modulo operation result is 0 when=0,
As (Xi)M=3Multiplication modulo operation result is (A when=1i)M=3, as (Xi)M=3Multiplication modulo operation result is when=2
Wherein, multiplication modulo operation is to carry out modulo operation to 3 after being multiplied；Multiplication modulo operation result is designated as
[(Xi)m·(Ai)m]m, all of i is traveled through, obtain the corresponding multiplication modulo operation result of n clock cycle difference；
(4) all multiplication modulo operation results for being obtained to step (3) carry out addition modulo operation, obtainWherein, addition modulo operation is to carry out modulo operation to 3 after being added；
(5) initial data Xi is obtained into filter result Yi by FIR filter, filter result Yi is carried out into modulus fortune to m=3
Calculate, obtain (Yi)m；
(6) compare(Yi)mIf,Do not occur list then
Particle flop phenomenon, Yi is used as filter result for output, ifThen there is single-particle to turn over
Turn phenomenon, earthward send integrity alarm, failure is solved by ground intervening surface.
8. on a kind of star according to claim 7 restructural FIR filter radiation hardened method, it is characterised in that：
Described comprises the following steps to initial data Xi to the method that m=3 carries out modulo operation：
(1) each in initial data Xi is carried out into modulo operation respectively to m=3, then by the modulo operation result of every
Present bit is replaced, is obtained and initial data Xi digit identical modulo operation data；
(2) number Num_O, number Num_E that even bit be nonzero value of the odd bits for nonzero value in modulo operation data are calculated,
And judge；
(3) if Num_O=0, the result that initial data Xi carries out modulo operation to m=3 is Num_E, if Num_E=0,
The result that then initial data Xi carries out modulo operation to m=3 is Num_O, if Num_O and Num_E are 1, initial data
The result that Xi carries out modulo operation to m=3 is 2, if Num_O and Num_E are 2, initial data Xi takes to m=3
The result of modular arithmetic is 1, if it is 2 that Num_O and Num_E mono- are 1, one, initial data Xi carries out modulus fortune to m=3
The result of calculation is 0.
9. on a kind of star according to claim 1 and 2 restructural FIR filter radiation hardened method, its feature exists
In：The FIR filter of described single multiplier realizes that the method for circuit Flouride-resistani acid phesphatase fault detect comprises the following steps：
(1) by initial data Xi is by FIR filter and obtains filter result Yi；
(2) by L multiplier, L bit accumulators, L trigger construction failure detector circuit, by initial data Xi by making failure
Detection circuit, obtains Yi '；
(3) Yi, Yi are judged ', if Yi=Yi ', there is no single-particle inversion phenomenon, Yi is used as filter result for output, if
, then there is single-particle inversion phenomenon in Yi ≠ Yi ', earthward send integrity alarm, and failure is solved by ground intervening surface.
10. on a kind of star according to claim 9 restructural FIR filter radiation hardened method, it is characterised in that：
The described method by L multiplier, L bit accumulators and L trigger construction failure detector circuit comprises the following steps：
(1) initial data Xi, FIR filter parameter are multiplied successively using L multiplier, obtain multiple multiplied results, wherein,
Initial data Xi, the update cycle of FIR filter are a clock cycle；
(2) multiple multiplied results that step (1) is obtained are added up using L bit accumulators, obtains accumulation result；
(3) accumulation result obtained using a clock cycle step (2) in L recording trigger, and by a upper clock week
The accumulation result of phase delivers to L bit accumulators；
(4) this clock cycle for being obtained the accumulation result of a upper clock cycle and step (2) using L bit accumulators is cumulative
Result is added up；
(5) repeat step (3)-step (4), until when the accumulative frequency in step (4) reaches n times, obtaining filter resultWherein, XiIt is i-th clock cycle corresponding initial data, AiIt is the corresponding FIR filters of i-th clock cycle
Ripple device parameter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611073257.5A CN106849908B (en) | 2016-11-29 | 2016-11-29 | Radiation-resistant reinforcing method of satellite reconfigurable FIR filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611073257.5A CN106849908B (en) | 2016-11-29 | 2016-11-29 | Radiation-resistant reinforcing method of satellite reconfigurable FIR filter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106849908A true CN106849908A (en) | 2017-06-13 |
| CN106849908B CN106849908B (en) | 2020-05-08 |
Family
ID=59146124
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611073257.5A Active CN106849908B (en) | 2016-11-29 | 2016-11-29 | Radiation-resistant reinforcing method of satellite reconfigurable FIR filter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106849908B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108964635A (en) * | 2018-06-15 | 2018-12-07 | 西安空间无线电技术研究所 | A kind of Flouride-resistani acid phesphatase high-order high speed can parameter reconstruct FIR filter design method and system |
| CN116961621A (en) * | 2023-09-21 | 2023-10-27 | 灿芯半导体(苏州)有限公司 | FIR filter capable of dynamically adjusting calculation speed |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7852107B1 (en) * | 2010-02-18 | 2010-12-14 | Xilinx, Inc. | Single event upset mitigation |
| CN103186100A (en) * | 2011-12-31 | 2013-07-03 | 北京圣涛平试验工程技术研究院有限责任公司 | Redundancy protection system and redundancy protection method |
| CN103198868A (en) * | 2013-04-16 | 2013-07-10 | 西北核技术研究所 | Fault simulation system and fault analysis method for single event upset |
| CN104035828A (en) * | 2014-05-19 | 2014-09-10 | 上海微小卫星工程中心 | FPGA space irradiation comprehensive protection method and device |
-
2016
- 2016-11-29 CN CN201611073257.5A patent/CN106849908B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7852107B1 (en) * | 2010-02-18 | 2010-12-14 | Xilinx, Inc. | Single event upset mitigation |
| CN103186100A (en) * | 2011-12-31 | 2013-07-03 | 北京圣涛平试验工程技术研究院有限责任公司 | Redundancy protection system and redundancy protection method |
| CN103198868A (en) * | 2013-04-16 | 2013-07-10 | 西北核技术研究所 | Fault simulation system and fault analysis method for single event upset |
| CN104035828A (en) * | 2014-05-19 | 2014-09-10 | 上海微小卫星工程中心 | FPGA space irradiation comprehensive protection method and device |
Non-Patent Citations (2)
| Title |
|---|
| SEONG WOO KWAK 、 BYUNG KOOK KIM: "Task-Scheduling Strategies for Reliable TMR Controllers Using Task Grouping and Assignment", 《IEEE TRANSACTIONS ON RELIABILITY》 * |
| 郑晓云、陶淑苹、冯汝鹏、王绍举: "SRAM型FPGA抗单粒子翻转技术研究", 《电子测量技术》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108964635A (en) * | 2018-06-15 | 2018-12-07 | 西安空间无线电技术研究所 | A kind of Flouride-resistani acid phesphatase high-order high speed can parameter reconstruct FIR filter design method and system |
| CN116961621A (en) * | 2023-09-21 | 2023-10-27 | 灿芯半导体(苏州)有限公司 | FIR filter capable of dynamically adjusting calculation speed |
| CN116961621B (en) * | 2023-09-21 | 2024-03-22 | 灿芯半导体(苏州)有限公司 | FIR filter capable of dynamically adjusting calculation speed |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106849908B (en) | 2020-05-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Nicolaidis | Design for soft error mitigation | |
| Wang et al. | Efficient convolution architectures for convolutional neural network | |
| CN106849908A (en) | A kind of radiation hardened method of restructural FIR filter on star | |
| CN109284824A (en) | A kind of device for being used to accelerate the operation of convolution sum pond based on Reconfiguration Technologies | |
| Li et al. | Soft error mitigation for deep convolution neural network on FPGA accelerators | |
| Fisher et al. | Design of the PSC: A programmable systolic chip | |
| Jang et al. | Energy-efficient matrix multiplication on FPGAs | |
| CN103699355B (en) | Variable-order pipeline serial multiply-accumulator | |
| CN109284085B (en) | High-speed modular multiplication and modular exponentiation operation method and device based on FPGA | |
| US8131788B1 (en) | Determining sum of absolute differences in parallel | |
| Asadi et al. | Evaluation of fault-tolerant designs implemented on SRAM-based FPGAs | |
| CN105760243B (en) | One kind is based on the pretreated intelligent refresh control method of code stream | |
| CN105426274A (en) | Soft error-tolerant coarse-grained reconfigurable array | |
| CN104635148B (en) | Selective generation method for state vectors of parallel folding counter and hardware circuit for selective generation method | |
| Drozd et al. | Increase in reliability of on-line testing methods using natural time redundancy | |
| Maximenko et al. | Design Methodology for Embedded Systems with Built-in Self-Recovery | |
| Shen et al. | Reliability enhanced data processing system capable of runtime fault recovery | |
| Karri et al. | Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique | |
| Di et al. | Single event upset failure probability evaluation and periodic scrubbing techniques for hierarchical parallel vision processors | |
| Khaledi et al. | Compensating detection latency of FPGA scrubbers with a collaborative functional hardware duplication | |
| Imagawa et al. | High-speed DFG-level SEU vulnerability analysis for applying selective TMR to resource-constrained CGRA | |
| Drozd et al. | Parity prediction method for on-line testing of a Barrel-shifter | |
| Yang et al. | Applying input/output control of asynchronous sequential machines to dual ring counters | |
| Poolakkaparambil et al. | A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields | |
| Zhou et al. | Fault-tolerance with dual module redundancy for dynamic reconfigurable FPGAs |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |