CN106849084B - Net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing method - Google Patents
Net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing method Download PDFInfo
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- CN106849084B CN106849084B CN201710157026.0A CN201710157026A CN106849084B CN 106849084 B CN106849084 B CN 106849084B CN 201710157026 A CN201710157026 A CN 201710157026A CN 106849084 B CN106849084 B CN 106849084B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/01—Arrangements for reducing harmonics or ripples
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
- H02J2203/20—Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/20—Active power filtering [APF]
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- Power Engineering (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Abstract
The present invention relates to APF without harmonic detecting control technology field, specially net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing method.Net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing method includes 4 steps: step 1, the realization of three phase static coordinate transform link;Step 2, the filtering of current on line side feedforward;Step 3 takes the amplitude of current on line side feed-forward signal;Step 4, current on line side feed-forward signal are added in Voltage loop.Present invention improves APF DC voltage dynamic response characteristics, overcome the shortcomings that tradition is influenced without Harmonic detection DC voltage vulnerable to the fluctuation of load.
Description
Technical field
The present invention relates to APF without harmonic detecting control technology field, specially net side fundamental active forward-order current feedforward APF
DC voltage fluctuation suppressing method.
Background technique
Active Power Filter-APF (Active power filter, APF) is to administer harmonic wave, imbalance and the electric energy such as idle
The key equipment of quality problems, suppressing method is divided into Harmonic detection and without Harmonic detection two major classes, using harmonic detecting
Method needs while measuring load-side electric current and APF electric current, the harmonic detecting link for also needing design complicated, and filter design must also roll over
Middle dynamic and steady-state performance;No Harmonic detection need to only measure source current and can save harmonic detecting link, avoid harmonic wave
Influence of the error and delay of detection to compensation result, simplifies backoff algorithm.But traditional APF direct current without Harmonic detection
Pressure is influenced seriously by load fluctuation, and stability margin is small, especially will lead to APF exchange output pulsation when load frequent fluctuation,
Influence compensation effect.The prior art improves Voltage loop response speed, but the increasing of suppressor by changing voltage suppressor zero pole point
Benefit must compromise between stability and tracking velocity.By construction real-time optimization function and stability function, Voltage loop PI is joined
Number is inhibited using sliding formwork and stable region determines, accelerates voltage fluctuation recovery process, but the inhibition parameter changed is unfavorable for work
Cheng Shixian.
Summary of the invention
The technical problem to be solved by the present invention is being feedovered using net side fundamental positive sequence active current to improve no harmonic detecting
The dynamic response characteristic of APF DC voltage under method, to inhibit the fluctuation of DC voltage, to simplify the program in rest frame
Under realization, select and devise cascaded delay signal cancellation (Cascaded Delayed Signal Cancellation,
CDSC) filter obtains fundamental positive sequence current signal;Since the current on line side of stable state is identical as voltage-phase, devise accordingly
Active approximate algorithm replaces traditional watt current calculation method.
To achieve the above object, the technical scheme adopted by the invention is that:
Net side fundamental active forward-order current feedover APF DC voltage fluctuation suppressing method include 4 steps: step 1, three
The realization of phase static coordinate transform part;Step 2, the filtering of current on line side feedforward;Step 3 takes current on line side feed-forward signal
Amplitude;Step 4, current on line side feed-forward signal are added in Voltage loop;
Step 1, the realization of three phase static coordinate transform link:
Sample APF three-phase current on line side isa、isb、isc, then converted with Clarke Clark by three-phase current on line side isa、
isb、iscIt is transformed under two-phase stationary coordinate system, obtains current on line side i under two-phase stationary coordinate systemsα、isβ, wherein Clarke
Clark transformation for mula isisαAnd isβFor isa、isb、iscIt is corresponding in the static seat of two-phase
Mark is lower current on line side;
Step 2, the filtering of current on line side feedforward:
Current on line side i under the two-phase stationary coordinate system that step 1 is obtainedsαAnd isβPass through cascaded delay signal cancellation CDSC
After filter filtering, respective wire side group wave forward-order current signal i is obtainedsα+、isβ+, CDSC filter filtering takes DSC2~DSC6 five
Grade;
Step 3 takes the amplitude of current on line side feed-forward signal:
In no Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, utilizes the dynamic tune of no harmonic detecting
It saves to approach watt current, therefore the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+It is square
Root, the i.e. amplitude of current on line side feed-forward signal
Step 4, current on line side feed-forward signal are added in Voltage loop:
By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet is merged into addition
Side fundamental active current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current
Signal ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, the new finger as electric current loop
Enable electric current.
The beneficial effects of the invention are as follows firstly, improving after the feedforward of net side fundamental active forward-order current is added without harmonic detecting
Suppressing method improves APF DC voltage dynamic response characteristic, overcomes tradition without Harmonic detection DC voltage vulnerable to load
The shortcomings that influence of fluctuations, improvement project reduce APF dynamic loss, improve the regulation effect of current imbalance, secondly CDSC
Filter operation is simple, tracking velocity is fast, is suitable for obtaining the required fundamental positive sequence electric current that feedovers;Inhibited using no harmonic detecting
Dynamic regulation approaches the realization that watt current replaces complicated active calculating to further simplify feedforward link.
Detailed description of the invention
Fig. 1 is tradition without harmonic detecting APF control system block diagram;
Fig. 2 is APF control system block diagram of the invention;
Network side current waveform figure before and after load sudden change when Fig. 3 is no APF;
Fig. 4 is tradition without APF DC voltage and network side current waveform when load sudden change under harmonic detecting APF control system
Figure;
APF DC voltage and network side current waveform figure when Fig. 5 is load sudden change of the present invention;
Fig. 6 is tradition without harmonic detecting APF control system anticlimax load dynamic process enlarged drawing;
Fig. 7 is the dynamic process enlarged drawing of anticlimax of the present invention load.
Specific embodiment
It is that present invention work is further below with reference to example and attached drawing to be illustrated that advantage and technical characteristic of the invention more
Detailed description.
The present invention is net side fundamental active forward-order current feedforward APF DC voltage fluctuation suppressing method.The APF direct current
Voltage fluctuation refers to that the DC voltage of APF can generate catastrophic fluctuation when using the APF of traditional no Harmonic detection control.
Wherein, tradition is as shown in Figure 1 without harmonic detecting APF control system block diagram.It is electric current loop in Fig. 1 dot-dash wire frame, is in dotted line frame
Voltage loop, PI are pi controller, and C (s) is electric current loop transmission function, UdcDC capacitor voltage, Udc *For DC side electricity
Hold voltage reference value, CdcFor DC bus capacitor, idcFor DC bus capacitor electric current, esFor voltage on line side, EmFor voltage on line side amplitude,
ipElectric current, i are exported for Voltage loopfFor the output electric current of APF, isFor current on line side, ilFor load current, kpFor ifWith idcRatio
Coefficient,Indicate UdcAnd IdcProportionality coefficient,Indicate comparator,Multiplier is indicated, in Fig. 2Expression takes amplitude
Operation.The shortcomings that for tradition without Harmonic detection APF DC voltage fluctuation, the invention proposes the control systems of improvement project
Block diagram, as shown in Figure 2.Improvement project is added to net side fundamental active forward-order current feedforward link compared with traditional scheme, includes cascade
Postpones signal offsets (CDSC) filter and takes amplitude operation two parts, passes through cascaded delay signal cancellation (CDSC) filter
After (taking DSC2~DSC6 Pyatyi) filtering, respective wire side positive sequence of fundamental frequency is obtained, then by taking amplitude operation to obtain net side electricity
Flow the amplitude I of feed-forward signalsp, then by IspIt is added in Voltage loop, and the result with pi controller (PI) outputPhase
Add and merges into net side fundamental active current amplitude.Specific control process step are as follows: Step 1: three phase static coordinate transform link
It realizes;Step 2: the filtering of current feed-forward;Step 3: taking the amplitude of current on line side feed-forward signal;Step 4: before current on line side
Feedback signal is added in Voltage loop.
Step 1: the realization of three phase static coordinate transform link:
Sample APF three-phase current on line side isa、isb、isc, then converted with Clarke Clark by three-phase current on line side isa、
isb、iscIt is transformed under two-phase stationary coordinate system, obtains current on line side i under two-phase stationary coordinate systemsα、isβ, wherein Clarke
Clark transformation for mula isisαAnd isβFor isa、isb、iscIt is corresponding in the static seat of two-phase
Mark is lower current on line side;
Step 2: the filtering of current on line side feedforward:
Current on line side i under the two-phase stationary coordinate system that step 1 is obtainedsαAnd isβPass through cascaded delay signal cancellation CDSC
After filter filtering, respective wire side group wave forward-order current signal i is obtainedsα+、isβ+, CDSC filter filtering takes DSC2~DSC6 five
Grade;(DSC is bandstop filter, and DSC series is higher, and required delay is smaller, and the tracking time is faster, cascaded delay used in this step
Signal cancellation (CDSC) filter is that 2~6 grades of bandstop filter DSC cascade up to be formed by cascading filter);
Step 3 takes the amplitude of current on line side feed-forward signal:
In no Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, utilizes the dynamic tune of no harmonic detecting
It saves to approach watt current, the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+Root mean square,
That is the amplitude of current on line side feed-forward signal
Step 4, current on line side feed-forward signal are added in Voltage loop:
By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet is merged into addition
Side fundamental active current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current
Signal ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, the new finger as electric current loop
Enable electric current.
The present invention has apparent advanced compared with tradition is without Harmonic detection.Fig. 3 is to bear for two kinds when not putting into APF
Network side current waveform under carrying.Fig. 4 is DC voltage and network side current waveform after the APF investment using traditional scheme, it is seen then that
Its direct current, which is pressed with, when impact and anticlimax load significantly downwardly and upwardly fluctuates, and system needs 1s that could reach stable state again.
Fig. 5 is DC voltage obtained by the APF of improvement project and network side current waveform, it is seen that DC voltage fluctuation is obviously reduced, and system is only
0.1s is needed to reach stable state.
Fig. 6, Fig. 7 are respectively anticlimax load dynamic process time shaft waveform amplification under two kinds of Restrain measurements, are changed known to comparison
It arrived stable state into scheme electric current, adjustment time is shorter;It can also be seen that the current on line side value of traditional scheme is consistently greater than
Current on line side value under improvement project.By the physical significance of virtual value it is found that improvement project has smaller net side than traditional scheme
Power, it is identical because loading, therefore improvement project APF own loss is smaller.After the present invention is implemented, APF DC voltage dynamic is improved
Response characteristic overcomes the shortcomings that tradition is influenced without Harmonic detection DC voltage vulnerable to the fluctuation of load, and improvement project reduces
APF dynamic loss improves the regulation effect of current imbalance.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Any modifications, equivalent replacements, and improvements etc. done within principle, should all be included in the protection scope of the present invention.
Claims (1)
- The APF DC voltage fluctuation suppressing method 1. net side fundamental active forward-order current feedovers, it is characterised in that: in tradition without harmonic wave On the basis of detecting APF control system, addition net side fundamental active forward-order current feedforward link is added to cascaded delay signal pair Disappear and CDSC filter and take amplitude operation, specific control process includes four steps:Step 1: the realization of three phase static coordinate transform link:Sample APF three-phase current on line side isa、isb、isc, then converted with Clarke Clark by three-phase current on line side isa、isb、isc It is transformed under two-phase stationary coordinate system, obtains current on line side i under two-phase stationary coordinate systemsα、isβ, wherein Clarke Clark is converted Formula isisαAnd isβFor isa、isb、iscIt is corresponding off line in two-phase stationary coordinate system Side electric current;Step 2: the filtering of current on line side feedforward:Current on line side i under the two-phase stationary coordinate system that step 1 is obtainedsαAnd isβIt is filtered by cascaded delay signal cancellation CDSC After device filtering, respective wire side group wave forward-order current signal i is obtainedsα+、isβ+, CDSC filter filtering takes DSC2~DSC6 Pyatyi;Step 3 takes the amplitude of current on line side feed-forward signal:In no Harmonic detection, Dynamic Regulating Process power factor automatically tends to 1, using the dynamic regulation of no harmonic detecting come Watt current is approached, the amplitude of current on line side feed-forward signal is isα+、isβ+Effective current value Isα+、Isβ+Root mean square, i.e. net The amplitude of side current feed-forward signalStep 4, current on line side feed-forward signal are added in Voltage loop:By the amplitude I of current on line side feed-forward signalspWith the output result of pi controller PINet side base is merged into addition Wave watt current amplitude, then using net side fundamental active current amplitude and voltage on line side phase as net side fundamental active current signal ipAmplitude and phase, finally by net side fundamental active current signal ipIt is input in electric current loop, the new command electricity as electric current loop Stream.
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CN202759235U (en) * | 2012-08-10 | 2013-02-27 | 常州新惠数控技术有限公司 | High-precision quick-response active power filter |
CN105449718A (en) * | 2015-11-05 | 2016-03-30 | 山东大学 | Grid-connected synchronous phase-lock method based on improved series signal delay cancellation algorithm |
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CN202759235U (en) * | 2012-08-10 | 2013-02-27 | 常州新惠数控技术有限公司 | High-precision quick-response active power filter |
CN105449718A (en) * | 2015-11-05 | 2016-03-30 | 山东大学 | Grid-connected synchronous phase-lock method based on improved series signal delay cancellation algorithm |
Non-Patent Citations (1)
Title |
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采用CDSC滤波实现网侧有功电流前馈的APF无谐波检测控制;李云峰等;《中国知网》;20170303;第1-8页 |
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