CN106844796A - A kind of method that middle-level object of layout data is deleted - Google Patents
A kind of method that middle-level object of layout data is deleted Download PDFInfo
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- CN106844796A CN106844796A CN201510873989.1A CN201510873989A CN106844796A CN 106844796 A CN106844796 A CN 106844796A CN 201510873989 A CN201510873989 A CN 201510873989A CN 106844796 A CN106844796 A CN 106844796A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/18—Manufacturability analysis or optimisation for manufacturability
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- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
With the development and the expansion of IC design scale of manufacturing process, data to be processed are increasing needed for domain, and in last domain examination phase, designer is frequently necessary to carry out domain some tiny modifications, such as deletion of dummy figures.Object deletion is carried out for Hierarchical Design, existing method needs to be replicated whole hierarchical structure, can increase layout data and memory consumption.The present invention proposes a kind of method for the deletion of the middle-level object of layout data, statistical analysis is carried out to unit information in layout data, statistical information is set up into an aspect indexing table, in Delete Objects, characteristic value calculating is carried out to unit where object again, update aspect indexing table, and compared by characteristic value, the layout data for reducing repetition as far as possible is produced, and allows user that object deletion is quickly carried out in level domain, improves the efficiency of layout design.
Description
Technical field
The present invention relates to a kind of edit methods of integrated circuit layout data, especially for the deletion of the middle-level object of layout data, belong to EDA design fields.
Background technology
With the development and the expansion of IC design scale of manufacturing process, data to be processed are increasing needed for domain, and in last domain examination phase, designer is frequently necessary to carry out domain some tiny modifications, such as deletion of dummy figures.
But in existing eda tool, when user carries out the deletion of level object, whole hierarchical structure comprising this figure is carried out once complete duplication by needs, then the editing graph in this part of replicate data, this way can undoubtedly increase the operating time in large-scale layout data, and layout data is inevitably increased, memory consumption is increased.
This patent is directed to situation above, it is proposed that a kind of method that level object is deleted, and can allow user that object deletion is quickly carried out in level domain, and reduces the layout data generation of repetition as far as possible.
The content of the invention
This method carries out statistical analysis by all unit informations in layout data, then the unit information being deleted in unit hierarchical structure and existing file where object is compared and is analyzed, replicate data as few as possible, reduces the generation of repeated data, improves editing speed.
, it is necessary to carry out statistics and analysis to all of unit in domain before Delete Objects：Adduction relationship between statistics unit, calculates the information of all figures in unit, and these information are set up into a corresponding element characteristic concordance list.As shown in figure 1, have recorded all father's unit informations of each unit in concordance list and by each father's cell refernce number of times, all subelement information and quote each subelement number of times, and in this unit all figures characteristic information.
In Delete Objects, first calculate the characteristic value of hierarchy unit where object, if not inquiring corresponding result, need to be reconstructed the unit hierarchical structure where object, quantity to be quoted is not 1 unit in duplication hierarchical structure, and delete corresponding figure, and the reference corresponding to Delete Objects in the cell data for replicating；If existing corresponding result in concordance list, then directly quoted in the original location, delete original level and quote.
, it is necessary to update aspect indexing table after object deletion：The new unit for replicating is calculated into characteristic value and reference information is added to concordance list, and all units for being related to modification are updated in concordance list to its characteristic value and reference information.
Brief description of the drawings
Fig. 1 element characteristic concordance lists
The hierarchical structure of Fig. 2 original objects
Fig. 3 deletes the hierarchical structure after an object
Fig. 4 deletes the hierarchical structure after second object
Specific implementation step：
With reference to a method for specific example explanation Delete Objects in hierarchical structure, user needs to delete two objects in this data domain, and operating process step is as follows：
1）Fig. 2 is to placed two examples of Cell_A in top layer, and Cell_B is refer under Cell_A, there is an object Shape C in Cell_B, sets up an aspect indexing table for all units to whole layout data before deletion.
2）User calculates the feature for being deleted object and its elementary layer time before a Shape C is deleted, and then concordance list is inquired about, and qualified unit is not as a result found.
3）Original Cell_A is deleted, Cell_B and Cell_A are replicated, copy a Cell_B_clone1, and the Cell_A_colne1 comprising this Cell_B_clone1, as shown in Figure 3.
4）Delete Shape C, and updating block aspect indexing table.
5）Before deleting another Shape C, calculate the feature for being deleted object and its elementary layer time, then search index table, it was found that Cell_B_clone1 and symbol Cell_A_Clone1 meet its condition, Cell_A_clone1 is directly generated after just deleting Cell_A in the original location, operation is completed, operating time and layout data space is saved, as shown in Figure 4.
Claims (3)
1. the method that a kind of middle-level object of layout data is deleted, is related to being mainly characterized by for EDA design tools：
1）, it is necessary to carry out the adduction relationship between statistics and analysis, including unit to all of unit in domain before Delete Objects, the information of all figures in unit sets up corresponding element characteristic concordance list；
2）In Delete Objects, first calculate the characteristic value of hierarchy unit where object, if not inquiring corresponding result, need to be reconstructed the unit hierarchical structure where object, quantity to be quoted is not 1 unit in duplication hierarchical structure, and delete corresponding figure, and the reference corresponding to Delete Objects in the cell data for replicating；If existing corresponding result in concordance list, then directly quoted in the original location, delete original level and quote；
3）, it is necessary to update aspect indexing table after object deletion.
2. there is feature（1）、（2）Combination.
3. there is feature（1）、（2）、（3）Combination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510873989.1A CN106844796B (en) | 2015-12-03 | 2015-12-03 | Method for deleting hierarchical objects in layout data |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510873989.1A CN106844796B (en) | 2015-12-03 | 2015-12-03 | Method for deleting hierarchical objects in layout data |
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| Publication Number | Publication Date |
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| CN106844796A true CN106844796A (en) | 2017-06-13 |
| CN106844796B CN106844796B (en) | 2020-09-29 |
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| CN201510873989.1A Active CN106844796B (en) | 2015-12-03 | 2015-12-03 | Method for deleting hierarchical objects in layout data |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111444667A (en) * | 2018-12-29 | 2020-07-24 | 杭州广立微电子有限公司 | Method for quickly deleting transistor data in GDSII file |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314531A (en) * | 2010-07-02 | 2012-01-11 | 北京华大九天软件有限公司 | Automatic hierarchy construction method for integrated circuit layout |
| CN102841953A (en) * | 2011-06-23 | 2012-12-26 | 中国科学院微电子研究所 | Method for designing integrated circuit layout based on macro |
| CN103034740A (en) * | 2011-09-30 | 2013-04-10 | 北京华大九天软件有限公司 | Generation level layout method of schematic driven layout |
| CN103164560A (en) * | 2011-12-19 | 2013-06-19 | 北京华大九天软件有限公司 | Data reusing method of very large scale integrated circuit layout comparing tool |
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2015
- 2015-12-03 CN CN201510873989.1A patent/CN106844796B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314531A (en) * | 2010-07-02 | 2012-01-11 | 北京华大九天软件有限公司 | Automatic hierarchy construction method for integrated circuit layout |
| CN102841953A (en) * | 2011-06-23 | 2012-12-26 | 中国科学院微电子研究所 | Method for designing integrated circuit layout based on macro |
| CN103034740A (en) * | 2011-09-30 | 2013-04-10 | 北京华大九天软件有限公司 | Generation level layout method of schematic driven layout |
| CN103164560A (en) * | 2011-12-19 | 2013-06-19 | 北京华大九天软件有限公司 | Data reusing method of very large scale integrated circuit layout comparing tool |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111444667A (en) * | 2018-12-29 | 2020-07-24 | 杭州广立微电子有限公司 | Method for quickly deleting transistor data in GDSII file |
| CN111444667B (en) * | 2018-12-29 | 2023-03-21 | 杭州广立微电子股份有限公司 | Method for quickly deleting transistor data in GDSII file |
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| CN106844796B (en) | 2020-09-29 |
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Address after: 100102 Beijing city two Chaoyang District Lize Road No. 2 A block two layer Patentee after: Beijing Huada Jiutian Technology Co.,Ltd. Address before: 100102 Beijing city two Chaoyang District Lize Road No. 2 A block two layer Patentee before: HUADA EMPYREAN SOFTWARE Co.,Ltd. |
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