CN106844249B - RAID storage system and method based on RapidIO bus - Google Patents
RAID storage system and method based on RapidIO bus Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
Abstract
The invention discloses a RAID storage system and a method based on a RapidIO bus, wherein the system comprises a RapidIO CPU node module, a RapidIO storage module and a RapidIO switching network module, wherein: the RapidIO CPU node module executes RapidIO drive, RapidIO storage drive, MEM system and the like; the RapidIO storage module is mainly a switching network consisting of RapidIO switching chips; the RapidIO switching network module consists of an RAID array consisting of an FPGA chip and n SATA hard disks, and the FPGA chip is connected with the RAID array. The invention is reliable, high-efficient, low-delay, direct memory sharing, interruption and message transmission, can make the RAID storage array directly connected with the RapidIO bus, and any RapidIO processor node can access the Raid storage array with low delay and high bandwidth.
Description
Technical field
The present invention relates to a kind of RAID storage system and methods, more particularly to a kind of RAID based on RapidIO bus
Storage system and method.
Background technique
(RapidIO is a kind of high-performance for being taken the lead in advocating by companies such as Motorola and Mercury, low pin to RapidIO
Number, the interconnection architecture based on packet-switching, be for meet and the following high performance embedded system demand and design one
Kind open system interconnection technical standard) it is mainly used in embedded system intraconnection, support chip to chip, plate to leading between plate
News can be used as backboard (Backplane) connection of embedded device.Its because it is reliable, efficiently, low latency, direct memory sharing, in
Disconnected, message mode transmission, it is believed that be a kind of bus, and because it can connect multiple processor devices, set these
One net of standby composition, therefore may be considered a kind of network again.
(RAID is the abbreviation of English Redundant Array of Independent Disks to RAID, and Chinese is referred to as
" raid-array ") technology is to provide storage performance more higher than single hard disk for server, data center etc. and mention
For technology of data copy.
Synthesization platform based on RapidIO bus, data center, storage platform have required to store Raid
Support.The document having in the prior art illustrates RapidIO and does the advantage of Mass storage, feasibility, outlines it
Server network and RapidIO exchange network are connected by 10,000,000,000 bus of 10G using service bus adapter, it is suitable using disk array
Orchestration connects FC and stores network, and the adapter in the program, which needs to convert using processor participation agreement, to be stored, to will increase
Corresponding protocol conversion delay increases system power dissipation；Available data Center Scheme is to draw RapidIO bus from server
Out, it is used for the network interconnection, and disk array is just in server internal, in this way, which other server wants access in the server
Hard disc data, it is necessary to pass through the server process, need the processor-server convert, increase access delay, increase
System power dissipation.So the design scheme stored currently without the RAID for being directly facing RapidIO bus, network.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of RAID storage system based on RapidIO bus and sides
Method, reliable, efficient, low latency, direct memory sharing, interruption, the transmission of message mode, can be such that RAID storage array directly connects
RapidIO bus is connect, any RapidIO processor node can be with low delay, high-bandwidth access Raid storage array.
The present invention is to solve above-mentioned technical problem by following technical proposals: a kind of based on RapidIO bus
RAID storage system, which is characterized in that it includes Rapid IO cpu node module, RapidIO memory module, RapidIO friendship
Draping module, in which:
RapidIO cpu node module executes RapidIO driving, RapidIO storage driving, MEM system；
RapidIO switching network module, the switching network being predominantly made of RapidIO exchange chip；
RapidIO memory module is made of the RAID array that one piece of fpga chip and n block SATA hard disc form, by FPGA
Chip connects RAID array, n natural numbers.
Preferably, the fpga chip comprises the following modules:
RapidIO IP module, the module provide RapidIO bus and support；
RapidIO Target module, which becomes LocalBus bus for the Target request of RapidIO, and returns
Target response；
RapidIO Initiator module, the module generate the read-write to remote processor node memory spatial data and visit
It asks；
RapidIO CMD fifo module, the module carry out the imperative structures body of the Local Bus reading writing harddisk received
Queue storage；
DMA_Ctrl module, which obtains imperative structures body from RapidIO CMD fifo module, and completes hard disk
Data move work, complete generation Doorbell interruption and are sent to remote processor；
RAID CMD AsyFIFO module, the module cache the read-write SATA command of DMA, and make cross clock domain processing；
RAID READ DATA AsyFIFO module, the data that are read from RAID hard disk of module caching DMA, and work across when
The processing of clock domain；
RAID WRITE DATA AsyFIFO module, the data that module caching DMA is read from remote processor node,
And make cross clock domain processing；
SDtoRD module, the data which returns to three Lu Sanshi bis- SATA hard discs are detected by verification, are generated
60 four figures are according to write-in RAID READ DATA AsyFIFO module；
60 four figures according to according to sevtor address, are generated CRC check sector data by RDtoSD module, the module；
SATA module, the module complete the control of SATA protocol, and internal FIFO is used to buffer SATA hard disc data.
The present invention also provides a kind of RAID storage methods based on RapidIO bus, which is characterized in that it includes following step
It is rapid:
Step 1 constructs imperative structures body；
Step 2 carries out RAID storage.
Preferably, the step 1 includes: low order address, high address, sector low order address, sector high address, fan
Area's quantity, read-write mode, service identification number, in which:
Low order address and high address form the address Rapid IO, which indicates the storage of RapidIO processor or needs
Store the base address of data；
The sevtor address of sector low order address and sector high address composition RAID, which, which indicates, needs to read and write disk battle array
Arrange the base address of sector；
Number of sectors shows that this transmission needs to read and write the quantity of disk array sector；
It is to read disk array or write magnetic disk array that read-write mode, which defines this operation, and whether read-write needs to send out after the completion
Send Doorbell to processor；
Service identification number is shown to be which processor serviced.
Preferably, the step 2 includes following below scheme: RAID reading data flow journey, RAID write and take data flow.
Preferably, the RAID reading data flow journey the following steps are included:
Step 11, processor obtain an imperative structures body, and read as needed sevtor address, sector-size,
The ID of oneself, need to complete terminal, initialize sectorLowAddr, sectorHighAddr in the structural body,
SectorNumber, servID and rwMode；
Step 12 obtains and needs to store the addresses of data, and according to the address value to structural body rioLowAddr and
RioHighAddr assignment；
Using Nwrite or Nwrite_R affairs storage node order FIFO is written in data in structural body by step 13
In address, size 32B；
Step 14, DMA_Ctrl module receive structural body, initiate to read to ask to disk array according to block address and block size
It asks；
Step 15, disk array returned data are verified through SDTORD module and are detected, and return to DMA_Ctrl module；
Step 10 six, DMA_Ctrl module initiate Nwrite and write affairs, write data into the memory of remote processor；
Step 10 seven after DMA_Ctrl module data is transmitted, initiates Doorbell interrupt requests to remote processor；
Step 10 eight after processor gets interruption, that is, thinks that data in EMS memory is data in storing, activation, which is hung up, appoints
Business executes respective application.
Preferably, the RAID write take data flow the following steps are included:
Step 2 11, processor obtain an imperative structures body, and be written as needed datarams base address, need
The sevtor address to be read, sector-size, oneself ID, need to complete terminal, initialize rioLowAddr in the structural body,
RioHighAddr, sectorLowAddr, sectorHighAddr, sectorNumber, servID and rwMode；
Using Nwrite or Nwrite_R affairs storage node order is written in data in structural body by step 2 12
In fifo address, size 32B；
Step 2 13, DMA_Ctrl module receive structural body, are initiated according to the address RapidIO and block size to processor
Nread read request；
Step 2 14, processor node return to correspondence memory data；
Step 2 15 after DMA_Ctrl module receives partial data, initiates write request to disk array；
Step 2 16, SDtoRD module generate CRC check disk data, corresponding hard disk are written through SATA；
Step 2 17 after DMA_Ctrl module data is transmitted, is initiated Doorbell interruption to remote processor and is asked
It asks；
Step 2 18 after processor gets interruption, i.e., it is believed that data in EMS memory is processed, activates hang-up task,
Discharge correspondence memory.
The positive effect of the present invention is that: the present invention is reliable, efficiently, low latency, direct memory sharing, interrupt, disappear
The transmission of breath mode can make RAID storage array be directly connected to RapidIO bus, and any RapidIO processor node can be with
Low delay, high-bandwidth access Raid storage array.
Detailed description of the invention
Fig. 1 is that the present invention is based on the system framework figures of the RAID storage system of RapidIO bus.
Fig. 2 is that the present invention is based on the flow diagrams of the RAID storage method of RapidIO bus.
Fig. 3 is the structural schematic diagram of fpga chip.
Specific embodiment
Present pre-ferred embodiments are provided with reference to the accompanying drawing, in order to explain the technical scheme of the invention in detail.
As shown in Figure 1, the present invention is based on the RAID (raid-array) of RapidIO (interconnection architecture) bus
Storage system includes Rapid IO CPU (processor) node module, RapidIO memory module, RapidIO switching network module,
In:
RapidIO cpu node module executes RapidIO driving, RapidIO storage driving, MEM (file) system etc.；
RapidIO switching network module, the switching network being predominantly made of RapidIO exchange chip；
RapidIO memory module, by one piece of FPGA (field programmable gate array) chip and n block SATA (serial ports) hard disk groups
At RAID array composition, RAID array, n natural numbers are connected by fpga chip.
RapidIO CPU (processor) node module, RapidIO memory module, RapidIO switching network module warp
RapidIO connection makes any Rapid I/O processor node that can access any Rapid IO by RapidIO network and deposits
Storage.
As shown in figure 3, fpga chip comprises the following modules:
RapidIO IP (IP(Internet Protocol)) module, the module provide RapidIO bus and support；
The Target request of RapidIO is become LocalBus bus by RapidIO Target (target) module, the module
(for configuring FPGA internal register), and return to Target response；
RapidIO Initiator (initiation) module, the module are generated to remote processor node memory spatial data
Read and write access；
RapidIO CMD (order) FIFO (First In First Out, first in first out) module, the module is by Local
The imperative structures body for the reading writing harddisk that Bus (local bus) is received carries out queue storage, stores more than 512 imperative structures bodies；
DMA (Direct Memory Access, direct memory access) _ Ctrl (control key) module, the module from
Imperative structures body is obtained in RapidIO CMD fifo module, and completes the work of moving of hard disc data, completes to generate
Doorbell interruption is sent to remote processor；
RAID CMD (order) AsyFIFO (asynchronous first in first out) module, the module cache the read-write SATA command of DMA,
And make cross clock domain processing；
RAID READ DATA (reading data) AsyFIFO (asynchronous first in first out) module, the module cache DMA from RAID
The data that hard disk is read, and make cross clock domain processing；
RAID WRITE DATA (write-in data) AsyFIFO module, the module cache DMA and read from remote processor node
The data taken, and make cross clock domain processing；
SDtoRD (SATA to RAID, serial ports is to raid-array, or is " SDtoRD ") module, the module
The data that three Lu Sanshi bis- SATA hard discs are returned are detected by verification, generate 60 four figures according to write-in RAID READ
DATA AsyFIFO module；
RDtoSD (RAID to SATA, independent redundancy disk battle array is to serial ports, or is " RD2SD ") module, which will
60 four figures generate CRC (Cyclic Redundancy Check, cyclic redundancy check) verification fan according to according to sevtor address
Area's data；
SATA (serial ports) module, the module complete the control of SATA protocol, and internal FIFO is used to buffer SATA hard disc data,
When preventing 3 pieces of hard disk returned data differences, lead to loss of data.
As shown in Fig. 2, the RAID storage method based on RAPID IO bus the following steps are included:
Step 1 constructs imperative structures body；
Step 2 carries out Raid storage.
The step 1 include: rioLowAddr (low order address), rioHighAddr (high address),
SectorLowAddr (sector low order address), sectorHighAddr (sector high address), sectorNumber (sector number
Amount), rwMode (read-write mode), servID (service identification number), in which:
RioLowAddr and rioHighAddr form the address Rapid IO, the address indicate the storage of RapidIO processor or
Need to store the base address of data, the generally processor is memory base address of the block number according to application；
The sevtor address of sectorLowAddr and sectorHighAddr composition RAID, which, which indicates, needs to read and write magnetic
The base address of disk array sector；
SectorNumber, the value show that this transmission needs to read and write the quantity of disk array sector；
RwMode, it is to read disk array or write magnetic disk array which, which defines this operation, and whether read-write needs after the completion
Doorbell is sent to processor；
ServID, which, which is shown to be, services which processor, the generally ID of the processor.
The structural body major function is exactly to illustrate where FPGA needs the sevtor address read and write, needs that how many fan moved
Area moves in which block memory of which ID, and completes whether need to send Doorbell interrupt notification processor.
The step 2 includes: that RAID reading data flow journey, RAID write and take data flow.
The RAID reading data flow journey the following steps are included:
Step 11, processor obtain an imperative structures body, and read as needed sevtor address, sector-size,
The ID of oneself, need to complete terminal, initialize sectorLowAddr, sectorHighAddr in the structural body,
SectorNumber, servID and rwMode；
Step 12 obtains and needs to store the addresses of data, and according to the address value to structural body rioLowAddr and
RioHighAddr assignment；
Using Nwrite or Nwrite_R affairs storage node order FIFO is written in data in structural body by step 13
In address, size is 32B (or once writing multiple)；
Step 14, DMA_Ctrl module receive structural body, initiate to read to ask to disk array according to block address and block size
It asks；
Step 15, disk array returned data are verified through SDTORD module and are detected, and return to DMA_Ctrl module；
Step 10 six, DMA_Ctrl module initiate Nwrite and write affairs, write data into the memory of remote processor；
Step 10 seven after DMA_Ctrl module data is transmitted, initiates Doorbell interrupt requests to remote processor；
Step 10 eight after processor gets interruption, that is, thinks that data in EMS memory is data in storing, activation, which is hung up, appoints
Business executes respective application.
The RAID write take data flow the following steps are included:
Step 2 11, processor obtain an imperative structures body, and be written as needed datarams base address, need
The sevtor address to be read, sector-size, oneself ID, need to complete terminal, initialize rioLowAddr in the structural body,
RioHighAddr, sectorLowAddr, sectorHighAddr, sectorNumber, servID and rwMode；
Step 2 12, using Nwrite (new write-in) or Nwrite_R (right new write-in) affairs by the data in structural body
It is written in storage node order fifo address, size is 32B (or once writing multiple)；
Step 2 13, DMA_Ctrl module receive structural body, are initiated according to the address RapidIO and block size to processor
Nread read request；
Step 2 14, processor node return to correspondence memory data；
Step 2 15 after DMA_Ctrl module receives partial data, initiates write request to disk array；
Step 2 16, SDtoRD module generate CRC check disk data, corresponding hard disk are written through SATA；
Step 2 17 after DMA_Ctrl module data is transmitted, is initiated Doorbell interruption to remote processor and is asked
It asks；
Step 2 18 after processor gets interruption, that is, thinks that data in EMS memory is processed, activates hang-up task, releases
Put correspondence memory.
Particular embodiments described above, the technical issues of to solution of the invention, technical scheme and beneficial effects carry out
It is further described, it should be understood that the above is only a specific embodiment of the present invention, is not limited to
The present invention, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should be included in this
Within the protection scope of invention.
Claims (2)
1. a kind of RAID storage system based on RapidIO bus, which is characterized in that it includes Rapid IO cpu node mould
Block, RapidIO memory module, RapidIO switching network module, in which:
RapidIO cpu node module executes RapidIO driving, RapidIO storage driving, MEM system；
RapidIO switching network module, the switching network being predominantly made of RapidIO exchange chip；
RapidIO memory module is made of the RAID array that one piece of fpga chip and n block SATA hard disc form, by fpga chip
Connect RAID array, n natural numbers；The fpga chip comprises the following modules:
RapidIO IP module, the module provide RapidIO bus and support；
RapidIO Target module, which becomes LocalBus bus for the Target request of RapidIO, and returns
Target response；
RapidIO Initiator module, the module generate the read and write access to remote processor node memory spatial data；
The imperative structures body of the Local Bus reading writing harddisk received is carried out queue by RapidIO CMD fifo module, the module
Storage；
DMA_Ctrl module, which obtains imperative structures body from RapidIO CMD fifo module, and completes hard disc data
Move work, complete to generate Doorbell interruption being sent to remote processor；
RAID CMD AsyFIFO module, the module cache the read-write SATA command of DMA, and make cross clock domain processing；
RAID READ DATA AsyFIFO module, the data that module caching DMA is read from RAID hard disk, and make cross clock domain
Processing；
RAID WRITE DATA AsyFIFO module, the data that module caching DMA is read from remote processor node, and make
Cross clock domain processing；
SDtoRD module, the data which returns to three Lu Sanshi bis- SATA hard discs are detected by verification, generate 60
Four figures is according to write-in RAID READ DATA AsyFIFO module；
60 four figures according to according to sevtor address, are generated CRC check sector data by RDtoSD module, the module；
SATA module, the module complete the control of SATA protocol, and internal FIFO is used to buffer SATA hard disc data.
2. a kind of RAID storage method based on RapidIO bus, which is characterized in that itself the following steps are included:
Step 1 constructs imperative structures body；
Step 2 carries out RAID storage；
The step 1 includes: low order address, high address, sector low order address, sector high address, number of sectors, read-write
Mode, service identification number, in which:
Low order address and high address form the address Rapid IO, which indicates the storage of RapidIO processor or need to store
The base address of data；
The sevtor address of sector low order address and sector high address composition RAID, which, which indicates, needs to read and write disk array fan
The base address in area；
Number of sectors shows that this transmission needs to read and write the quantity of disk array sector；
It is to read disk array or write magnetic disk array that read-write mode, which defines this operation, and whether read-write needs to send after the completion
Doorbell is to processor；
Service identification number is shown to be which processor serviced；
The step 2 includes following below scheme: RAID reading data flow journey, RAID write and take data flow；The RAID reads data
Process the following steps are included:
Step 11, processor obtain an imperative structures body, and read as needed sevtor address, sector-size, oneself
ID, need to complete terminal, initialize sectorLowAddr, sectorHighAddr in the structural body, sectorNumber,
ServID and rwMode；
Step 12 obtains and needs to store the addresses of data, and according to the address value to structural body rioLowAddr and
RioHighAddr assignment；
Using Nwrite or Nwrite_R affairs storage node order fifo address is written in data in structural body by step 13
In, size 32B；
Step 14, DMA_Ctrl module receive structural body, initiate read request to disk array according to block address and block size；
Step 15, disk array returned data are verified through SDTORD module and are detected, and return to DMA_Ctrl module；
Step 10 six, DMA_Ctrl module initiate Nwrite and write affairs, write data into the memory of remote processor；
Step 10 seven after DMA_Ctrl module data is transmitted, initiates Doorbell interrupt requests to remote processor；
Step 10 eight after processor gets interruption, that is, thinks that data in EMS memory is data in storing, activates hang-up task,
Execute respective application；The RAID write take data flow the following steps are included:
Step 2 11, processor obtain an imperative structures body, and be written as needed datarams base address, need to read
The sevtor address that takes, sector-size, oneself ID, need to complete terminal, initialize rioLowAddr in the structural body,
RioHighAddr, sectorLowAddr, sectorHighAddr, sectorNumber, servID and rwMode；
Step 2 12, by the data write-in storage node order FIFO in structural body using Nwrite or Nwrite_R affairs
In location, size 32B；
Step 2 13, DMA_Ctrl module receive structural body, are initiated according to the address RapidIO and block size to processor
Nread read request；
Step 2 14, processor node return to correspondence memory data；
Step 2 15 after DMA_Ctrl module receives partial data, initiates write request to disk array；
Step 2 16, SDtoRD module generate CRC check disk data, corresponding hard disk are written through SATA；
Step 2 17 after DMA_Ctrl module data is transmitted, initiates Doorbell interrupt requests to remote processor；
Step 2 18 after processor gets interruption, i.e., it is believed that data in EMS memory is processed, activates hang-up task, release
Correspondence memory.
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Families Citing this family (7)
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| CN108449289B (en) * | 2018-03-09 | 2020-10-20 | 天津芯海创科技有限公司 | Dynamic management method and system for RapidIO switching equipment |
| CN109451362A (en) * | 2018-07-25 | 2019-03-08 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | RapidIO network interface under VxWorks and implementation method |
| CN109286471B (en) * | 2018-09-30 | 2021-01-22 | 中国人民解放军战略支援部队信息工程大学 | CRC (Cyclic redundancy check) method and device for SRIO (serial peripheral input/output) controller |
| CN113141385B (en) * | 2020-01-19 | 2022-11-15 | 大唐移动通信设备有限公司 | Data receiving and processing method and device, electronic equipment and storage medium |
| CN112148660A (en) * | 2020-09-29 | 2020-12-29 | 中国船舶重工集团公司第七二四研究所 | RapidIO dual-channel data real-time packaging and transmitting method |
| CN113031862B (en) * | 2021-03-18 | 2024-03-22 | 中国电子科技集团公司第五十二研究所 | Storage system for controlling SATA disk based on NVME protocol |
| CN115269455B (en) * | 2022-09-30 | 2022-12-23 | 湖南兴天电子科技股份有限公司 | Disk data read-write control method and device based on FPGA and storage terminal |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103346982A (en) * | 2013-07-12 | 2013-10-09 | 中国人民解放军总参谋部第六十三研究所 | Star-shaped structure Rapid IO interconnecting system and exchanger configuration method thereof |
| CN103902229A (en) * | 2012-12-27 | 2014-07-02 | 北京华清瑞达科技有限公司 | Blade storage device |
| CN204347834U (en) * | 2014-12-30 | 2015-05-20 | 上海师范大学 | A kind of server cluster storage system based on FPGA |
| CN104714904A (en) * | 2013-12-14 | 2015-06-17 | 中国航空工业集团公司第六三一研究所 | RapidIO controller adopting window mapping mechanism and control method of RapidIO controller |
| CN105824366A (en) * | 2016-03-21 | 2016-08-03 | 浪潮集团有限公司 | Large-capacity high-speed recording board card on basis of Rapid IO (Input-Output) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7245617B2 (en) * | 2003-02-07 | 2007-07-17 | Fujitsu Limited | Queuing packets written to memory for switching |
| US20070124554A1 (en) * | 2005-10-28 | 2007-05-31 | Honeywell International Inc. | Global memory for a rapidio network |
-
2016
- 2016-12-06 CN CN201611111849.1A patent/CN106844249B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103902229A (en) * | 2012-12-27 | 2014-07-02 | 北京华清瑞达科技有限公司 | Blade storage device |
| CN103346982A (en) * | 2013-07-12 | 2013-10-09 | 中国人民解放军总参谋部第六十三研究所 | Star-shaped structure Rapid IO interconnecting system and exchanger configuration method thereof |
| CN104714904A (en) * | 2013-12-14 | 2015-06-17 | 中国航空工业集团公司第六三一研究所 | RapidIO controller adopting window mapping mechanism and control method of RapidIO controller |
| CN204347834U (en) * | 2014-12-30 | 2015-05-20 | 上海师范大学 | A kind of server cluster storage system based on FPGA |
| CN105824366A (en) * | 2016-03-21 | 2016-08-03 | 浪潮集团有限公司 | Large-capacity high-speed recording board card on basis of Rapid IO (Input-Output) |
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| CN106844249A (en) | 2017-06-13 |
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