CN106842742B - A kind of array substrate and display device - Google Patents
A kind of array substrate and display device Download PDFInfo
- Publication number
- CN106842742B CN106842742B CN201710052459.XA CN201710052459A CN106842742B CN 106842742 B CN106842742 B CN 106842742B CN 201710052459 A CN201710052459 A CN 201710052459A CN 106842742 B CN106842742 B CN 106842742B
- Authority
- CN
- China
- Prior art keywords
- array substrate
- test pads
- display area
- antistatic
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of array substrate and display device comprising a substrate body, the substrate body include the display area positioned at middle part and the non-display area around the display area.Wherein, it is equipped with signal on the non-display area below the display area and draws circuit, one end that the signal draws circuit is connected with multiple spaced test pads, and the multiple test pads are set to the lower edge of the substrate body.Wherein, before the array substrate is cut into type, corresponding position is equipped with antistatic metal wire below each test pads, and every antistatic metal wire is connected to the metal loop wire except the substrate body, and the antistatic metal wire is not attached to the test pads.The present invention can effectively prevent the test pads of array substrate by static damage.
Description
[technical field]
The present invention relates to field of liquid crystal display, in particular to a kind of array substrate and display device.
[background technique]
LTPS (Low Temperature Poly-Silicon, low temperature polycrystalline silicon) array substrate is in high-end handsets, plate
It has been widely applied on computer, the products such as IPHONE 6S mobile phone, LG G5 mobile phone, Kindle Fire Hdx tablet computer are equal
Use LTPS array of display substrate.LTPS array substrate manufacturing process is complicated, and susceptible to static electricity in array substrate manufacturing process hits
Hurt the influence of (ESD), the enhancing antistatic ability of wounding of LTPS array substrate is for promoting array substrate yield and reducing array base
Plate manufacturing cost is significant.
Currently, the production of array substrate, is first to form multiple array substrates being spaced apart on one piece of biggish substrate
Structure, it is cut according to the cutting line of setting one by one then, obtains multiple array substrates.Often meeting below LTPS array substrate
Test pads are set to scrap undesirable array substrate in time, test pads are closer from array substrate cutting line, array
The electrostatic generated when substrate cut, which is easy to be passed to by test pads inside array substrate, causes its failure.
As shown in Fig. 2, can be used for the hot-wire array base in production for the structure design of LTPS array substrate common at present
The state of plate.The LTPS array substrate includes display area 10 and non-display area 40, array test circuit 20, row turntable driving
Circuit 30 (Gate on Array, GOA), signal draw circuit 50, IC circuit 60 (i.e. integrated circuit) and test pads 70.Such as
Shown in Fig. 2, test pads 70 are closer from array substrate lower edge, and the electrostatic that array substrate is generated in cutting is easy to pass through test
Pad inside 70 incoming array substrates and cause the damage of array substrate.
[summary of the invention]
The purpose of the present invention is to provide a kind of array substrate and display devices, to solve in the prior art, in cutting battle array
When column substrate, the electrostatic that array substrate generates when cutting, which is easy to be passed to inside array substrate by test pads, leads to array
The problem of substrate fails.
Technical scheme is as follows:
A kind of array substrate, including a substrate body, the substrate body include being located at the display area at middle part and being located at
Non-display area around the display area;
Wherein, it is equipped with signal on the non-display area below the display area and draws circuit, the signal draws
One end of circuit is connected with multiple spaced test pads out, and the multiple test pads are set under the substrate body
Edge;
Wherein, before the array substrate is cut into type, corresponding position is quiet equipped with preventing below each test pads
Electric metal line, every antistatic metal wire are connected to the metal loop wire except the substrate body, the antistatic metal
Line is not attached to the test pads;
Antistatic metal wire one end opposite with the test pads is equipped with electrostatic protection structure, the electrostatic protection
Structure is used to block the lower end surface of the test pads.
Preferably, the electrostatic protection structure is multi-layer metal structure.
Preferably, the signal, which is drawn, is equipped with IC circuit below circuit, the IC circuit is adjacent with the test pads to be set
It sets.
It is preferably located at the non-display area above the display area and is equipped with array test circuit, the array is surveyed
Try the top edge that circuit is set to the substrate body.
Preferably, the corresponding non-display area in the display area both sides is respectively equipped with line-scanning drive circuit.
Preferably, before the array substrate is cut into type, the antistatic metal wire and the metal loop wire by
Same step is made.
Preferably, before the array substrate is cut into type, the antistatic metal wire is cut with substrate
When, a part of electrostatic for cutting generation is intercepted by the electrostatic protection structure, and another part electrostatic is via the antistatic metal
Line is exported to the metal loop wire.
A kind of display device comprising array basal plate, the array substrate include a substrate body, the substrate body
Display area including being located at middle part and the non-display area around the display area;
Wherein, it is equipped with signal on the non-display area below the display area and draws circuit, the signal draws
One end of circuit is connected with multiple spaced test pads out, and the multiple test pads are set under the substrate body
Edge;
Wherein, before the array substrate is cut into type, corresponding position is quiet equipped with preventing below each test pads
Electric metal line, every antistatic metal wire are connected to the metal loop wire except the substrate body, the antistatic metal
Line is not attached to the test pads;
Antistatic metal wire one end opposite with the test pads is equipped with electrostatic protection structure, the electrostatic protection
Structure is used to block the lower end surface of the test pads.
Beneficial effects of the present invention:
Of the invention a kind of array substrate and display device, by before the array substrate is cut into type, every
Antistatic metal wire is arranged in corresponding position below a test pads, and every antistatic metal wire is made to be connected to the base
Metal loop wire except plate ontology, the antistatic metal wire are not attached to the test pads, solve in the prior art,
When cutting array substrate, the electrostatic that array substrate generates when cutting is easy to be passed to inside array substrate by test pads and lead
The problem of causing array substrate failure.
[Detailed description of the invention]
Fig. 1 is a kind of overall structure diagram of array substrate of the embodiment of the present invention;
Fig. 2 is a kind of overall structure diagram of array substrate of the prior art.
[specific embodiment]
The explanation of following embodiment is to can be used to the particular implementation of implementation to illustrate the present invention with reference to additional schema
Example.The direction term that the present invention is previously mentioned, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outside", " side "
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the present invention, rather than to
The limitation present invention.The similar unit of structure is to be given the same reference numerals in the figure.
Embodiment one
Referring to FIG. 1, a kind of overall structure diagram of array substrate of Fig. 1 the present embodiment.From figure 1 it will be seen that this
A kind of array substrate of invention, is in the present embodiment LTPS array substrate comprising a substrate body, the substrate body packet
Include the display area 1 positioned at middle part and the non-display area 4 around the display area 1.
Wherein, it is equipped with signal on the non-display area 4 below the display area 1 and draws circuit 5, the signal
The one end for drawing circuit 5 is connected with multiple spaced test pads 7, and the multiple test pads 7 are set to the substrate sheet
The lower edge of body.
Wherein, before the array substrate is cut into type, each 7 lower section corresponding position of test pads is quiet equipped with preventing
Electric metal line 8, every antistatic metal wire 8 are connected to the metal loop wire 9 except the substrate body, the antistatic gold
Belong to line 8 to be not attached to the test pads 7.
In the present embodiment, the antistatic metal wire 8 one end opposite with the test pads 7 is equipped with electrostatic protection knot
Structure 81, the electrostatic protection structure 81 are used to block the lower end surface of the test pads 7.The electrostatic protection structure 81 is such as same
Test pads 7 are surrounded towards one end of antistatic metal wire 8, the electrostatic for flowing to test pads 7 are blocked by a semi-surrounding circle
It stops.
In the present embodiment, the preferably described electrostatic protection structure 81 is multi-layer metal structure, this more layers metal structure
It can guarantee completely to intercept electrostatic, like multiple nets of stacking, interception function can be bigger.
In the present embodiment, the signal draws and is equipped with IC circuit 6 below circuit 5, and the IC circuit 6 is served as a contrast with the test
Pad 7 is disposed adjacent.
In the present embodiment, the non-display area 4 above the display area 1 is equipped with array test circuit 2, institute
State the top edge that array test circuit 2 is set to the substrate body.
In the present embodiment, the corresponding non-display area 4 in 1 both sides of display area is respectively equipped with row turntable driving
Circuit 3, for driving the grid line of 1 the inside of display area.
In the present embodiment, before the array substrate is cut into type, the antistatic metal wire 8 and the metal
Loop wire 9 is made of same step.Making step can be saved in this way, save cost of manufacture.
In the present embodiment, before the array substrate is cut into type, to the antistatic metal wire 8 and substrate into
When row cutting, a part of electrostatic for cutting generation is intercepted by the electrostatic protection structure 81, and another part electrostatic is via described anti-
Electrostatic metal line 8 is exported to the metal loop wire 9.
Present invention may also apply to the design of the antistatic of array substrate lower part IC circuit 6, the i.e. lower section in IC circuit 6 and cuttings
Antistatic metal wire 8 is also provided between line, to protect IC circuit 6 not by the damage of electrostatic.
Antistatic metal wire 8 and metal loop wire 9 of the invention can by the method for mature exposure production metallic pattern come
Preparation, does not need additional step.Firstly, antistatic metal wire 8 and 9 corresponding light shield (mask) of metal loop wire are made and being changed
Dynamic, other figures are constant on light shield, but Additional definitions go out antistatic metal wire 8 and the corresponding figure of metal loop wire 9.Then, exist
In LTPS panel manufacturing process, (it can be deposited and be printed by PVD film respectively to metal layer and photoresist layer is covered with new light shield
To prepare) glass substrate be exposed, will be in the pattern transfer to photoresist on light shield.Then, developed, be fixed, photoresist
Etching, unexposed photoresist is etched away, and formation includes the figure of 9 shape of antistatic metal wire 8 and metal loop wire on photoresist
Shape.After this, glass baseplate surface is removed not by the metal of the photoresist area of coverage, thus by photoresist by plasma etching
In pattern transfer to metal layer.After the completion of this step, etching removes the remaining photoresist on metal, retains the gold for having formed figure
Belong to, metal wire, antistatic metal wire 8 and the metal loop wire 9 in panel can be formed simultaneously.
A kind of array substrate of the invention is right below each test pads 7 by before it is cut into type
Should locate that antistatic metal wire 8 is arranged, the antistatic metal wire 8 is set between test pads 7 and the cutting line of array substrate,
And it is connected to the metal loop wire 9 outside array substrate.When cutting array substrate, the electrostatic generated near test pads 7 can lead to
It crosses antistatic metal wire 8 to reach metal loop wire 9 and release, therefore can reduce test pads 7 by the probability of electrostatic damage.Solution
It has determined in the prior art, when cutting array substrate, the electrostatic that array substrate generates when cutting is easy incoming by test pads 7
The problem of inside array substrate and then array substrate being caused to fail.
Embodiment two
This implementation provides a kind of display device, which includes array substrate described in an embodiment one, the array
Substrate is described in detail in example 1, and this will not be repeated here.
A kind of display device of the invention, the display device is by before array substrate is cut into type, in each institute
7 lower section corresponding position of test pads setting antistatic metal wire 8 is stated, the antistatic metal wire 8 is set to test pads 7 and array
Between the cutting line of substrate, and it is connected to the metal loop wire 9 outside array substrate.It is attached in test pads 7 when cutting array substrate
The electrostatic closely generated can reach metal loop wire 9 by antistatic metal wire 8 and release, thus can reduce test pads 7 by
The probability of electrostatic damage.It solves in the prior art, when cutting array substrate, the electrostatic that array substrate generates when cutting is easy
The problem of causing array substrate to fail inside array substrate is passed to by test pads 7.
In conclusion although the present invention has been disclosed above in the preferred embodiment, but above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention subjects to the scope of the claims.
Claims (8)
1. a kind of array substrate, which is characterized in that including a substrate body, the substrate body includes positioned at the viewing area at middle part
Domain and the non-display area around the display area;
Wherein, it is equipped with signal on the non-display area below the display area and draws circuit, the signal draws electricity
The one end on road is connected with multiple spaced test pads, and the multiple test pads are set to the following of the substrate body
Edge;
Wherein, before the array substrate is cut into type, corresponding position is equipped with antistatic gold below each test pads
Belong to line, every antistatic metal wire is connected to the metal loop wire except the substrate body, the antistatic metal wire with
The test pads are not attached to;
Antistatic metal wire one end opposite with the test pads is equipped with electrostatic protection structure, the electrostatic protection structure
For blocking the lower end surface of the test pads.
2. array substrate according to claim 1, which is characterized in that the electrostatic protection structure is multi-layer metal structure.
3. array substrate according to claim 1, which is characterized in that the signal, which is drawn, is equipped with IC circuit below circuit,
The IC circuit is disposed adjacent with the test pads.
4. array substrate according to claim 1, which is characterized in that the non-display area above the display area
It is equipped with array test circuit, the array test circuit is set to the top edge of the substrate body.
5. array substrate according to claim 1, which is characterized in that the display area both sides are corresponding described non-display
Region is respectively equipped with line-scanning drive circuit.
6. array substrate according to claim 1, which is characterized in that before the array substrate is cut into type, institute
It states antistatic metal wire and is made with the metal loop wire of same step.
7. array substrate according to claim 1, which is characterized in that right before the array substrate is cut into type
When the antistatic metal wire and substrate are cut, a part of electrostatic for cutting generation is intercepted by the electrostatic protection structure,
Another part electrostatic is exported via the antistatic metal wire to the metal loop wire.
8. a kind of display device, which is characterized in that it includes array basal plate, and the array substrate includes a substrate body, institute
Stating substrate body includes the display area positioned at middle part and the non-display area around the display area;
Wherein, it is equipped with signal on the non-display area below the display area and draws circuit, the signal draws electricity
The one end on road is connected with multiple spaced test pads, and the multiple test pads are set to the following of the substrate body
Edge;
Wherein, before the array substrate is cut into type, corresponding position is equipped with antistatic gold below each test pads
Belong to line, every antistatic metal wire is connected to the metal loop wire except the substrate body, the antistatic metal wire with
The test pads are not attached to;
Antistatic metal wire one end opposite with the test pads is equipped with electrostatic protection structure, the electrostatic protection structure
For blocking the lower end surface of the test pads.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710052459.XA CN106842742B (en) | 2017-01-24 | 2017-01-24 | A kind of array substrate and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710052459.XA CN106842742B (en) | 2017-01-24 | 2017-01-24 | A kind of array substrate and display device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106842742A CN106842742A (en) | 2017-06-13 |
CN106842742B true CN106842742B (en) | 2019-09-24 |
Family
ID=59120800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710052459.XA Active CN106842742B (en) | 2017-01-24 | 2017-01-24 | A kind of array substrate and display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106842742B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107908052A (en) * | 2017-11-06 | 2018-04-13 | 深圳市华星光电技术有限公司 | Liquid crystal panel structure |
CN111352281A (en) * | 2020-04-07 | 2020-06-30 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
CN111462629A (en) * | 2020-04-10 | 2020-07-28 | 友达光电(昆山)有限公司 | Display panel |
CN113539087B (en) * | 2021-06-24 | 2022-12-23 | 上海中航光电子有限公司 | First display panel, second display panel, manufacturing method of second display panel and display device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20060134263A (en) * | 2005-06-22 | 2006-12-28 | 삼성전자주식회사 | Thin film transistor substrate and liquid crystal display including the same |
KR101033463B1 (en) * | 2008-06-13 | 2011-05-09 | 엘지디스플레이 주식회사 | Array Substrate of Liquid Crystal Display Device |
KR101200258B1 (en) * | 2008-12-26 | 2012-11-12 | 엘지디스플레이 주식회사 | Mother array substrate for liquid crystal display device |
KR102181165B1 (en) * | 2014-03-04 | 2020-11-23 | 삼성디스플레이 주식회사 | Thin film transistor substrate and method of manufacturing liquid crystal display device using the same |
-
2017
- 2017-01-24 CN CN201710052459.XA patent/CN106842742B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN106842742A (en) | 2017-06-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106842742B (en) | A kind of array substrate and display device | |
US10304682B2 (en) | Array substrate, fabricating method thereof, and display device | |
US10928959B2 (en) | Touch screen and manufacturing method thereof, and touch display device | |
CN105428355B (en) | Array substrate and preparation method thereof, display device | |
JP6930715B2 (en) | Display modules, display panels, display devices and electronic devices | |
CN108873515B (en) | Display panel and display device | |
WO2021068407A1 (en) | Touch sensing device and touch display panel | |
US9996208B2 (en) | Touch screen, manufacturing method thereof and display device | |
WO2017071423A1 (en) | Array substrate and manufacturing method thereof, and display device | |
CN109300970A (en) | Display panel and display device | |
US11588123B2 (en) | Protective film, display module, display assembly, method for preparing display assembly and display device | |
EP3287839B1 (en) | Embedded touch panel having high resistance film and display device | |
CN107065287B (en) | Display panel and display device | |
KR20140108641A (en) | Oxide thin film transistor array substrate, manufacturing method thereof, and display panel | |
KR20140032773A (en) | Foldable multi display device and manufacturing method of the same | |
CN106057782A (en) | Antistatic protection structure and reliability improving method of semiconductor panel | |
TWI827244B (en) | Display panels and display devices | |
CN109116612A (en) | Display panel and display device | |
CN104934449A (en) | Display substrate and manufacturing method thereof, and display apparatus | |
KR20190131586A (en) | Array substrate and its manufacturing method | |
CN105700723B (en) | A kind of organic light emitting display and its manufacturing method with touch device | |
TWM594161U (en) | Display module and terminal device | |
CN108461492B (en) | Thin film transistor array substrate, display panel and display device | |
CN107422543B (en) | Display panel, preparation method thereof and display device | |
CN102983103A (en) | Method of fabricating thin film transistor array substrate, array substrate and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |