CN106814292A - High-speed data exchange method between combining unit module and PC main frames - Google Patents
High-speed data exchange method between combining unit module and PC main frames Download PDFInfo
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- CN106814292A CN106814292A CN201611257190.0A CN201611257190A CN106814292A CN 106814292 A CN106814292 A CN 106814292A CN 201611257190 A CN201611257190 A CN 201611257190A CN 106814292 A CN106814292 A CN 106814292A
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- Prior art keywords
- combining unit
- unit module
- main frames
- module
- data
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
- G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
- G01R31/1263—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
- G01R31/1272—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation of cable, line or wire insulation, e.g. using partial discharge measurements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
- H04L69/164—Adaptation or special uses of UDP protocol
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses the high-speed data exchange method between a kind of combining unit module and PC main frames, it is related to data interactive method technical field.Interacted by 5007 ports and port between the combining unit module and PC main frames, wherein 5007 is COM1, client/server communication pattern is set up using disconnected UDP, wherein local combining unit module is server end, PC is client;5008 is FPDP, and packet is sent to acquiescence PC ends IP address using UDP modes.Methods described can realize that the high-speed data between combining unit module and PC main frames is interacted, and improve the speed and control speed of data acquisition so that the speed of service between combining unit module and PC main frames is faster.
Description
Technical field
The present invention relates between data interactive method technical field, more particularly to a kind of combining unit module and PC main frames
High-speed data exchange method.
Background technology
When field intensity exceedes the disruptive field intensity of air around transmission line wire, the air ionization near adjacent conductors is produced
Corona discharge, the ion that corona discharge is produced back and forth movement under alternating voltage effect, while can also produce light and radio dry
Disturb, these effects are referred to as corona effect.Corona effect depends primarily on corona inception voltage, and it is for ultra-high voltage AC transmission
The safety and economic benefit assessment of line conductor type selecting and circuit operation is significant, generally using measure traverse line current in resistance property
Method judges conductor corona starting voltage.
Optical functions electronic type generally need to be used in current measurement using optical fiber and digital method collection current in resistance property at present
After current transformer OPCT16, JDSU module carry out electrical-optical-electrical conversion, feeding capture card is acquired, due to OPCT16 volumes
Larger, complex manufacturing technology, and (gathered once at OPCT16 ends, collection, it is necessary to be gathered twice during current measurement
Card end gathers once) bigger error is introduced, a whole set of measuring system is compared redundancy.
Data interactive method in the prior art between data acquisition end and data processing end is relatively simple, it is impossible to realize two
High-speed data acquisition between person, causes data processing end slower to the control speed of data collection terminal, it is impossible to obtain faster
Response.
The content of the invention
The technical problems to be solved by the invention are to provide the high-speed data between a kind of combining unit module and PC main frames
Exchange method, methods described can realize that the high-speed data between combining unit module and PC main frames is interacted, and improve data and adopt
The speed and control speed of collection so that the speed of service between combining unit module and PC main frames is faster.
In order to solve the above technical problems, the technical solution used in the present invention is:A kind of combining unit module and PC main frames
Between high-speed data exchange method, it is characterised in that:Between the combining unit module and PC main frames by 5007 ports and
Port interacts, wherein 5007 is COM1, client/server communication pattern is set up using disconnected UDP, wherein locally
Combining unit module is server end, and PC is client;5008 is FPDP, using UDP modes to acquiescence PC ends IP address
Send packet.
Further technical scheme is that 5007 described port working flows are as follows:
1) local combining unit module opening initialization, default conditions are closing collection, empty caching;
2) after initialization is finished, the UDP message for waiting PC main frames to be received to send;
3) resolve command after data is received, the IP address of PC main frames is preserved to transmission gathered data task as target ground
Location;
4) when order is reading state, specified byte data are sent;Order is to empty caching, the number such as caching before emptying
According to;Order is to close collection, and this order is only locally useful to master control, and it closes synchronous acquisition pulse forwarding, and empties caching;
5) cancel and read data command
6) operation more than having performed, returns to the 2) step, and 5008 port processings a to bag data are to be sent out.
Further technical scheme is that PC host work flows are:
1) traveled through using UDP multicast address, read each local combining unit module status, confirm each combining unit module work
Make normal;
2) optical fiber link state is obtained using the order of UDP multicast address;
3) each combining unit module is emptied using UDP multicast address orders to cache;
4) UDP multicast address or master control IP address are used, is ordered the main control module of local combining unit module to be opened and is adopted
Collection signal;
5) gathered data from each local combining unit module is received;
6) local combining unit module status at regular intervals, are read, it is necessary to when closing collection, Command combination unit mould
The main control module of block closes collection signal.
Preferably, described combining unit module includes that several distal end collection plates, optical fiber converge plate, FPGA clock moulds
Block, processor and network interface module, several distal end collection plates are carried out two-way by optical fiber convergence plate with the FPGA clock modules
Data interaction, the distal end collection plate is used to gather the current in resistance property of transmission pressure, and fiber collection plate is used to converge distal end collection
The current in resistance property data of plate;The FPGA clock modules are bi-directionally connected with the processor, and FPGA clock modules are used to export same
Step sampling pulse simultaneously detects reception synchrodata passback pulse, Synchronous Sampling Pulse control distal end collection plate synchronous acquisition wire
Current in resistance property, detection sends the data to processor and is processed after receiving synchrodata passback pulse;Processor passes through net
Mouth mold block is bi-directionally connected with PC main frames, after processor is used to process the data for receiving, is led in the form of message
Cross network interface module and send to PC main frames and processed, and receive the control command that PC main frames are passed down.
Preferably, the distal end collection plate is 1-36.
Preferably, the microprocessor uses P1010-RDB.
Preferably, the combining unit module also includes serial communication and debugging interface, and the serial communication connects with debugging
Mouth is bi-directionally connected with processor, for programming and the debugging of related hardware program in the combining unit module.
Preferably, the combining unit module also includes therefore normal management module, the fault management module and the treatment
Device is bi-directionally connected, for fault alarm and the management of related hardware function in the combining unit module.
Preferably, the combining unit module also includes parameter memory module, and the parameter memory module is double with processor
To connection, the initiation parameter for storing related hardware in the amalgamated unit.
It is using the beneficial effect produced by above-mentioned technical proposal:Methods described can realize combining unit module and PC
High-speed data interaction between main frame, improves the speed and control speed of data acquisition so that combining unit module and PC
The speed of service between main frame is faster.
Additionally, in combining unit module the characteristics of FPGA clock modules combination current in resistance property signal, the resistive electricity of synchronous acquisition
Flow, the decoded markers of current in resistance property amount is read out by the processor by serial communication port.Meanwhile, FPGA may determine that 1PPS believes
Number validity, and reject under optical fiber swapping process or other disturbed conditions produce spurious signal, it is right so as to ensure that
The accuracy of corona characteristic parameter collection.And the combining unit module small volume, integrated level is high, while being triggered using light pulse
The synchronous passback of the data of each distal end collection plate is ensure that, the delay problem of intermodular data passback is successfully solved, it is synchronous
Property is high.
Brief description of the drawings
The present invention is further detailed explanation with reference to the accompanying drawings and detailed description.
Fig. 1 is the data interaction flow chart of embodiment of the present invention methods described;
Fig. 2 is the theory diagram of combining unit module in embodiment of the present invention methods described.
Specific embodiment
With reference to the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Ground description, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Many details are elaborated in the following description in order to fully understand the present invention, but the present invention can be with
Other manner described here is different from using other to implement, those skilled in the art can be without prejudice to intension of the present invention
In the case of do similar popularization, therefore the present invention is not limited by following public specific embodiment.
The invention discloses the high-speed data exchange method between a kind of combining unit module and PC main frames, the merging list
Interacted by 5007 ports and port between element module and PC main frames, wherein 5007 is COM1, use disconnected UDP
Client/server communication pattern is set up, wherein local combining unit module is server end, PC is client;5008 is data
Port, packet is sent using UDP modes to acquiescence PC ends IP address.
As shown in figure 1,5007 described port working flows are as follows:
1) local combining unit module opening initialization, default conditions are closing collection, empty caching;
2) after initialization is finished, the UDP message for waiting PC main frames to be received to send;
3) resolve command after data is received, the IP address of PC main frames is preserved to transmission gathered data task as target ground
Location;
4) when order is reading state, specified byte data are sent;Order is to empty caching, the number such as caching before emptying
According to;Order is to close collection, and this order is only locally useful to master control, and it closes synchronous acquisition pulse forwarding, and empties caching;
5) cancel and read data command
6) operation more than having performed, returns to the 2) step, and 5008 port processings a to bag data are to be sent out.
As shown in figure 1, described PC host work flows are:
1) traveled through using UDP multicast address, read each local combining unit module status, confirm each combining unit module work
Make normal;
2) optical fiber link state is obtained using the order of UDP multicast address;
3) each combining unit module is emptied using UDP multicast address orders to cache;
4) UDP multicast address or master control IP address are used, is ordered the main control module of local combining unit module to be opened and is adopted
Collection signal;
5) gathered data from each local combining unit module is received;
6) local combining unit module status at regular intervals, are read, it is necessary to when closing collection, Command combination unit mould
The main control module of block closes collection signal.
Methods described can realize that the high-speed data between combining unit module and PC main frames is interacted, and improve data acquisition
Speed and control speed so that the speed of service between combining unit module and PC main frames is faster.
As shown in Fig. 2 the combining unit module includes that several distal end collection plates, optical fiber converge plate, FPGA clock moulds
Block, processor and network interface module, several distal end collection plates are carried out two-way by optical fiber convergence plate with the FPGA clock modules
Data interaction, the distal end collection plate is used to gather the current in resistance property of transmission pressure, and fiber collection plate is used to converge distal end collection
The current in resistance property data of plate;The FPGA clock modules are bi-directionally connected with the processor, and FPGA clock modules are used to export same
Step sampling pulse simultaneously detects reception synchrodata passback pulse, Synchronous Sampling Pulse control distal end collection plate synchronous acquisition wire
Current in resistance property, detection sends the data to processor and is processed after receiving synchrodata passback pulse;Processor passes through net
Mouth mold block is bi-directionally connected with PC main frames, after processor is used to process the data for receiving, is led in the form of message
Cross network interface module and send to PC main frames and processed.
Additionally, the combining unit module can also include serial communication and debugging interface, the serial communication and debugging
Interface is bi-directionally connected with processor, for programming and the debugging of related hardware program in the combining unit module.The merging
Unit module can also include therefore normal management module that the fault management module is bi-directionally connected with the processor, for described
The fault alarm of related hardware function and management in combining unit module.The combining unit module can also be stored including parameter
Module, the parameter memory module is bi-directionally connected with processor, the initialization for storing related hardware in the amalgamated unit
Parameter.
The combining unit module performs the control of Synchronous Sampling Pulse and sends, to realize the same of all distal end collection plates
Step collection, can receive most 36 roads fiber data, carry out convergence and by UDP procotols according to the message format for specifying
Local PC is sent to, is that high potential current in resistance property measurement is laid a good foundation, as N=1, local combining unit module only receives resistance
The property road fiber data of electric current 1.
Processor using dominant frequency 800MHz the enhanced integrated primary processor P1010-RDB of speed, the processor is based on the
Four generation powerpc QorIQ trusted infrastructures platforms, with advanced end-to-end code signature and intrusion prevention function, help to prevent
Only software invasion and software clone, the also integrated multiple FlexCAN controllers of P1010 processors, can configure various factory automations
The industrial protocol of system.P1010 communication processors use 45 nanometers of Low-power Technologies, power consumption as little as 1.1W, with powerful simultaneously
Integration capability and equipped with abundant interface, increase with 32KB L1 instruction buffers and 32KB L1 data buffer storages, 3 1000Mbps
Strong type ethernet controller, 2 SGMII interfaces, 2 SATA interfaces, 32 DDR3SDRAM Memory Controller Hub support with ECC,
Four-way dma controller, it is ensured that significance arithmetic of the system to current in resistance property parameter signals is processed.
The characteristics of FPGA clock module combination current in resistance property signals, synchronous acquisition current in resistance property amount, the decoding of current in resistance property amount
Markers afterwards is read out by the processor by serial communication port.Meanwhile, FPGA may determine that the validity of 1PPS signals, and reject
The spurious signal produced under optical fiber swapping process or other disturbed conditions, so as to ensure that the standard to the collection of corona characteristic parameter
True property.And the combining unit module small volume, integrated level is high, while ensure that each distal end collection plate using light pulse triggering
Data synchronous passback, successfully solve the delay problem of intermodular data passback, synchronism is high.
Claims (9)
1. the high-speed data exchange method between a kind of combining unit module and PC main frames, it is characterised in that:The combining unit
Interacted by 5007 ports and port between module and PC main frames, wherein 5007 is COM1, built using disconnected UDP
Vertical client/server communication pattern, wherein local combining unit module is server end, PC is client;5008 is data terminal
Mouthful, send packet to acquiescence PC ends IP address using UDP modes.
2. the high-speed data exchange method between combining unit module as claimed in claim 1 and PC main frames, it is characterised in that
5007 described port working flows are as follows:
1) local combining unit module opening initialization, default conditions are closing collection, empty caching;
2) after initialization is finished, the UDP message for waiting PC main frames to be received to send;
3) resolve command after data is received, the IP address of PC main frames is preserved to transmission gathered data task as destination address;
4) when order is reading state, specified byte data are sent;Order is to empty caching, the data such as caching before emptying;
Order is to close collection, and this order is only locally useful to master control, and it closes synchronous acquisition pulse forwarding, and empties caching;
5) cancel and read data command
6) operation more than having performed, returns to the 2) step, and 5008 port processings a to bag data are to be sent out.
3. the high-speed data exchange method between combining unit module as claimed in claim 1 and PC main frames, it is characterised in that
PC host work flows are:
1) traveled through using UDP multicast address, read each local combining unit module status, confirming each combining unit module work just
Often;
2) optical fiber link state is obtained using the order of UDP multicast address;
3) each combining unit module is emptied using UDP multicast address orders to cache;
4) UDP multicast address or master control IP address are used, orders the main control module of local combining unit module to open collection letter
Number;
5) gathered data from each local combining unit module is received;
6) local combining unit module status at regular intervals, are read, it is necessary to when closing collection, Command combination unit module
Main control module closes collection signal.
4. the high-speed data exchange method between combining unit module as claimed in claim 1 and PC main frames, it is characterised in that:
Described combining unit module includes that several distal end collection plates, optical fiber converge plate, FPGA clock modules, processor and network interface mould
Block, several distal end collection plates converge plate and carry out bidirectional data interaction, the distal end with the FPGA clock modules by optical fiber
Collection plate is used to gather the current in resistance property of transmission pressure, and fiber collection plate is used to converge the current in resistance property data of distal end collection plate;
The FPGA clock modules are bi-directionally connected with the processor, and FPGA clock modules are used to export Synchronous Sampling Pulse and detection connects
Synchrodata passback pulse is received, Synchronous Sampling Pulse controls the current in resistance property of distal end collection plate synchronous acquisition wire, and detection is received
Processor is sent the data to after to synchrodata passback pulse to be processed;Processor is carried out by network interface module with PC main frames
It is bi-directionally connected, after processor is used to process the data for receiving, is sent to PC by network interface module in the form of message
Main frame is processed, and receives the control command that PC main frames are passed down.
5. the high-speed data exchange method between combining unit module as claimed in claim 4 and PC main frames, it is characterised in that:
The distal end collection plate is 1-36.
6. the high-speed data exchange method between combining unit module as claimed in claim 4 and PC main frames, it is characterised in that:
The microprocessor uses P1010-RDB.
7. the high-speed data exchange method between combining unit module as claimed in claim 4 and PC main frames, it is characterised in that:
The combining unit module also includes serial communication and debugging interface, the serial communication and debugging interface and the two-way company of processor
Connect, for programming and the debugging of related hardware program in the combining unit module.
8. the high-speed data exchange method between combining unit module as claimed in claim 4 and PC main frames, it is characterised in that:
The combining unit module also includes therefore normal management module that the fault management module is bi-directionally connected with the processor, is used for
The fault alarm of related hardware function and management in the combining unit module.
9. the high-speed data exchange method between combining unit module as claimed in claim 4 and PC main frames, it is characterised in that:
The combining unit module also includes parameter memory module, and the parameter memory module is bi-directionally connected with processor, for storing
The initiation parameter of related hardware in the amalgamated unit.
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