CN106789399B - Test method, device and system - Google Patents

Test method, device and system Download PDF

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CN106789399B
CN106789399B CN201611062134.1A CN201611062134A CN106789399B CN 106789399 B CN106789399 B CN 106789399B CN 201611062134 A CN201611062134 A CN 201611062134A CN 106789399 B CN106789399 B CN 106789399B
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message
excitation
test
module
processing module
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CN106789399A (en
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凌云
张敏
解军
邱昆
胡钢
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Chengdu Uestc Optical Communication Co ltd
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Chengdu Uestc Optical Communication Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/50Testing arrangements

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Abstract

The invention relates to the technical field of avionics, in particular to a testing method, a testing device and a testing system. The test method comprises the following steps: responding to user operation to send an excitation message to the exchange device, and enabling the exchange device to send the received excitation message to a target general processing module, wherein the excitation message comprises a destination address of the target general processing module; receiving a response message acquired by the switching device from the target general processing module, wherein the response message is generated by the target general processing module according to the excitation message; and judging whether the response message is the same as the excitation message or not, if so, judging that the target general processing module has complete functions, generating another excitation message to test another general processing module, and if not, stopping the test. By the testing method, the testing cost is reduced, and the testing complexity is reduced.

Description

Test method, device and system
Technical Field
The invention relates to the technical field of avionics, in particular to a testing method, a testing device and a testing system.
Background
Avionics systems have undergone a process that has gone from discrete, federated to integrated. Currently, integrated avionics systems employ a comprehensive architecture. In the Integrated avionics system, an Integrated Core Processor (ICP) is the core of the system, and undertakes distributed processing of the tasks of the avionics system, determining whether the avionics system can operate normally. The ICP mainly consists of interconnected General Processing modules (GPP), the GPP can load different applications according to task requirements, and allocate different Processing tasks, and the ICP is connected to external non-General sensor front-end, flight control, navigation, display control and other devices through interfaces, so as to implement communication between the ICP and external devices, and complete data Processing and system information comprehensive Processing requirements on the external devices. Software design, development and verification for avionics systems are not subject to ICP. Therefore, testing for ICP is particularly important. Generally, ICP testing requires verification of each GPP, and each GPP needs to be externally connected with a test terminal, which results in excessive number of external test terminals, high cost, and complicated control of test procedures between different test terminals.
Disclosure of Invention
In view of the above, the present invention provides a testing method, device and system to solve the above problems.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
a test method applied to a test terminal capable of communicating with an integrated core processor through a switching device, the integrated core processor including a plurality of general purpose processing modules, the test method comprising:
responding to user operation to send an excitation message to the exchange device, and enabling the exchange device to send the received excitation message to a target general processing module, wherein the excitation message comprises a destination address of the target general processing module;
receiving a response message acquired by the switching device from the target general processing module, wherein the response message is generated by the target general processing module according to the excitation message; and
and judging whether the response message is the same as the excitation message or not, if so, judging that the target general processing module has complete functions, generating another excitation message to test another general processing module, and if not, stopping the test.
Further, before the step of sending the stimulus message to the switching device in response to the user operation, the method further includes:
responding to user operation, and generating an excitation message corresponding to the user operation;
encapsulating the stimulus message as an FC frame;
and converting the excitation message encapsulated into the FC frame from an electric signal into an optical signal and sending the optical signal to the switching device.
Further, the step of generating an incentive message corresponding to the user operation in response to the user operation includes:
responding to user operation, and searching a test processing logic corresponding to the user operation;
and generating an excitation message according to the test processing logic.
Further, after the step of acquiring the response message from the target general processing module, the receiving and exchanging device determines whether the response message is the same as the excitation message, if so, determines that the target general processing module has a complete function, generates another excitation message to test another general processing module, and if not, before the step of stopping the test, the method further includes:
converting the response message from an optical signal to an electrical signal;
and de-encapsulating the response message in the FC frame format.
Another embodiment of the present invention provides a testing apparatus, which is applied to a testing terminal capable of communicating with an integrated core processor through an exchange apparatus, wherein the integrated core processor includes a plurality of general processing modules, and the testing apparatus includes an excitation message sending module, a response message receiving module, and a judging module;
the excitation message sending module is used for responding to user operation and sending an excitation message to the exchange device, so that the exchange device sends the received excitation message to the target general processing module, and the excitation message comprises a destination address of the target general processing module;
the response message receiving module is used for receiving a response message acquired by the switching device from the target general processing module, and the response message is generated by the target general processing module according to the excitation message;
the judging module is used for judging whether the response message is the same as the excitation message or not, and if so, judging that the target general processing module has complete functions.
Furthermore, the test device also comprises an excitation message generation sub-module, an excitation message encapsulation sub-module and an excitation message conversion sub-module;
the excitation message generation submodule is used for responding to user operation and generating an excitation message corresponding to the user operation;
the excitation message encapsulation submodule is used for encapsulating the excitation message into an FC frame;
the excitation message conversion sub-module is used for converting the excitation message encapsulated into the FC frame from an electric signal into an optical signal and sending the optical signal to the switching device.
Furthermore, a plurality of test processing logics are stored in the test terminal, and the excitation message generation submodule comprises a logic program searching unit and an excitation message generation unit;
the logic program searching unit is used for responding to user operation and searching the test processing logic corresponding to the user operation;
the excitation message generating unit is used for generating an excitation message according to the test processing logic.
Furthermore, the test device also comprises a response message conversion module and a response message de-encapsulation module;
the response message conversion module is used for converting the response message from an optical signal into an electrical signal;
and the response message decapsulation module is used for decapsulating the response message in the FC frame format.
Another embodiment of the present invention provides a test system, which includes a switching device, a plurality of general processing modules of an integrated core processor, and the test device, wherein:
the switching device is used for receiving the excitation message sent by the testing device and sending the excitation message to a target general processing module, and the switching device is also used for receiving a response message which is sent by the target general processing module and generated according to the excitation message and sending the response message to the testing device;
the target general processing module is used for receiving the excitation message, generating a response message corresponding to the excitation message according to the excitation message, and sending the response message to the exchange device;
the testing device is used for sending an excitation message and receiving a response message sent by the exchange device, judging whether the response message is the same as the excitation message or not, if so, judging that the function of the target general processing module is complete, generating another excitation message to test another general processing module, and if not, stopping the test.
Furthermore, the switching device comprises a first messaging port, a second messaging port and a path identification module, wherein the second messaging port comprises a plurality of ports, and the second messaging port corresponds to the general processing module one by one;
the first message receiving and sending port is used for receiving an excitation message sent by the testing device, and the first message receiving and sending port is also used for sending a response message generated according to the excitation message to the testing device;
the plurality of second messaging ports are used for sending the excitation message received by the first messaging port to the corresponding general processing module, and the plurality of second messaging ports are also used for receiving a response message generated according to the excitation message;
and the path identification module is used for enabling the excitation message to be sent to a second message receiving and sending port corresponding to the target general processing module according to the destination address of the target general processing module contained in the excitation message.
According to the testing method, the testing device and the testing system provided by the embodiment of the invention, the switching device is used for sending the excitation message to the target general processing module, receiving the response message acquired by the switching device from the target general processing module, judging whether the response message is the same as the excitation message or not, if so, judging that the target general processing module has complete functions, generating another excitation message to test another general processing module, and if not, stopping the test, so that the testing of a plurality of general processing modules by one testing terminal can be realized, the testing cost is reduced, and the testing complexity is also reduced.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a block diagram of a test terminal according to an embodiment of the present invention.
Fig. 2 is a schematic flowchart of a testing method according to an embodiment of the present invention.
Fig. 3 is a flowchart illustrating the sub-steps of step S100 in fig. 2.
Fig. 4 is a flow chart illustrating a sub-step of sub-step S110 in fig. 3.
Fig. 5 is another schematic flow chart of a testing method according to an embodiment of the present invention.
Fig. 6 is a block diagram of a testing apparatus according to an embodiment of the present invention.
Icon: 10-a test terminal; 100-a test device; 110-an incentive message sending module; 111-stimulus message generation submodule; 1111-a logic program searching unit; 1112-an excitation message generating unit; 112-stimulus message encapsulation submodule; 113-stimulus message conversion submodule; 120-a response message receiving module; 130-a judgment module; 140-response message conversion module; 150-response message decapsulation module; 200-a memory; 300-a memory controller; 400-a processor; 500-peripheral interfaces; 600-input-output unit.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Referring to fig. 1, the test terminal 10 includes a test apparatus 100, a memory 200, a memory controller 300, a processor 400, a peripheral interface 500, and an input/output unit 600.
The memory 200, the memory controller 300, the processor 400, the peripheral interface 500 and the input/output unit 600 are electrically connected to each other directly or indirectly, so as to realize signal transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines. The test apparatus 100 includes at least one software functional module that can be stored in the memory 200 in the form of software or firmware (firmware). The processor 400 is used to execute executable modules stored in the memory 200, such as software functional modules or computer programs included in the testing device 100.
The Memory 200 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Read-Only Memory (EPROM), an electrically Erasable Read-Only Memory (EEPROM), and the like. The memory 200 is used for storing a program, and the processor 400 executes the program after receiving an execution instruction, and the method defined by the flow disclosed in any embodiment of the present invention may be applied to the processor 400, or implemented by the processor 400.
Processor 400 may be an integrated circuit chip having signal processing capabilities. The Processor 400 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and so on. But may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor 400 may be any conventional processor 400 or the like.
The peripheral interface 500 couples various input/output devices to the processor 400 and to the memory 200. In some embodiments, the peripheral interface 500, the processor 400, and the memory controller 300 may be implemented in a single chip. In other examples, they may be implemented separately from the individual chips.
It will be appreciated that the configuration shown in FIG. 1 is merely illustrative, and that the test terminal 10 may include more or fewer components than shown in FIG. 1, or may have a different configuration than shown in FIG. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.
Referring to fig. 2, an embodiment of the present invention provides a testing method, which is applied to the testing terminal 10, and the testing terminal 10 can communicate with the ICP through the switching device. The ICP includes a plurality of GPPs, and the specific flow and steps shown in fig. 2 will be described in detail below.
Step S100, responding to user operation to send excitation message to the exchange device, and making the exchange device send the received excitation message to target GPP, where the excitation message includes destination address of target GPP.
In this embodiment, each GPP has a unique address, each excitation message includes an address of one GPP, that is, the excitation message corresponds to the GPP one-to-one, and the GPP corresponding to the excitation message can be queried and determined according to the target address.
In addition, the test terminal 10 applying the test method described in this embodiment may include a plurality of target GPP operation options or may include one target GPP operation option. It should be noted that the target GPP operation option is used to select the target GPP. When the test terminal 10 includes a plurality of target GPP operation options, optionally, each target GPP operation option may correspond to one GPP, that is, the user may generate an excitation message for testing the GPP corresponding to the target GPP operation option by selecting one of the target GPP operation options. In order to further reduce the test complexity, it is preferable that the test terminal 10 applying the test method described in this embodiment includes a target GPP operation option, where the target GPP operation option corresponds to one of the GPPs, that is, when the switch device detects that there is a test request, the switch device sends an excitation message corresponding to the GPP to the switch device, so that the switch device sends the received excitation message to the GPP.
Step S200, receiving a response message acquired by the switching apparatus from the target GPP, where the response message is generated by the target GPP according to the excitation message.
Step S300, judging whether the response message is the same as the excitation message, if so, judging that the target GPP function is complete, generating another excitation message to test another GPP, and if not, stopping the test.
As can be seen from step S300, when the response message is the same as the stimulus message that generated the response message, it is determined that the target GPP is complete in function and tests the next target GPP, and the above procedure is executed in a loop for multiple times, and the test is not stopped until the response message is different from the stimulus message that generated the response message.
In the process that the test apparatus 100 determines that the response message is the same as the stimulus message, and generates another stimulus message to test another GPP, the another stimulus message may be randomly selected or selected according to a preset sequence table.
Referring to fig. 3, the step S100 may include three sub-steps of step S110, step S120 and step S130, which are described in detail as follows.
Step S110, responding to a user operation, and generating an incentive message corresponding to the user operation.
When the test terminal 10 to which the test method described in this embodiment is applied includes a plurality of target GPP operation options, the stimulus messages may be generated one by one according to user operations. In this embodiment, in order to further reduce the complexity of the test, the test terminal 10 includes a target GPP operation option, that is, when responding to the user operation, the test apparatus 100 generates an excitation message for testing the GPP corresponding to the excitation message. When the GPP test is completed and the test apparatus 100 determines that the GPP test is complete, another stimulus message is automatically generated for testing the next GPP.
Step S120, the stimulus message is encapsulated into an FC frame.
Since the peripheral communication interface of the ICP supports the FC protocol, the stimulus message needs to be encapsulated as an FC frame when the stimulus message is transmitted to the switching apparatus. It should be noted that, in step S120, the excitation message may also be packaged into other data forms according to the peripheral communication interface type of the ICP. In addition, if the ICP includes a bluetooth transceiver, the excitation message may also be transmitted via bluetooth, and if the ICP supports near field communication, the excitation message may also be transmitted via near field communication.
Step S130, converting the excitation message encapsulated as the FC frame from an electrical signal to an optical signal and sending the optical signal to the switching device.
Referring to fig. 4, further, the step S110 may include two sub-steps, i.e., a step S111 and a step S112, which are described in detail below.
Step S111, responding to the user operation, and searching the test processing logic corresponding to the user operation.
In this embodiment, the test processing logic is a program code for generating the stimulus message.
And step S112, generating an excitation message according to the test processing logic.
Referring to fig. 5, in the present embodiment, after the step S200 and before the step 300, the method may further include a step S400 and a step S500, which are described in detail as follows.
Step S400, converting the response message from an optical signal to an electrical signal.
Step S500, decapsulating the response message in the FC frame format.
In this embodiment, the step S400 is a reverse step of the step S130, and the step S500 is a reverse step of the step S120, that is, when the peripheral communication interface of the ICP supports other communication types, the step S400 and the step S500 may also be other message processing procedures.
Referring to fig. 6, an embodiment of the present invention further provides a testing apparatus 100, where the testing apparatus 100 is applied to a testing terminal 10 capable of communicating with an ICP through an exchange apparatus, where the ICP includes multiple GPPs, and the testing apparatus 100 includes an excitation message sending module 110, a response message receiving module 120, and a determining module 130.
The stimulus message sending module 110 is configured to send a stimulus message to the switch apparatus in response to a user operation, so that the switch apparatus sends the received stimulus message to a target GPP, where the stimulus message includes a destination address of the target GPP. That is, the step S100 may be performed by the stimulus message transmission module 110.
The response message receiving module 120 is configured to receive a response message acquired by the switch apparatus from the target GPP, where the response message is generated by the target GPP according to the stimulus message. That is, the step S200 may be performed by the response message receiving module 120.
The determining module 130 is configured to determine whether the response message is the same as the excitation message, and if so, determine that the target GPP function is complete. That is, the step S300 may be performed by the determining module 130.
Specifically, the excitation message sending module 110 includes an excitation message generating sub-module 111, an excitation message encapsulating sub-module 112, and an excitation message converting sub-module 113.
The stimulus message generation sub-module 111 is configured to generate a stimulus message corresponding to a user operation in response to the user operation. That is, the step S110 may be performed by the stimulus message generation sub-module 111.
The stimulus message encapsulation sub-module 112 is configured to encapsulate the stimulus message into an FC frame. That is, the step S120 may be performed by the stimulus message encapsulation sub-module 112.
The excitation message conversion sub-module 113 is configured to convert the excitation message encapsulated as the FC frame from an electrical signal to an optical signal and send the optical signal to the switching apparatus. That is, the step S130 may be performed by the excitation message conversion sub-module 113.
Further, the test terminal stores a plurality of test processing logics therein, and the stimulus message generation sub-module 111 includes a logic program search unit 1111 and a stimulus message generation unit 1112.
The logic program searching unit 1111 is configured to search, in response to a user operation, a test processing logic corresponding to the user operation. That is, the step S111 may be performed by the logic program lookup unit 1111.
The stimulus message generation unit 1112 is configured to generate a stimulus message according to the test processing logic. That is, the step S112 may be performed by the excitation message generation unit 1112.
The testing apparatus 100 according to this embodiment further includes a response message conversion module 140 and a response message decapsulation module 150.
The response message conversion module 140 is configured to convert the response message from an optical signal to an electrical signal. That is, the step S140 may be performed by the response message conversion module 140.
The response message decapsulation module 150 is configured to decapsulate the response message in the FC frame format. That is, the step S150 may be performed by the response message decapsulation module 150.
The embodiment of the present invention further provides a testing system, where the testing system includes an exchange device, multiple GPPs of an ICP, and the testing device 100, where:
the switch device is configured to receive an excitation message sent by the test device 100, and send the excitation message to a target GPP, and the switch device is further configured to receive a response message sent by the target GPP and generated according to the excitation message, and send the response message to the test device. Optionally, the switching device may further provide a bridge for detecting mutual communication between GPPs.
The target GPP is used for receiving the excitation message, generating a response message corresponding to the excitation message according to the excitation message, and sending the response message to a switching device.
The testing device is used for sending an excitation message and receiving a response message sent by the exchange device, judging whether the response message is the same as the excitation message or not, if so, judging that the function of the target general processing module is complete, generating another excitation message to test another general processing module, and if not, stopping the test.
In this embodiment, the switch device includes a first messaging port, a second messaging port, and a path identification module, where the second messaging port includes a plurality of ports, and the second messaging port corresponds to the GPP in a one-to-one manner.
The first messaging port is configured to receive a stimulus message sent by the testing apparatus 100, and is further configured to send a response message generated according to the stimulus message to the testing apparatus 100.
The plurality of second messaging ports are used for sending the excitation message received by the first messaging port to the GPP corresponding to the first messaging port, and the plurality of second messaging ports are also used for receiving a response message generated according to the excitation message.
And the path identification module is used for enabling the excitation message to be sent to a second message receiving and sending port corresponding to the target GPP according to the target GPP destination address contained in the excitation message.
In particular toThe path identification module includes the configuration table for configuring the message path. For convenience of description, the first messaging port of the switch is defined as a, and the second messaging port is defined as B1、B2……BnThe GPP includes GPP1、GPP2……GPPnIn the GPP1Has an address of C1,GPP2Has an address of C2,GPPnHas an address of Cn,. Address C1And a second messaging port B1Corresponds to, address C2And a second messaging port B2Corresponds to, address CnAnd a second messaging port BnAnd (7) corresponding. With the above arrangement, after the excitation message is received from the port a, the destination address of the excitation message is extracted, and the second transceiving port with the destination address can be determined according to the configuration table, for example, when the destination address of the received excitation message is the address C2Then the excitation message is sent from the second port B2And (4) sending out.
In summary, in the testing method, the testing device, and the testing system provided in the embodiments of the present invention, the switching device sends an excitation message to a target GPP, receives a response message obtained by the switching device from the target GPP, determines whether the response message is the same as the excitation message, determines that the target GPP has a complete function if the response message is the same as the excitation message, generates another excitation message to test another GPP, and stops testing if the response message is not the same as the excitation message, so that a plurality of GPPs can be tested by using one testing terminal 10, thereby reducing the testing cost and reducing the testing complexity.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus, method and system can be implemented in other ways. The apparatus embodiments described above are merely illustrative and, for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (8)

1. A test method applied to a test terminal capable of communicating with an integrated core processor through a switching device, the integrated core processor including a plurality of general purpose processing modules, the test method comprising:
responding to user operation to send an excitation message to the exchange device, and enabling the exchange device to send the received excitation message to a target general processing module, wherein the excitation message comprises a destination address of the target general processing module;
receiving a response message acquired by the switching device from the target general processing module, wherein the response message is generated by the target general processing module according to the excitation message;
judging whether the response message is the same as the excitation message or not, if so, judging that the target general processing module has complete functions, generating another excitation message to test another general processing module, and if not, stopping the test;
the step of sending a stimulus message to the switching device in response to a user action includes:
responding to user operation, and generating an excitation message corresponding to the user operation;
encapsulating the stimulus message as an FC frame;
and converting the excitation message encapsulated into the FC frame from an electric signal into an optical signal and sending the optical signal to the switching device.
2. The test method according to claim 1, wherein the test terminal stores therein a plurality of test processing logics, and the step of generating an incentive message corresponding to the user operation in response to the user operation comprises:
responding to user operation, and searching a test processing logic corresponding to the user operation;
and generating an excitation message according to the test processing logic.
3. The method according to claim 1, wherein after the step of the receiving switch device obtaining the response message from the target generic processing module, the step of determining whether the response message is the same as the stimulus message, if so, determining that the target generic processing module is functionally complete, generating another stimulus message to test another generic processing module, and if not, before the step of stopping the test, the method further comprises:
converting the response message from an optical signal to an electrical signal;
and de-encapsulating the response message in the FC frame format.
4. A testing device is characterized in that the testing device is applied to a testing terminal which can communicate with an integrated core processor through a switching device, the integrated core processor comprises a plurality of general processing modules, and the testing device comprises an excitation message sending module, a response message receiving module and a judging module;
the excitation message sending module is used for responding to user operation and sending an excitation message to the exchange device, so that the exchange device sends the received excitation message to the target general processing module, and the excitation message comprises a destination address of the target general processing module;
the response message receiving module is used for receiving a response message acquired by the switching device from the target general processing module, and the response message is generated by the target general processing module according to the excitation message;
the judging module is used for judging whether the response message is the same as the excitation message or not, and if so, judging that the target general processing module has complete functions;
the excitation message sending module comprises an excitation message generating sub-module, an excitation message packaging sub-module and an excitation message converting sub-module;
the excitation message generation submodule is used for responding to user operation and generating an excitation message corresponding to the user operation;
the excitation message encapsulation submodule is used for encapsulating the excitation message into an FC frame;
the excitation message conversion sub-module is used for converting the excitation message encapsulated into the FC frame from an electric signal into an optical signal and sending the optical signal to the switching device.
5. The test device according to claim 4, wherein a plurality of test processing logics are stored in the test terminal, and the excitation message generation submodule comprises a logic program search unit and an excitation message generation unit;
the logic program searching unit is used for responding to user operation and searching the test processing logic corresponding to the user operation;
the excitation message generating unit is used for generating an excitation message according to the test processing logic.
6. The test device of claim 4, further comprising a response message conversion module and a response message decapsulation module;
the response message conversion module is used for converting the response message from an optical signal into an electrical signal;
and the response message decapsulation module is used for decapsulating the response message in the FC frame format.
7. A test system comprising a switching device, a plurality of general purpose processing modules of an integrated core processor, and a test apparatus according to any one of claims 4 to 6, wherein:
the switching device is used for receiving the excitation message sent by the testing device and sending the excitation message to a target general processing module, and the switching device is also used for receiving a response message which is sent by the target general processing module and generated according to the excitation message and sending the response message to the testing device;
the target general processing module is used for receiving the excitation message, generating a response message corresponding to the excitation message according to the excitation message, and sending the response message to the exchange device;
the testing device is used for sending an excitation message and receiving a response message sent by the exchange device, judging whether the response message is the same as the excitation message or not, if so, judging that the function of the target general processing module is complete, generating another excitation message to test another general processing module, and if not, stopping the test.
8. The test system of claim 7, wherein the switch device comprises a first messaging port, a second messaging port and a path identification module, the second messaging port comprises a plurality of ports, and the second messaging port corresponds to the general processing module one by one;
the first message receiving and sending port is used for receiving an excitation message sent by the testing device, and the first message receiving and sending port is also used for sending a response message generated according to the excitation message to the testing device;
the plurality of second messaging ports are used for sending the excitation message received by the first messaging port to the corresponding general processing module, and the plurality of second messaging ports are also used for receiving a response message generated according to the excitation message;
and the path identification module is used for enabling the excitation message to be sent to a second message receiving and sending port corresponding to the target general processing module according to the destination address of the target general processing module contained in the excitation message.
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