CN106788569A - A kind of WLAN RF transceiver circuit chip - Google Patents
A kind of WLAN RF transceiver circuit chip Download PDFInfo
- Publication number
- CN106788569A CN106788569A CN201710107178.XA CN201710107178A CN106788569A CN 106788569 A CN106788569 A CN 106788569A CN 201710107178 A CN201710107178 A CN 201710107178A CN 106788569 A CN106788569 A CN 106788569A
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- circuit
- frequency
- mixer
- signal
- analog
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Abstract
The present invention provides a kind of WLAN RF transceiver circuit chip, when the invention performs less radio-frequency receive capabilities, the radiofrequency signal that protocol of wireless local area network specifies is flowed into from antenna and is demodulated by sending into the digital baseband of outside after receiver amplification, mixing, power amplification, filtering after being processed by analog-digital converter ADC.When the present invention performs wireless radio transmission function, turn into radiofrequency signal after being converted to analog signal and be filtered by radio frequency transmitter of the invention by digital analog converter DAC, amplified, be mixed by the data signal of digital baseband transmission, and after being amplified by external power amplifier PA, launched by antenna.The present invention can be effectively to WLAN radiofrequency signal receive and dispatch.
Description
Technical field
The present invention relates to integrated circuit fields, more particularly, to a kind of WLAN RF transceiver circuit chip.
Background technology
Current wireless communication technology fast development, wherein wireless local area network technology are even more important and cease manner of breathing with daily life
Close.It is advantageous that with high speed rates, and any occasion can be applied generally under short distance, can be by hand-held intelligent terminal
Freed from the constraint of cable network, with revolutionary meaning.What is more important, WLAN has following spy
Point：Strong mobility, as long as keeping connection by signal is covered, and nothing should be noted specific direction；Configuration is simple, is normally applied field
Under scape, user is attached by only needing input password；Networking mode flexibly, can carry out complex network with cable network, be formed
The infrastructure network of very high capacity.
The agreement that current wireless Local Area Network network is used is the agreements of IEEE 802.11 group, wherein obtaining most widely used
IEEE 802.11b agreements use 2.4GHz as carrier wave frequency range, and compensation coded modulation CCK is modulated.In high speed data transfer
, it is necessary to reach the design objects such as high sensitivity, high linearity, low error rate on the premise of rate, thus radio frequency transceiver design
With certain challenge.
Conventional RF IC is developed usually using GaAs techniques and manufactures to obtain high-frequency work point and low noise
Characteristic, but GaAs techniques are faced with and cannot carry out the inferior positions such as integrated, area and power consumption are larger, cost is high with digital circuit.Together
When, with the development of CMOS integrated circuit technologies, on-chip inductor availability is greatly improved, so that being based on CMOS technology
Full integrated chip RF transceiver circuitry be implemented as possibility, whole WLAN transceiving chip may alternatively be integrated within single-chip
In, i.e. SOC is realized.Direct medium and connect that radio frequency transceiver is changed as data from the radio wave in space to data signal
Mouthful, its performance and integrated level are most important for whole data transmission system for wireless local area network.However, due to radio circuit work
Under extremely high frequency, signal changes from the electronics liquid form of two dimension to three-dimensional electromagnetic wave mode of propagation, and in circuit
High-frequency element influenceed even more serious by noise jamming and ghost effect, therefore, radio frequency transceiver is designed to key point
And difficult point.
The content of the invention
The present invention provides a kind of WLAN RF transceiver circuit chip, and the chip can be effectively to WLAN
Radiofrequency signal received and dispatched.
In order to reach above-mentioned technique effect, technical scheme is as follows：
A kind of WLAN RF transceiver circuit chip, including receiving circuit RX, radiating circuit TX, digital control mould
Block CTL and local frequency generator FS；
The receiving circuit RX includes that low noise amplifier LNA, some frequency mixer Mixer, some first variable gains are amplified
If device VGA1, some low pass filter LPF, some second variable gain amplifier VGA2, some high-speed buffer Buffer and
It is dry analog-digital converter ADC, the frequency mixer Mixer, the first variable gain amplifier VGA1, low pass filter LPF, second variable
Gain amplifier VGA2, high-speed buffer Buffer and analog-digital converter ADC are sequentially connected with into signal all the way and flow to circuit, some
Frequency mixer Mixer, some first variable gain amplifier VGA1, some low pass filter LPF, some second variable gains are amplified
It is every to believe all the way if device VGA2, some high-speed buffer Buffer and some analog-digital converter ADC constitute main line signal stream to circuit
The input of number frequency mixer Mixer for flowing to circuit is connected with the output end of low noise amplifier LNA, per signal stream all the way to circuit
The output end of analog-digital converter ADC be connected to digital baseband outside the circuit chip；Every signal stream all the way is to circuit
The input of frequency mixer Mixer is also connected with local frequency generator FS；Digital control module CTL and receiving circuit RX's is all
Device is connected；It is described to be connected with a compensation DAC module per the output end of frequency mixer Mixer of the signal stream to circuit all the way；
Radiating circuit TX includes some analog-digital converter DAC, some variable gain amplifier VGA, some frequency mixer Mixer
With variable gain radio frequency amplifier RFVGA, analog-digital converter DAC, variable gain amplifier VGA, frequency mixer Mixer is sequentially connected with
Circuit, some analog-digital converter DAC, some variable gain amplifier VGA, some frequency mixer Mixer groups are moved towards into signal all the way
If moving towards circuit into main line signal, moved towards per signal all the way outside the input and the circuit chip of the analog-digital converter DAC of circuit
Digital baseband connection, the output end and variable gain radio frequency amplifier of the frequency mixer Mixer of circuit are moved towards per signal all the way
RFVGA is connected；The input of the frequency mixer Mixer that circuit is moved towards per signal all the way also connects with local frequency generator FS
Connect；Digital control module CTL is connected with all devices of radiating circuit TX；The variable gain that circuit is moved towards per signal all the way
The output end of amplifier VGA is connected with a compensation DAC module.
Further, described receiving circuit RX flows to circuit including two paths of signals, respectively by local frequency generator
I roads and Q roads fundamental frequency signal that FS is produced.
Further, radiating circuit TX moves towards circuit including two paths of signals, respectively the I roads by digital baseband generation and Q
Road signal.
Further, the low pass filter LPF in the circuit chip is 5 rank Butterworth LPFs, the low pass
Band a width of 10MHz or 20MHz of wave filter LPF.
Further, the I roads for being produced by local frequency generator FS respectively and Q roads fundamental frequency signal, I roads and Q roadbeds are frequently
The frequency of signal is all 2.4GHz, and phase difference is 90 degree.
Compared with prior art, the beneficial effect of technical solution of the present invention is：
When the present invention performs less radio-frequency receive capabilities, the radiofrequency signal that protocol of wireless local area network specifies is from antenna stream
Enter the number by sending into outside after receiver amplification, mixing, power amplification, filtering after being processed by analog-digital converter ADC
Word base band is demodulated.When the present invention performs wireless radio transmission function, by the data signal of digital baseband transmission by numeral
Analog converter DAC is converted to analog signal and is filtered by radio frequency transmitter of the invention, amplified, be mixed after turn into
Radiofrequency signal, and by external power amplifier PA amplify after, by antenna launch.The present invention can be effectively to WLAN
Radiofrequency signal is received and dispatched.
Brief description of the drawings
Fig. 1 is structure chart of the invention；
Fig. 2 is the schematic diagram of receiving circuit RX of the present invention；
Fig. 3 is the schematic diagram of radiating circuit TX of the present invention；
Fig. 4 is the structure chart of frequency synthesizer FS of the present invention.
Specific embodiment
Accompanying drawing being for illustration only property explanation, it is impossible to be interpreted as the limitation to this patent；
In order to more preferably illustrate the present embodiment, accompanying drawing some parts have omission, zoom in or out, and do not represent actual product
Size；
To those skilled in the art, it can be to understand that some known features and its explanation may be omitted in accompanying drawing
's.
Technical scheme is described further with reference to the accompanying drawings and examples.
Embodiment 1
As Figure 1-3, a kind of WLAN RF transceiver circuit chip, including receiving circuit RX, radiating circuit
TX, digital control module CTL and local frequency generator FS；
The receiving circuit RX includes that low noise amplifier LNA, some frequency mixer Mixer, some first variable gains are amplified
If device VGA1, some low pass filter LPF, some second variable gain amplifier VGA2, some high-speed buffer Buffer and
It is dry analog-digital converter ADC, the frequency mixer Mixer, the first variable gain amplifier VGA1, low pass filter LPF, second variable
Gain amplifier VGA2, high-speed buffer Buffer and analog-digital converter ADC are sequentially connected with into signal all the way and flow to circuit, some
Frequency mixer Mixer, some first variable gain amplifier VGA1, some low pass filter LPF, some second variable gains are amplified
It is every to believe all the way if device VGA2, some high-speed buffer Buffer and some analog-digital converter ADC constitute main line signal stream to circuit
The input of number frequency mixer Mixer for flowing to circuit is connected with the output end of low noise amplifier LNA, per signal stream all the way to circuit
The output end of analog-digital converter ADC be connected to digital baseband outside the circuit chip；Every signal stream all the way is to circuit
The input of frequency mixer Mixer is also connected with local frequency generator FS；Digital control module CTL and receiving circuit RX's is all
Device is connected；It is described to be connected with a compensation DAC module per the output end of frequency mixer Mixer of the signal stream to circuit all the way；
Radiating circuit TX includes some analog-digital converter DAC, some variable gain amplifier VGA, some frequency mixer Mixer
With variable gain radio frequency amplifier RFVGA, analog-digital converter DAC, variable gain amplifier VGA, frequency mixer Mixer is sequentially connected with
Circuit, some analog-digital converter DAC, some variable gain amplifier VGA, some frequency mixer Mixer groups are moved towards into signal all the way
If moving towards circuit into main line signal, moved towards per signal all the way outside the input and the circuit chip of the analog-digital converter DAC of circuit
Digital baseband connection, the output end and variable gain radio frequency amplifier of the frequency mixer Mixer of circuit are moved towards per signal all the way
RFVGA is connected；The input of the frequency mixer Mixer that circuit is moved towards per signal all the way also connects with local frequency generator FS
Connect；Digital control module CTL is connected with all devices of radiating circuit TX；The variable gain that circuit is moved towards per signal all the way
The output end of amplifier VGA is connected with a compensation DAC module.
In the present embodiment, external control command word is sent to chip internal by digital control module CTL by SPI protocol,
And its excess-three radio circuit is controlled.Secondly, the built-in status register of radio circuit, is also transmitted using SPI protocol
To chip exterior, the working condition to this chip is monitored.Digital control module CTL follows SPI protocol, there is SPI_CLK,
Tetra- interfaces of SPI_SS, SPI_MISO and SPI_MOSI.SPI_CLK signals are low-frequency clock, by external control circuit or
FPGA is produced；After SPI_SS drops to low level, SPI transmission starts, and effectively, SPI_MOSI and SPI_MISO are pressed SPI_CLK
According to agreement regulation, the task of control command word reception and Stateful Inspection data is activation is performed respectively.SPI_MOSI is in several SPI
It is continuous in a serial fashion in clock cycle to receive command word and send into the inside name register group ANABITS of this chip.Life
The width of name register group ANABITS is defined by accommodating all control command words.
Video receiver in the present invention uses zero-intermediate-frequency architecture.Local frequency LO of zero intermediate frequency radio-frequency transmitter etc.
In carrier frequency RF, i.e. medium-frequency IF be zero.RF signals amplify Direct Conversion road baseband signal by LNA, and LPF is used to select useful letter
Road.Zero-if architecture has many advantages：Simple structure, it is easy to integrated, without image frequency interference, it is adaptable to CMOS technology reality
It is existing；But zero-if architecture has many inferior positions in itself：DC deviation (DC offset), 1/f noise interference, the influence of I/Q mismatches etc..
The present invention is solved by technological means to problem above.
DC deviation is caused by self-mixing, is triggered the signal of self-mixing mainly to leak into frequency mixer RF by local oscillator LO and is input into
End, this phenomenon influences maximum to zero intermediate frequency reciver.For zero-if architecture, rear class does not have bandpass filter, useful signal
Also it is distributed across near DC, or even at DC.The LPF and VGA of frequency mixer cascade generally provide maximum circuit gain (usually
20-60dB), direct current signal it is excessive may allow VGA cannot normal work, result is that the signal to noise ratio of signal declines serious, self-mixing
The influence of the DC deviation most serious of initiation is late-class circuit is entered saturation state, and signal cannot be amplified completely.Direct current is inclined
Difference has multiple Mitigation methods.The present invention directly filters DC signals using the method for AC coupled；For the direct current that self-mixing causes
Deviation, is alleviated using harmonic mixing, and the self-mixing that the RF ends that LO leaks into mixer are triggered produces RF outputs, will not produce DC
Signal.
Filtering DC signals can reduce 1/f noise interference, and LNA and frequency mixer provide certain gain can also effectively be suppressed
1/f noise.According to 1/f noise feature, bigger transistor size can also reduce 1/f noise in VGA.In a word to zero intermediate frequency knot
Structure, 1/f noise is present, but is not main problem place.The present invention is effective with increase VGA by increasing LPF wave filters
Transistor size is eliminated to 1/f noise.
Component mismatch can cause two quadrature branch to mismatch, and it is I/Q mismatches to produce distortion.I/Q mismatches can be using numeral
Method is compensated.As shown in Figures 2 and 3, the present invention in receiving circuit and radiating circuit by adding two extra DAC respectively
The imbalance of IQ two-way is compensated, and the relevant parameter of DAC is controlled by CTL modules.
As shown in figure 4, frequency synthesizer FS includes phase frequency detector PFD, charge pump CP, low pass filter LPF, it is voltage-controlled to shake
Swing device VCO and integer frequency divider Divider.The effect of frequency synthesizer FS is to produce the high-quality clock of 4.8GHz and connect
To receives link RX and transmitting chain TX, the fundamental frequency signal of 2.4GHz is produced to be used as mixing after two divided-frequency is performed respectively.
When the present invention performs receive capabilities, RF signals enter into after video receiver RX carried out by LNA first it is low
Make an uproar amplification.LNA is substantially a frequency-selective amplifier, and it provides sufficiently large gain to suppress late-class circuit in special frequency channel
Noise.As a rule the noise of Mixer is general in more than 10dB, and the noise of the whole receives link of protocol requirement 10dB with
Under, so Mixer must be added to the sufficiently low amplifier of noise to suppress noise, LNA is for meeting this amplification demand.Specifically
For LNA mainly complete two functions：Appropriate gain is provided in working frequency range, front stage circuits impedance is matched.In working frequency range
Appropriate gain is provided and shows as input resistant matching in working frequency range and the usual resonance of output in working frequency range.
The effect of frequency mixer Mixer is exactly frequency conversion, and signal is moved required frequency range, that is, output will produce new frequency
Rate component.If system be time-varying or it is nonlinear can productive frequency component, Mixer is regarded as time-varying system
System.Usual Mixer is switched over either to voltage or to electric current, so as to produce required frequency component.Its mathematics in frequency domain
It is expressed as：Input signal and 0 or 1 signal multiplication, the Fourier space of signal of cycle 0 or 1 is：
Input just can obtain required frequency spectrum with LO after frequency domain is multiplied.The present invention is mixed using the gilbert of fully differential structure
Frequency device carries out upconversion operation to the frequency.The conversion gain of the frequency mixer in receiver is 10dB, and introduces extra by DAC
Offset voltage carry out the offset voltage of compensation link.The control command word of CTL is controlled to the offset voltage of DAC.
The purpose of design of VGA is to provide gain on the premise of ensureing the linearity to amplify.VGA belongs to low-frequency channel, the present invention
Using regulation Source degeneration common-source amplifier, circuit gain, structure just can easily be changed by the feedback resistance for adjusting circuit
It is relatively easy and meet design requirement.The present invention, by changing the value that feedback resistance is accessed, is realized by CTL Access Controls position
Different gains.
The design is alleviated using 5 rank Butterworth LPF and disturbed outside channel.By cascading 1 rank LPF and 22 rank LPF realities
Existing 5 rank LPF.LPF realizes Bandwidth adjustment and tuning, each tunable capacitor based on the realization of multi partitioning structure by adjusting electric capacity
Structure it is identical.Band a width of 10MHz or 20MHz of LPF.
The main purpose for setting buffer Buffer is the output impedance for reducing receiver, so as to drive late-class circuit.
The output impedance of Buffer is 50 ohm, common mode output level Vout,cm=0.6V.
The offset voltage of receives link is generally than larger, if offset voltage is not calibrated circuit and cannot be worked in theory, because
This introduces mistuning calibration function DAC and I roads and Q roads is adjusted.The operation principle of calibration is the injection low current toward late-class circuit,
Outside introduces the offset voltage offset voltage intrinsic so as to balance out circuit.CTL control modules are connected to DAC and it are controlled
System, can set the generating positive and negative voltage adjustment of stepping to I roads and Q roads respectively.
As shown in figure 3, radio frequency sending set includes low pass filter LPF, variable gain radio frequency amplifier RFVGA, variable increasing
Beneficial amplifier VGA, frequency mixer Mixer.Emitter uses Direct conversion structure, it is necessary to a work 2*FLOLocal oscillation signal,
Introducing DAC is used to compensate the local oscillator leakage that offset voltage causes.By SPI mouthfuls of adjustment with upper module.
When the present invention performs emission function, brewed baseband signal is in digital form from digital baseband by numeral
Analog converter DAC carries out being converted into analog signal, and is sent in radio frequency transmitter signal TX.Baseband signal first by
LPF is filtered, and obtains the analog signal of high s/n ratio by variable gain amplifier VGA afterwards, and frequency mixer is sent into afterwards to be carried out
Frequency conversion.Wherein the structure of low pass filter is identical with the structure of low pass filter in receiver, it is possible to realize tuning.
Up-conversion mixer used by emitter is gilbert's mixing structure.The conversion gain 0dB of the frequency mixer.Mixing
The rearmounted adder of device is integrated in this frequency mixer.According to relative theory analysis, the offset voltage of transmitting chain causes local oscillator leakage.
It is similar with receives link, extra offset voltage is introduced come the offset voltage of compensation link by DAC.
The input impedance of the outer power amplifier of piece is generally 50 ohm, and variable gain radio frequency amplifier RFVGA of the present invention drives this to hinder
It is anti-.RFVGA needs external world RFC to the biasing of power supply.RFVGA is connected to CTL control units, and gain adjustable to control transmitting
Power.The output signal of RFVGA is connected to the external PA power amplifiers outside the present invention, and is launched by antenna.
The same or analogous part of same or analogous label correspondence；
Position relationship for the explanation of being for illustration only property described in accompanying drawing, it is impossible to be interpreted as the limitation to this patent；
Obviously, the above embodiment of the present invention is only intended to clearly illustrate example of the present invention, and is not right
The restriction of embodiments of the present invention.For those of ordinary skill in the field, may be used also on the basis of the above description
To make other changes in different forms.There is no need and unable to be exhaustive to all of implementation method.It is all this
Any modification, equivalent and improvement made within the spirit and principle of invention etc., should be included in the claims in the present invention
Protection domain within.
Claims (5)
1. a kind of WLAN RF transceiver circuit chip, it is characterised in that including receiving circuit RX, radiating circuit TX,
Digital control module CTL and local frequency generator FS；
The receiving circuit RX includes low noise amplifier LNA, some frequency mixer Mixer, some first variable gain amplifiers
VGA1, some low pass filter LPF, some second variable gain amplifier VGA2, some high-speed buffer Buffer and some
Analog-digital converter ADC, the frequency mixer Mixer, the first variable gain amplifier VGA1, low pass filter LPF, the second variable increasing
Beneficial amplifier VGA2, high-speed buffer Buffer and analog-digital converter ADC are sequentially connected with into signal all the way and flow to circuit, if dry-mixed
Frequency device Mixer, some first variable gain amplifier VGA1, some low pass filter LPF, some second variable gain amplifiers
If VGA2, some high-speed buffer Buffer and some analog-digital converter ADC constitute main line signal stream to circuit, per signal all the way
The input for flowing to the frequency mixer Mixer of circuit is connected with the output end of low noise amplifier LNA, per signal stream all the way to circuit
The output end of analog-digital converter ADC is connected to the digital baseband outside the circuit chip；The mixing to circuit per signal stream all the way
The input of frequency device Mixer is also connected with local frequency generator FS；All devices of digital control module CTL and receiving circuit RX
Part is connected；It is described to be connected with a compensation DAC module per the output end of frequency mixer Mixer of the signal stream to circuit all the way；
Radiating circuit TX includes some analog-digital converter DAC, some variable gain amplifier VGA, some frequency mixer Mixer and can
Variable-gain radio frequency amplifier RFVGA, analog-digital converter DAC, variable gain amplifier VGA, frequency mixer Mixer are sequentially connected with into one
Road signal moves towards circuit, some analog-digital converter DAC, some variable gain amplifier VGA, if some frequency mixer Mixer are constituted
Main line signal moves towards circuit, and the number outside the input and the circuit chip of the analog-digital converter DAC of circuit is moved towards per signal all the way
Word Base Band is connected, and the output end and variable gain radio frequency amplifier RFVGA of the frequency mixer Mixer of circuit are moved towards per signal all the way
Connection；The input per the frequency mixer Mixer that signal moves towards circuit all the way is also connected with local frequency generator FS；Numeral
Control module CTL is connected with all devices of radiating circuit TX；The variable gain amplifier that circuit is moved towards per signal all the way
The output end of VGA is connected with a compensation DAC module.
2. WLAN RF transceiver circuit chip according to claim 1, it is characterised in that described reception electricity
Road RX flows to circuit including two paths of signals, respectively the I roads by local frequency generator FS generations and Q roads fundamental frequency signal.
3. WLAN RF transceiver circuit chip according to claim 2, it is characterised in that radiating circuit TX bags
Include two paths of signals and move towards circuit, respectively the I roads by digital baseband generation and Q roads signal.
4. the WLAN RF transceiver circuit chip according to claim any one of 1-3, it is characterised in that the electricity
Low pass filter LPF in the chip of road is 5 rank Butterworth LPFs, a width of 10MHz of band of the low pass filter LPF
Or 20MHz.
5. WLAN RF transceiver circuit chip according to claim 2, it is characterised in that respectively by local oscillator
The frequency of I roads and Q roads fundamental frequency signal that frequency generator FS is produced, I roads and Q roads fundamental frequency signal is all 2.4GHz, and phase difference is
90 degree.
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| CN201710107178.XA CN106788569A (en) | 2017-02-27 | 2017-02-27 | A kind of WLAN RF transceiver circuit chip |
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| CN201710107178.XA CN106788569A (en) | 2017-02-27 | 2017-02-27 | A kind of WLAN RF transceiver circuit chip |
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| CN108848570A (en) * | 2018-06-19 | 2018-11-20 | Oppo广东移动通信有限公司 | Mobile terminal, data transmission method and related product |
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| CN111835367B (en) * | 2019-04-11 | 2022-04-22 | 华为技术有限公司 | Signal processing chip and communication device |
| US11955996B2 (en) | 2019-04-11 | 2024-04-09 | Huawei Technologies Co., Ltd. | Signal processing chip and communications device |
| CN115276681A (en) * | 2022-07-27 | 2022-11-01 | 东集技术股份有限公司 | RFID reader-writer system, transmission power closed-loop control method and main controller |
| CN115276681B (en) * | 2022-07-27 | 2023-11-24 | 东集技术股份有限公司 | RFID reader-writer system, transmitting power closed-loop control method and main controller |
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