CN106783535A - The method and semiconductor structure of a kind of improvement PETEOS film defects - Google Patents
The method and semiconductor structure of a kind of improvement PETEOS film defects Download PDFInfo
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- CN106783535A CN106783535A CN201611063548.6A CN201611063548A CN106783535A CN 106783535 A CN106783535 A CN 106783535A CN 201611063548 A CN201611063548 A CN 201611063548A CN 106783535 A CN106783535 A CN 106783535A
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- peteos
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- reacting gas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02359—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the surface groups of the insulating layer
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
Abstract
The present invention be more particularly directed to the method and semiconductor structure of a kind of improvement PETEOS film defects.The method of the improvement PETEOS film defects is comprised the following steps：Step 1, deposits form PETEOS films on a semiconductor substrate；Step 2, to being passed through the first reacting gas and the second reacting gas in the processing chamber where the Semiconductor substrate, mixed gas to the first reacting gas and the second reacting gas excite forming plasma, and corona treatment is carried out to the upper surface of PETEOS films using the plasma；First reacting gas is oxidizing gas, and second reacting gas is inert gas or nitrogen.Film surface activity can be increased by the method for the present invention, film surface hydrogen bond content is effectively reduced, so as to improve film surface hillock defect, the technical requirements of existing double exposure technique are met.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacture field, more particularly to a kind of method of improvement PETEOS film defects
And semiconductor structure.
Background technology
In recent years, using TEOS (tetraethyl orthosilicate) and oxygen as raw material, using PECVD (plasma enhanced chemical gas
Mutually deposit) deposition PETEOS (plasma enhancing tetraethoxysilance) film technology it is more next in semiconductor integrated circuit technique
More it is taken seriously.It is exactly good step coverage for one of advantage of raw material growth PETEOS films to use TEOS and oxygen, because of it
The mobility on TEOS surfaces is big, can avoid the generation in density regions or cavity.Another advantage of PETEOS techniques be due to
Activated with plasma, the temperature reduction of deposition film, therefore be widely used on the layer metal interconnection of semiconductor devices.Half
Conductor device autoregistration double exposure process integration technology can realize the exposure figure less than litho machine dimension limit, bottom
PETEOS dielectric film quality plays a decisive role to the method.The PETEOS dielectric films quality of bottom is good, in the life of its surface
Other dielectric film quality long are all right.
But there is more hillock defect, the particle diameter of hillock and a number in the PETEOS film surfaces of existing technology growth
Cause other dielectric thin film layer degradations in the growth of PETEOS film surfaces, so as to cause other dielectric film surface quality
The requirement of existing double-exposure technique process node cannot be met.Therefore a kind of few PETEOS of surface hillock defect how is obtained
Film, and meet existing double exposure process specifications and just seem very necessary.
The content of the invention
The invention provides the method and semiconductor structure of a kind of improvement PETEOS film defects, solve above-described
Technical problem.
The technical scheme that the present invention solves above-mentioned technical problem is as follows：A kind of method of improvement PETEOS film defects, bag
Include following steps:
Step 1, deposits form PETEOS films on a semiconductor substrate；
Step 2, to being passed through the first reacting gas and the second reacting gas in the processing chamber where the Semiconductor substrate,
Mixed gas to the first reacting gas and the second reacting gas excite forming plasma, using the plasma pair
The upper surface of PETEOS films carries out corona treatment；First reacting gas is oxidizing gas, second reaction
Gas is inert gas or nitrogen.
The beneficial effects of the invention are as follows：Technical scheme by PETEOS films away from the Semiconductor substrate
Surface carry out corona treatment, can increase film surface activity, effectively reduce film surface hydrogen bond content, so as to improve thin
Film surface hillock defect, meets existing double exposure technology node requirements.
On the basis of above-mentioned technical proposal, the present invention can also do following improvement.
Further, first reacting gas is oxygen or ozone.
Using the beneficial effect of above-mentioned further scheme：First reacting gas of this further technical scheme using oxygen or
Person's ozone, can produce oxygen plasma, can increase PETEOS film surfaces activity, and the hydrogen bond for reducing PETEOS film surfaces contains
Amount, so as to improve PETEOS film surface hillock defects.
Further, second reacting gas is any one or multiple combination of nitrogen, helium and argon gas.
Using the beneficial effect of above-mentioned further scheme：This further technical scheme appointing using nitrogen, helium and argon gas
One or more combinations anticipate as the second reacting gas, plasma is controlled by controlling the flow of the second reacting gas
Intensity and scope, and pressure in cavity is adjusted, reach the hillock defect purpose of removal PETEOS film surfaces.
Further, in step 2, process cavity room pressure scope is 1torr~15torr, and radio frequency source penetrates in processing chamber
Frequency power bracket is 200W~1000W, and process cavity indoor temperature range is 200 DEG C~600 DEG C, the flow model of the first reacting gas
It is 100sccm~12000sccm to enclose, and the range of flow of the second reacting gas is 100sccm~10000sccm, at plasma
The process time scope of reason is 2s~20s.
Beneficial effect using above-mentioned further scheme is：In this further technical scheme, first reacting gas is
Oxygen or ozone, second reacting gas are any one or multiple combination of nitrogen, helium and argon gas, the technique
Cavity indoor pressure scope is 1torr~15torr, such as 3torr, 5torr, 7torr, 10torr or 12torr etc.；Processing chamber
The radio frequency power range of middle radio frequency source be 200W~1000W, for example, radio-frequency power be 100W, 200W, 350W, 500W, 790W or
Person 850W etc.；Process cavity indoor temperature range is 200 DEG C~600 DEG C, and such as cavity temperature is 300 DEG C, 400 DEG C or 500 DEG C etc.；
The range of flow of first reacting gas be 100sccm~12000sccm, such as 1000sccm, 3000sccm,
6000sccm, 8000sccm etc.；The range of flow of second reacting gas is 100sccm~10000sccm, such as
1000sccm, 3000sccm, 6000sccm or 8000sccm；The process time of the corona treatment is 2s~20s, for example
Process time is 3s, 5s, 8s or 15s etc..Using above-mentioned technological parameter, can further reduce PETEOS film surface hydrogen bonds and contain
Amount, makes PETEOS film surface hillock defects less.
Further, when the first reacting gas is oxygen, the range of flow of oxygen is 1000sccm~6000sccm.
Further, when the second reacting gas is helium, the range of flow of helium is 1000sccm~5000sccm.
Further, process cavity room pressure scope is 3torr~10torr, the radio frequency power range of radio frequency source for 500W~
1000W, process cavity indoor temperature range is 300 DEG C~500 DEG C, and the process time scope of corona treatment is 2s~8s.
Beneficial effect using above-mentioned further scheme is：Suitable technological parameter is selected in this further technical scheme,
The too high metallization caused in Semiconductor substrate of temperature can be not only avoided to degenerate, and it is new to prevent overlong time from producing
Surface defect, further ensures the speed and effect of removal PETEOS film surface hillocks.
In order to solve technical problem of the invention, a kind of semiconductor structure, including Semiconductor substrate and deposition are additionally provided
PETEOS films on the semiconductor substrate, the PETEOS films are the method system of the improvement PETEOS film defects
Standby PETEOS films.
Present invention also offers a kind of semiconductor structure, the semiconductor structure is used in semiconductor memory chip, and
For core memory or read-write buffering.
The beneficial effects of the invention are as follows：Semiconductor memory chip is mainly divided into three regions according to function, respectively：Outward
Portion circuit control zone (referred to as Peripheral ciruitry), read-write cache area (referred to as page buffer) and core are deposited
Storage area (referred to as core array), page buffer areas and core array areas are higher to the requirement of PETEOS film qualities,
PETEOS film surface defects can cause storage chip to fail too much, and the present invention is in the page buffer areas and core
Array areas use plasma treated PETEOS films, reduce surface hillock defect, meet core array areas
And/or page buffer areas are to the quality requirement of PETEOS films.
Brief description of the drawings
Fig. 1 is a kind of method flow schematic diagram of improvement PETEOS film defects of the present invention；
Fig. 2 is a kind of structural representation of semiconductor structure of the invention.
Specific embodiment
Principle of the invention and feature are described below in conjunction with accompanying drawing, example is served only for explaining the present invention, and
It is non-for limiting the scope of the present invention.
As shown in figure 1, be a kind of method flow schematic diagram of improvement PETEOS film defects of the present invention, including following step
Suddenly:
Step 1, deposits form PETEOS films on a semiconductor substrate；
Step 2, to being passed through the first reacting gas and the second reacting gas in the processing chamber where the Semiconductor substrate,
Mixed gas to the first reacting gas and the second reacting gas excite forming plasma, using the plasma pair
The upper surface of PETEOS films carries out corona treatment；First reacting gas is oxidizing gas, second reaction
Gas is inert gas or nitrogen.The present invention is carried out at plasma in PETEOS films away from the surface of the Semiconductor substrate
Reason, can increase film surface activity, effectively reduce film surface hydrogen bond content, so as to improve film surface hillock defect, meet
Existing double exposure technology node requirements.
In specific embodiment, first using the conventional method of the art, such as plasma enhanced chemical gas phase is sunk
Area method (PECVD) is deposited form PETEOS films on a semiconductor substrate, and the specific deposition step present invention is not carried out in detail herein
Describe in detail bright.The technical process of step 2 is specifically described below by way of specific embodiment.
Embodiment 1
In the step of the present embodiment 2, to being passed through the mixed of oxygen and helium in the processing chamber where the Semiconductor substrate
Gas is closed, the flow of oxygen is 4200sccm, and the flow of helium is 4000sccm, and process cavity room pressure is 5torr, process cavity
The radio-frequency power of radio frequency source is 790W in room, and process cavity indoor temperature is 400 DEG C, after plasma-treated 5s, completes step 2
Plasma treatment step.
Embodiment 2
In the step of the present embodiment 2, to being passed through the mixed of oxygen and argon gas in the processing chamber where the Semiconductor substrate
Gas is closed, the flow of oxygen is 1000sccm, and the flow of argon gas is 1000sccm, and process cavity room pressure is 3torr, process cavity
The radio-frequency power of radio frequency source is 1000W in room, and process cavity indoor temperature is 500 DEG C, after plasma-treated 8s, completes step
2 plasma treatment step.
Embodiment 3
In the step of the present embodiment 2, to being passed through the mixed of oxygen and nitrogen in the processing chamber where the Semiconductor substrate
Gas is closed, the flow of oxygen is 6000sccm, and the flow of nitrogen is 5000sccm, and process cavity room pressure is 10torr, technique
The radio-frequency power of radio frequency source is 600W in chamber, and process cavity indoor temperature is 300 DEG C, after plasma-treated 2s, completes step
Rapid 2 plasma treatment step.
Embodiment 4
In the step of the present embodiment 2, to being passed through the mixed of ozone and helium in the processing chamber where the Semiconductor substrate
Gas is closed, the flow of ozone is 12000sccm, and the flow of helium is 10000sccm, and process cavity room pressure is 15torr, work
The radio-frequency power of radio frequency source is 790W in skill chamber, and process cavity indoor temperature is 200 DEG C, after plasma-treated 15s, is completed
The plasma treatment step of step 2.
Embodiment 5
In the step of the present embodiment 2, to being passed through ozone and argon gas gas in the processing chamber where the Semiconductor substrate
Mixed gas, the flow of oxygen is 500sccm, and the flow of argon gas is 400sccm, and process cavity room pressure is 5torr, process cavity
The radio-frequency power of radio frequency source is 300W in room, and process cavity indoor temperature is 400 DEG C, after plasma-treated 5s, completes step 2
Plasma treatment step.
In above example, by step 2 to the upper surface of PETEOS films, i.e., PETEOS films are away from the semiconductor
The surface of substrate carries out corona treatment, and the PETEOS films of plasma treatment are not carried out compared with the prior art, increased
The surface-active of PETEOS films, effectively reduces film surface hydrogen bond content, so as to improve film surface hillock defect, meets existing
There are double exposure technology node requirements.
As shown in Fig. 2 be a kind of structural representation of semiconductor structure of the invention, including Semiconductor substrate 1 and it is deposited on
PETEOS films 2 in the Semiconductor substrate 1, the PETEOS films 2 are the above improvement PETEOS film defects
The PETEOS films 2 that method is prepared from.In a preferred embodiment, the semiconductor structure is used in semiconductor storage
In chip, and for core memory or read-write buffering.Semiconductor memory chip is mainly divided into three regions according to function, respectively
For：External circuit control zone (referred to as Peripheral ciruitry), read-write buffering area (referred to as page buffer) and
Core memory area (referred to as core array), page buffer areas and core array areas are to the requirement of PETEOS film qualities
Higher, PETEOS film surface defects can cause storage chip to fail too much, in this further technical scheme, in the page
Buffer areas and core array areas use plasma treated PETEOS films, reduce surface hillock defect, full
The quality requirement of sufficient core array areas and/or page buffer areas to PETEOS films.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all it is of the invention spirit and
Within principle, any modification, equivalent substitution and improvements made etc. should be included within the scope of the present invention.
Claims (9)
1. a kind of method of improvement PETEOS film defects, it is characterised in that comprise the following steps:
Step 1, deposits form PETEOS films on a semiconductor substrate；
Step 2, to the first reacting gas and the second reacting gas is passed through in the processing chamber where the Semiconductor substrate, to
The mixed gas of one reacting gas and the second reacting gas carry out exciting to form plasma, using the plasma pair
The upper surface of PETEOS films carries out corona treatment；First reacting gas is oxidizing gas, second reaction
Gas is inert gas or nitrogen.
2. a kind of method of improvement PETEOS film defects according to claim 1, it is characterised in that first reaction
Gas is oxygen or ozone.
3. a kind of method of improvement PETEOS film defects according to claim 2, it is characterised in that second reaction
Gas is any one or multiple combination of nitrogen, helium and argon gas.
4. according to a kind of method of any described improvement PETEOS film defects of claims 1 to 3, it is characterised in that step 2
In, process cavity room pressure scope be 1torr~15torr, in processing chamber the radio frequency power range of radio frequency source be 200W~
1000W, process cavity indoor temperature range is 200 DEG C~600 DEG C, the range of flow of the first reacting gas for 100sccm~
12000sccm, the range of flow of the second reacting gas is 100sccm~10000sccm, the process time model of corona treatment
It is 2s~20s to enclose.
5. the method for a kind of improvement PETEOS film defects according to claim 4, it is characterised in that when the first reaction gas
When body is oxygen, the range of flow of oxygen is 1000sccm~6000sccm.
6. a kind of method of improvement PETEOS film defects according to claim 5, it is characterised in that when the second reacting gas
During for helium, the range of flow of helium is 1000sccm~5000sccm.
7. a kind of method of improvement PETEOS film defects according to claim 6, it is characterised in that in the processing chamber
Pressure limit is 3torr~10torr, and the radio frequency power range of radio frequency source is 500W~1000W, process cavity indoor temperature range
It it is 300 DEG C~500 DEG C, the process time scope of corona treatment is 2s~8s.
8. a kind of semiconductor structure, it is characterised in that, including Semiconductor substrate and deposition are on the semiconductor substrate
PETEOS films, the PETEOS films are for the method for any improvement PETEOS film defects of claim 1~7 is prepared
Into PETEOS films.
9. semiconductor structure according to claim 8, it is characterised in that the semiconductor structure is used in semiconductor storage
In chip, and for core memory or read-write buffering.
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| CN201611063548.6A CN106783535A (en) | 2016-11-28 | 2016-11-28 | The method and semiconductor structure of a kind of improvement PETEOS film defects |
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| US20070232071A1 (en) * | 2006-03-31 | 2007-10-04 | Applied Materials, Inc. | Method to improve the step coverage and pattern loading for dielectric films |
| CN101454877A (en) * | 2006-05-30 | 2009-06-10 | 应用材料股份有限公司 | Novel deposition-plasma cure cycle process to enhance film quality of silicon dioxide |
| CN101122749A (en) * | 2006-08-10 | 2008-02-13 | 中芯国际集成电路制造(上海)有限公司 | Method of forming photoresist pattern |
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