CN106775593B - Method and device for removing condition judgment statements in circular processing flow and application unit - Google Patents
Method and device for removing condition judgment statements in circular processing flow and application unit Download PDFInfo
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
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- G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
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Abstract
The invention discloses a method and a device for removing condition judgment statements in a circular processing flow and an application unit, wherein the method comprises the following steps: responding to the reading of the condition judgment statement, and acquiring a condition form of a judgment condition in the condition judgment statement; generating a non-judgment execution application unit of the condition judgment statement according to the condition form of the judgment condition; and the non-judgment execution application unit realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation. In addition, the method may further include: and executing the non-judgment execution application unit to obtain an execution result of the condition judgment statement. The invention does not need to execute the judgment condition, realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation, and improves the execution efficiency of the circular processing flow. When the method is applied to the field needing high-speed calculation, the effect of improving the execution efficiency is particularly obvious.
Description
Technical Field
The invention relates to a computer technology, in particular to a method and a device for removing condition judgment statements in a circular processing flow and an application unit.
Background
With the development of computer technology and internet technology, various applications are continuously generated and upgraded, more and more applications are used by users in work, life and entertainment, and the performance and market of the applications are determined by the execution efficiency of the applications. In the running process of various application programs (hereinafter referred to as application programs), some condition judgment is performed more or less, which may cause the application programs to enter a circular processing flow.
In the process of implementing the invention, the inventor discovers through research that:
in the application loop processing flow, the execution efficiency of the application program is seriously affected by the condition judgment statement. For example, on an ARM7 processor, an unconditional jump statement and a jump statement jump successfully, and a pipeline needs to be refilled, so at least 3 cycles are required, as shown in fig. 1, which is a schematic diagram of a loop processing flow when a conditional judgment statement exists. Conversely, most arithmetic and logical operations instructions are single-cycle except for multiplication, and for all conditional instructions, if the condition is not met, the instruction is not executed, and it only takes 1 cycle to skip the instruction.
Disclosure of Invention
The embodiment of the invention aims to solve the technical problem that: the method, the device and the application unit for removing the condition judgment statement in the loop processing flow are provided, so that the execution efficiency of the loop processing flow is improved.
According to an aspect of the embodiments of the present invention, a method for removing a condition judgment statement in a loop processing flow is provided, including:
responding to the reading of the condition judgment statement, and acquiring a condition form of a judgment condition in the condition judgment statement;
generating a non-judgment execution application unit of the condition judgment statement according to the condition form of the judgment condition; and the non-judgment execution application unit realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Optionally, in the foregoing method embodiment, the method further includes:
and executing the non-judgment execution application unit to obtain an execution result of the condition judgment statement.
Optionally, in the foregoing method embodiment, the condition form of the determination condition includes: a is less than b;
the condition judgment statement comprises if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a;
the non-judgment execution application unit includes: c ═ ((Sign (a-b) -1) & (a-b)) + b.
Optionally, in the foregoing method embodiment, executing the non-judgment execution application unit to obtain an execution result of the conditional judgment statement includes:
calculating the result d of the subtraction of a and b as a-b;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a first operation result (Sign (d) -1) & d;
calculating the value ((sign (d) -1) & d) + b) of the addition of the first operation result (sign (d) -1) & d and b;
the value ((sign (d) -1) & d) + b is assigned to c.
Optionally, in the foregoing method embodiment, a value of b is 0.
Optionally, in the foregoing method embodiment, the condition form of the determination condition includes: a is more than b;
the conditional judging statement comprises if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a;
the non-judgment execution application unit includes: c ═ - ((sign (b-a) -1) & (b-a)) + b.
Optionally, in the foregoing method embodiment, executing the non-judgment execution application unit to obtain an execution result of the conditional judgment statement includes:
calculating the result d of the subtraction of b and a as b-a;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result (Sign (d) -1) & d;
calculating a difference b- ((sign (d) -1) and d) between b and the second operation result (sign (d) -1) and d);
and assigning the difference b- ((sign (d) -1) & d) to c.
Optionally, in the foregoing method embodiment, a value of b is 255.
According to another aspect of the embodiments of the present invention, an apparatus for removing a condition judgment statement in a loop processing flow is provided, including:
the system comprises an acquisition unit, a judgment unit and a processing unit, wherein the acquisition unit is used for acquiring the condition form of a judgment condition in a condition judgment statement when the condition judgment statement is read;
a generating unit configured to generate a non-judgment execution application unit of the condition judgment statement according to a condition form of the judgment condition; and the non-judgment execution application unit realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Optionally, in an embodiment of the apparatus, the apparatus further includes:
and the execution unit is used for executing the non-judgment execution application unit and obtaining the execution result of the condition judgment statement.
Optionally, in the foregoing apparatus embodiment, the condition form of the determination condition includes: a is less than b;
the condition judgment statement comprises if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a;
the non-judgment execution application unit includes: c ═ ((Sign (a-b) -1) & (a-b)) + b;
the execution unit is specifically configured to:
calculating the result d of the subtraction of a and b as a-b;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a first operation result (Sign (d) -1) & d;
calculating the value ((sign (d) -1) & d) + b) of the addition of the first operation result (sign (d) -1) & d and b;
the value ((sign (d) -1) & d) + b is assigned to c.
Optionally, in an embodiment of the apparatus, the condition form of the determination condition includes: a is more than b;
the conditional judging statement comprises if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a;
the non-judgment execution application unit includes: c ═ - ((sign (b-a) -1) & (b-a)) + b.
The execution unit is specifically configured to:
calculating the result d of the subtraction of b and a as b-a;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result (Sign (d) -1) & d;
calculating a difference b- ((sign (d) -1) and d) between b and the second operation result (sign (d) -1) and d);
and assigning the difference b- ((sign (d) -1) & d) to c.
According to an aspect of the embodiments of the present invention, an application unit is provided, which includes one or more non-judgment execution application units;
and the non-judgment execution application unit is used for realizing the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Optionally, in the foregoing embodiment of the application unit, the condition determining statement includes if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a, and the non-determination execution application unit includes c ═ ((Sign (a-b) -1) & (a-b)) + b;
or
The condition decision statement includes if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a, and the non-decision execution application unit includes c ═ - ((sign (b-a) -1) & (b-a)) + b.
Based on the method and apparatus for removing the condition judgment statement in the loop processing flow and the application unit provided by the above embodiment of the present invention, when the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement is obtained, and according to the condition form of the judgment condition, the non-judgment execution application unit of the condition judgment statement is correspondingly generated, without executing the judgment condition, the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation, so that the execution efficiency of the loop processing flow is improved. When the embodiment of the invention is applied to the field needing high-speed calculation, the effect of improving the execution efficiency is particularly obvious.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
The invention will be more clearly understood from the following detailed description, taken with reference to the accompanying drawings, in which:
FIG. 1 is a schematic diagram of a loop processing flow when a condition judgment statement exists.
FIG. 2 is a flowchart of a method for removing a conditional statement in a loop processing flow according to an embodiment of the present invention.
FIG. 3 is a flowchart illustrating a method for removing a conditional statement in a loop processing flow according to another embodiment of the present invention.
FIG. 4 is a flowchart illustrating a method for removing a conditional statement in a loop processing flow according to another embodiment of the present invention.
FIG. 5 is a schematic diagram of a loop processing flow according to an embodiment of the invention.
FIG. 6 is a schematic structural diagram of an embodiment of an apparatus for removing a condition determination statement in a loop processing flow according to the present invention.
FIG. 7 is a schematic structural diagram of an apparatus for removing a condition determining statement in a loop processing flow according to another embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Embodiments of the invention are operational with numerous other general purpose or special purpose computing system environments or configurations. Examples of well known computing systems, environments, and/or configurations that may be suitable for use with the computer system/server include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, hand-held or laptop devices, microprocessor-based systems, set top boxes, programmable consumer electronics, network pcs, minicomputer systems, mainframe computer systems, distributed cloud computing environments that include any of the above systems, and the like.
The computer system/server may be described in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules may include routines, programs, objects, components, logic, data structures, etc. that perform particular tasks or implement particular abstract data types. The computer system/server may be practiced in distributed cloud computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be located in both local and remote computer system storage media including memory storage devices.
FIG. 2 is a flowchart of a method for removing a conditional statement in a loop processing flow according to an embodiment of the present invention. As shown in fig. 2, the method for removing the conditional judgment statement in the loop processing flow according to the embodiment includes:
and 102, responding to the reading of the condition judgment statement, and acquiring the condition form of the judgment condition in the condition judgment statement.
104, generating a non-judgment execution application unit of the condition judgment statement according to the condition form of the judgment condition.
The non-judgment execution application unit does not need to execute judgment conditions, and can realize the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Based on the method for removing the condition judgment statement in the loop processing flow provided by the above embodiment of the present invention, when the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement is obtained, and according to the condition form of the judgment condition, the non-judgment execution application unit of the condition judgment statement is correspondingly generated, without executing the judgment condition, the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation, so that the execution efficiency of the loop processing flow is improved. When the embodiment of the invention is applied to the field needing high-speed calculation, the effect of improving the execution efficiency is particularly obvious.
FIG. 3 is a flowchart illustrating a method for removing a conditional statement in a loop processing flow according to another embodiment of the present invention. As shown in fig. 3, compared with the embodiment shown in fig. 2, the method for removing the conditional judgment statement in the loop processing flow further includes, after the above operation 104:
and 106, executing the non-judgment execution application unit to obtain the execution result of the condition judgment statement.
In a specific example of the above method embodiments of the present invention, the condition form of the determination condition is a < b, the condition determination statement is if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a, that is, if the condition a < b is satisfied, the value of c is b, otherwise, if the condition a < b is not satisfied, the value of c is a, including a is greater than or equal to b, and accordingly, in this embodiment, the non-determination execution application unit is c ═ Sign (a-b) -1 & (a-b)) + b.
Corresponding to the above specific example, in operation 106, the non-judgment execution application unit is executed to obtain the execution result of the conditional judgment statement, which may be specifically implemented as follows:
calculate the result of the subtraction of a and b: d is a-b;
obtain the sign bit of d: sign (d);
calculate sign bit for d: the difference Sign (d) to 1, Sign (d) -1;
performing bitwise AND operation on the differences Sign (d) -1 and d to obtain a first operation result: (sign (d) -1) & d;
calculating the value of the sum of the first operation result (sign (d) -1) & d and b: ((sign (d) -1) & d) + b;
the value ((sign (d) -1) & d) + b is assigned to c.
In a specific application of the above specific example, the value of b is 0.
In another specific example of the above method embodiments of the present invention, the condition form of the determination condition is a > b, the condition determination statement is if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a, that is, if the condition a > b is satisfied, the value of c is b, otherwise, if the condition a > b is not satisfied, the value of c is a, including a being less than or equal to b, and accordingly, in this embodiment, the non-determination execution application unit is c ═ - ((sign (b-a) -1) & (b-a)) + b.
Corresponding to the above another specific example, in operation 106, the non-judgment execution application unit is executed to obtain the execution result of the conditional judgment statement, which may be specifically implemented as follows:
calculate the result of the subtraction of b and a: d ═ b-a;
obtain the sign bit of d: sign (d);
calculate the difference between sign bit sign (d) of d and 1: sign (d) -1;
and carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result: (sign (d) -1) & d;
calculating the difference between b and the second operation result (sign (d) -1) & d: b- ((sign (d) -1) & d);
and assigning the difference b- ((sign (d) -1) & d) to c.
In one particular application of the above another particular example, the value of b is 255.
Based on the method for removing the condition judgment statement in the loop processing flow provided by the above embodiment of the present invention, when the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement is obtained, the non-judgment execution application unit of the condition judgment statement is correspondingly generated according to the condition form of the judgment condition, the non-judgment execution application unit is executed, and the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation. The embodiment of the invention removes the condition judgment and directly assigns the value aiming at the condition judgment statement which firstly carries out condition judgment and then assigns the value, thereby improving the execution efficiency of the circular processing flow. When the embodiment of the invention is applied to the field needing high-speed calculation, the effect of improving the execution efficiency is particularly obvious.
The embodiment of the invention can be used for any calculation processing flow, and has obvious effect particularly in image processing, because the data volume of the image processing is large, a 1080p 24-bit color image is processed aiming at three channels of r, g and b, and the calculated data volume can reach more than 600 ten thousand times (1920x1080x 3); the calculation result of each time is limited to be between 0 and 255, so that the processing procedure is used for example
if (x < 0) x is 0; // this else x ═ x; is hidden
if (x > 255) x is 255; ///this else x ═ x; is hidden
By adopting the technical scheme of the embodiments of the invention, the operation speed can be well improved, and especially, the effect of improving the operation speed is more obvious when the image processing is carried out on the embedded board.
FIG. 4 is a flowchart illustrating a method for removing a conditional statement in a loop processing flow according to another embodiment of the present invention. As shown in fig. 4, the method for removing the conditional judgment statement in the loop processing flow according to the embodiment includes:
and 202, responding to the reading of the condition judgment statement, and acquiring whether the condition form of the judgment condition in the condition judgment statement is a < b.
If the condition is judged to be in the form of a < b, operation 204 is performed. Otherwise, if the conditional form of the determination condition is a > b, operation 218 is performed.
204, the non-judgment execution application unit c ═ ((Sign (a-b) -1) & (a-b)) + b for generating the above condition judgment statement.
Thereafter, no continuation of embodiments of the present invention is performed, or operations 206-216 are performed as another embodiment.
206, calculate the result of the subtraction of a and b: d is a-b.
208, obtain sign bit of d: sign (d).
210, calculate the difference Sign (d) -1 between the sign bit Sign (d) of d and 1.
212, performing a bitwise and operation on the differences sign (d) -1 and d to obtain a first operation result: (sign (d) -1) & d.
214, calculating the value of the first operation result (sign (d) -1) & d added to b: ((sign (d) -1) & d) + b.
216, the value ((sign (d) -1) & d) + b is assigned to c.
Thereafter, the subsequent flow of the present embodiment is not executed.
218, the non-determination execution application unit c ═ - ((sign (b-a) -1) & (b-a)) + b of the condition determination statement is generated.
Thereafter, the subsequent steps of the present embodiment are not performed, or operations 220-230 are performed as another embodiment.
220, calculate the result of the subtraction of b and a: d-b-a.
222, obtain the sign bit of d: sign (d).
224, calculate the difference between sign bit sign (d) of d and 1: sign (d) -1.
226, performing bitwise and operation on the differences sign (d) -1 and d to obtain a second operation result: (sign (d) -1) & d.
228, calculating the difference between b and the second operation result (sign (d) -1) & d: b- ((sign (d) -1) & d).
And 230, assigning the difference b- ((sign (d) -1) & d) to c.
FIG. 5 is a schematic diagram of a loop processing flow according to an embodiment of the invention. Fig. 5 is a schematic diagram illustrating a loop processing flow after converting a conditional statement into a non-conditional execution application unit according to the above method embodiment of the present invention. Where f (a) is the value assigned to c.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
FIG. 6 is a schematic structural diagram of an embodiment of an apparatus for removing a condition determination statement in a loop processing flow according to the present invention. The apparatus of this embodiment may be used to implement the method embodiments of the present invention described above. As shown in fig. 6, the apparatus of this embodiment includes: an acquisition unit and a generation unit. Wherein:
and the acquisition unit is used for acquiring the condition form of the judgment condition in the condition judgment statement when the condition judgment statement is read.
A generation unit configured to generate a non-judgment execution application unit of a condition judgment sentence according to a condition form of the judgment condition; the non-judgment execution application unit realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Based on the apparatus for removing the condition judgment statement in the loop processing flow provided by the above embodiment of the present invention, when the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement is obtained, and according to the condition form of the judgment condition, the non-judgment execution application unit of the condition judgment statement is correspondingly generated, without executing the judgment condition, the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation, so that the execution efficiency of the loop processing flow is improved. In practical application, the device of the embodiment of the invention can be used as a compiler to compile the condition judgment statement in the application program into the non-judgment execution application unit, thereby improving the execution efficiency of the whole application program.
FIG. 7 is a schematic structural diagram of an apparatus for removing a condition determining statement in a loop processing flow according to another embodiment of the present invention. As shown in fig. 7, compared with the embodiment shown in fig. 6, the apparatus of this embodiment further includes an execution unit configured to execute the non-judgment execution application unit and obtain the execution result of the conditional judgment statement.
Based on the apparatus for removing the condition judgment statement in the loop processing flow provided in the above embodiment of the present invention, when the loop processing flow is executed and the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement may be obtained, the non-judgment execution application unit of the condition judgment statement is correspondingly generated according to the condition form of the judgment condition, the non-judgment execution application unit is directly executed, and the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation. The embodiment of the invention removes the condition judgment and directly assigns the value aiming at the condition judgment statement which firstly carries out condition judgment and then assigns the value, thereby improving the execution efficiency of the circular processing flow.
In a specific example of the above apparatus embodiment, the condition form of the judgment condition is a < b, the condition judgment statement is if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a, and the non-judgment execution application unit is c ═ ((Sign (a-b) -1) & (a-b)) + b, and accordingly, the execution unit is specifically configured to:
calculating the result d of the subtraction of a and b as a-b;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
performing bitwise AND operation on the difference values Sign (d) -1 and d to obtain a first operation result (Sign (d) -1) & d;
calculating the value ((Sign (d) -1) & d) + b) of the addition of the first operation result (Sign (d) -1) & d and b;
the value ((sign (d) -1) & d) + b is assigned to c.
In a specific example of the above apparatus embodiment, the condition form of the determination condition is a > b, the condition determination statement is if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a, the non-determination execution application unit is c ═ - ((sign (b-a) -1) & (b-a)) + b, and accordingly, the execution unit is specifically configured to:
calculating the result d of the subtraction of b and a as b-a;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
performing bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result (Sign (d) -1) & d;
calculating a difference b- ((sign (d) -1) and d) between b and the second operation result (sign (d) -1) and d);
and assigning the difference b- ((sign (d) -1) & d) to c.
The embodiment of the invention also provides an application unit, which specifically comprises more than one non-judgment execution application unit, wherein each non-judgment execution application unit is used for realizing the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
Specifically, the condition judgment statement includes if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a, and the non-judgment execution application unit is c ═ ((Sign (a-b) -1) & (a-b)) + b.
Or the condition judgment statement comprises if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a, and the non-judgment execution application unit comprises c ═ - ((sign (b-a) -1) & (b-a)) + b.
Based on the application unit provided in the above embodiment of the present invention, when the condition judgment statement is read, the condition form of the judgment condition in the condition judgment statement is obtained, and the non-judgment execution application unit of the condition judgment statement is correspondingly generated according to the condition form of the judgment condition, without executing the judgment condition, the execution result of the condition judgment statement is realized through sign bit obtaining, addition and subtraction operation, and bitwise and operation, so that the execution efficiency of the loop processing flow is improved. When the embodiment of the invention is applied to the field needing high-speed calculation, the effect of improving the execution efficiency is particularly obvious.
The inventors are inThe technical scheme of the invention is tested by using the following codes on Core i7-4790 CPU @3.60GHz @3.60GHz window 7:
through tests, aiming at the judgment condition that a is larger than b, 65ms is taken for obtaining the execution result when the condition judgment statement is executed, and 43ms is taken for obtaining the execution result after the condition judgment statement is eliminated by adopting the scheme of the embodiment of the invention. For the judgment condition of a < b, it takes 73ms to obtain the execution result when the condition judgment statement exists, and it takes 40ms to obtain the execution result after the condition judgment statement is eliminated by adopting the scheme of the embodiment of the invention.
Therefore, it is obvious that after the condition judgment statement is eliminated, the processing speed is obviously accelerated in the same hardware environment, and the effect is especially obvious when the scheme provided by the embodiment of the invention is applied to the field needing high-speed calculation.
In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts in the embodiments are referred to each other. For the device and unit embodiments, since they basically correspond to the method embodiments, the description is relatively simple, and for the relevant points, reference may be made to the partial description of the method embodiments.
The method and arrangement, unit of the invention may be implemented in many ways. For example, the methods and apparatus of the present invention may be implemented in software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order for the steps of the method is for illustrative purposes only, and the steps of the method of the present invention are not limited to the order specifically described above unless specifically indicated otherwise. Furthermore, in some embodiments, the present invention may also be embodied as a program recorded in a recording medium, the program including machine-readable instructions for implementing a method according to the present invention. Thus, the present invention also covers a recording medium storing a program for executing the method according to the present invention.
The description of the present invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to practitioners skilled in this art. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Claims (16)
1. A method for removing condition judgment statements in a loop processing flow is characterized by comprising the following steps:
responding to the reading of the condition judgment statement, and acquiring a condition form of a judgment condition in the condition judgment statement;
generating a non-judgment execution application unit of the condition judgment statement according to the condition form of the judgment condition; the non-judgment execution application unit does not need to execute judgment conditions, and realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
2. The method of claim 1, further comprising:
and executing the non-judgment execution application unit to obtain an execution result of the condition judgment statement.
3. The method according to claim 1 or 2, wherein the condition form of the judgment condition comprises: a < b;
the conditional judging sentence comprises if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a;
the non-judgment execution application unit includes: c ═ ((Sign (a-b) -1) & (a-b)) + b.
4. The method according to claim 3, wherein executing the non-judgment execution application unit to obtain the execution result of the conditional judgment statement comprises:
calculating the result d of the subtraction of a and b as a-b;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a first operation result (Sign (d) -1) & d;
calculating the value ((sign (d) -1) & d) + b) of the addition of the first operation result (sign (d) -1) & d and b;
the value ((sign (d) -1) & d) + b is assigned to c.
5. The method of claim 3, wherein b has a value of 0.
6. The method of claim 4, wherein b is 0.
7. The method according to claim 1 or 2, wherein the condition form of the judgment condition comprises: a > b;
the conditional judging sentence comprises if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a;
the non-judgment execution application unit includes: c ═ - ((sign (b-a) -1) & (b-a)) + b.
8. The method according to claim 7, wherein executing the non-judgment execution application unit to obtain the execution result of the conditional judgment statement comprises:
calculating the result d of the subtraction of b and a as b-a;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result (Sign (d) -1) & d;
calculating a difference b- ((sign (d) -1) and d) between b and the second operation result (sign (d) -1) and d);
and assigning the difference b- ((sign (d) -1) & d) to c.
9. The method of claim 7, wherein b has a value of 255.
10. The method of claim 8, wherein b has a value of 255.
11. An apparatus for removing a condition judging statement in a loop processing flow, comprising:
the system comprises an acquisition unit, a judgment unit and a processing unit, wherein the acquisition unit is used for acquiring the condition form of a judgment condition in a condition judgment statement when the condition judgment statement is read;
a generating unit configured to generate a non-judgment execution application unit of the condition judgment statement according to a condition form of the judgment condition; the non-judgment execution application unit does not need to execute judgment conditions, and realizes the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation.
12. The apparatus of claim 11, further comprising:
and the execution unit is used for executing the non-judgment execution application unit and obtaining the execution result of the condition judgment statement.
13. The apparatus of claim 12, wherein determining the condition form of the condition comprises: a < b;
the conditional judging sentence comprises if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a;
the non-judgment execution application unit includes: c ═ ((Sign (a-b) -1) & (a-b)) + b;
the execution unit is specifically configured to:
calculating the result d of the subtraction of a and b as a-b;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a first operation result (Sign (d) -1) & d;
calculating the value ((sign (d) -1) & d) + b) of the addition of the first operation result (sign (d) -1) & d and b;
the value ((sign (d) -1) & d) + b is assigned to c.
14. The apparatus according to claim 12, wherein the condition form of the determination condition comprises: a > b;
the conditional judging sentence comprises if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a;
the non-judgment execution application unit includes: c ═ - ((sign (b-a) -1) & (b-a)) + b;
the execution unit is specifically configured to:
calculating the result d of the subtraction of b and a as b-a;
acquiring a sign bit Sign (d) of the d;
calculating the difference Sign (d) between the sign bit Sign (d) of d and 1 (d) -1;
carrying out bitwise AND operation on the difference values Sign (d) -1 and d to obtain a second operation result (Sign (d) -1) & d;
calculating a difference b- ((sign (d) -1) and d) between b and the second operation result (sign (d) -1) and d);
and assigning the difference b- ((sign (d) -1) & d) to c.
15. An application unit is characterized by comprising more than one non-judgment execution application unit;
the non-judgment execution application unit is used for realizing the execution result of the condition judgment statement through sign bit acquisition, addition and subtraction operation and bitwise and operation without executing judgment conditions; wherein the non-judgment execution application unit generates based on a conditional form of a judgment condition in the condition judgment sentence.
16. The application unit according to claim 15, wherein the condition decision statement comprises if (a < b) c ═ b, else c ═ a, or c ═ a < b? b: a, and the non-decision execution application unit comprises c ═ ((Sign (a-b) -1) & (a-b)) + b;
or
The condition determination statement includes if (a > b) c ═ b, else c ═ a, or c ═ a > b? b: a, and the non-determination execution application unit includes c ═ - ((sign (b-a) -1) & (b-a)) + b.
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