CN106773383A - A kind of display panel - Google Patents
A kind of display panel Download PDFInfo
- Publication number
- CN106773383A CN106773383A CN201611156456.2A CN201611156456A CN106773383A CN 106773383 A CN106773383 A CN 106773383A CN 201611156456 A CN201611156456 A CN 201611156456A CN 106773383 A CN106773383 A CN 106773383A
- Authority
- CN
- China
- Prior art keywords
- display panel
- viewing area
- resistor
- array base
- base palte
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
Abstract
The invention discloses a kind of display panel, its non-display area for including viewing area and viewing area periphery, the non-display area includes array base palte horizontal drive circuit unit and capacitor resistor unit, wherein：The output end of each array base palte horizontal drive circuit unit passes through the corresponding capacitor resistor unit and is electrically connected with the corresponding gate input in the viewing area, so that the signal of each array base palte horizontal drive circuit unit output has temporal delay before the viewing area is entered.The homogeneity of feed-trough voltage can be improved using the present invention, so as to improve the flicker homogeneity of display panel.
Description
Technical field
The present invention relates to display panel design field, more particularly to a kind of display panel.
Background technology
Typically in order to prevent liquid crystal aging, TFT-LCD (Thin Film Transistor-Liquid Crystal
Display, TFT liquid crystal display) in real work, the polarity of pixel voltage be it is periodically variable,
But the pixel voltage absolute value for also causing positive-negative polarity simultaneously can't be full symmetric, thus have week per the brightness of frame picture
Phase changes, and reaction is exactly visually to flash.Homogeneity is flashed, is the measurement index that panel integrally flashes situation, opposite
The quality of plate has a great impact.Influenceing the factor of panel flash homogeneity has a lot, mainly there is feed-trough voltage uniformity, panel
Type of drive, coupled capacitor, leakage current and public electrode voltages etc., and feed-trough voltage uniformity be critically important one because
Element.
Fig. 1 is the structural representation of existing display panel.Reference picture 1, existing display panel include viewing area and
The non-display area of viewing area periphery, non-display area includes array base palte horizontal drive circuit unit.It is the display at 100
The design of gate input cabling in panel, in the design, gate input does not have any capacitor resistor unit, array
The signal of substrate horizontal drive circuit unit output is directly electrically connected by grid cabling with the gate input of viewing area
Connect.Using the design, the signal of viewing area postpones situation and feed-trough voltage situation referring specifically to Fig. 2.
Fig. 2 is that the signal in existing display panel in viewing area postpones and feed-trough voltage distribution schematic diagram.
For the ease of description, the grid cabling of viewing area is divided into：Grid near-end, grid middle-end and gate distal ends.Reference picture 2, on
Half part represents the delay situation of the signal in viewing area grid near-end, grid middle-end and gate distal ends, lower half
Point represent feed-trough voltage distribution situation (the Δ Va, Δ Vb, Δ in viewing area grid near-end, grid middle-end and gate distal ends
Vc).Vgh is the voltage for opening TFT, and Vpixel is pixel voltage.
Because the display panel does not have any capacitor resistor unit in gate input, so the signal of grid near-end does not have substantially
Postpone, corresponding its feed-trough voltage (Δ Va) is larger；And the signal of grid middle-end and gate distal ends occurs delay, accordingly
Its feed-trough voltage (Δ Vb and Δ Vc) it is smaller.Therefore, using the design of gate input cabling in the display panel, meeting
Cause feed-trough voltage homogeneity poor due to gate voltage delay in viewing area, i.e. Δ Va, Δ Vb, Δ Vc difference are larger,
So as to cause the flicker homogeneity of display panel poor, and then influence the quality of display panel.
The deficiencies in the prior art are：Signal did not postpone substantially before viewing area is entered, and caused display surface
The flicker homogeneity of plate is poor.
The content of the invention
For above-mentioned technical problem, the invention provides a kind of display panel, it includes viewing area and the viewing area
The overseas non-display area for enclosing, the non-display area includes one-to-one multiple array base palte horizontal drive circuit unit each other
With multiple capacitor resistor units, wherein：
The output end of each array base palte horizontal drive circuit unit passes through the corresponding capacitor resistor unit and the display
Corresponding gate input in region is electrically connected with, so that the grid letter of each array base palte horizontal drive circuit unit output
Number enter the viewing area before have temporal delay.
In one embodiment, the capacitor resistor unit is following either circuit element：Wire resistor, polysilicon resistance and electricity
Hold.
In one embodiment, when the capacitor resistor unit is wire resistor, the wire resistor is located at the display surface
The first metal layer of plate, one end of the wire resistor electrically connects with the output end of corresponding array base palte horizontal drive circuit unit
Connect, the other end of the wire resistor is electrically connected with corresponding gate input.
In one embodiment, the material phase of the material of the wire resistor and the first metal layer of the display panel
Together.
In one embodiment, when the capacitor resistor unit is wire resistor, the Wiring structure of the wire resistor is folding
Cable architecture.
In one embodiment, the meander line structure is continuous U-shaped meander line structure.
In one embodiment, when the capacitor resistor unit is polysilicon resistance, the polysilicon resistance is located at described aobvious
Show the active layer of panel, one end of the polysilicon resistance passes through the first via and corresponding array base palte horizontal drive circuit unit
Output end be electrically connected with, the other end of the polysilicon resistance passed through the second hole and electrically connected with corresponding gate input
Connect.
In one embodiment, the non-display area also includes public electrode, when the capacitor resistor unit is electric capacity, institute
An electrode for stating electric capacity is made up of the public electrode, and another electrode of the electric capacity is located at the first of the display panel
Metal level.
In one embodiment, the material and the display surface of another electrode of the first metal layer are located in the electric capacity
The material of the first metal layer of plate is identical.
In one embodiment, another electrode in the electric capacity positioned at the first metal layer is shaped as square block.
Compared with prior art, one or more embodiments of the invention can have the following advantages that：
The display panel that the present invention is provided increased capacitor resistor unit in gate input, so signal is entering display
A delay for appropriateness is there is before region, the homogeneity of feed-trough voltage can be improved, so as to improve the flicker of display panel
Homogeneity.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, with reality of the invention
Apply example to be provided commonly for explaining the present invention, be not construed as limiting the invention.In the accompanying drawings：
Fig. 1 is the structural representation of display panel of the prior art；
Fig. 2 is that signal in display panel of the prior art in viewing area postpones and feed-trough voltage distribution is shown
It is intended to；
Fig. 3 is that the signal in the display panel in the first embodiment of the present invention in viewing area postpones and feedthrough
Voltage's distribiuting schematic diagram；
Fig. 4 is the structural representation of the display panel in the second embodiment of the present invention；
Fig. 5 is each film layer generalized section of the display panel in the second embodiment of the present invention；
Fig. 6 is the structural representation of the display panel in the third embodiment of the present invention；
Fig. 7 is the structural representation of the display panel in the fourth embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, further is made to the present invention below in conjunction with accompanying drawing
Ground is described in detail.Because the display panel does not have any capacitor resistor unit in gate input, so the signal of grid near-end is basic
Without delay, corresponding its feed-trough voltage (Δ Va) is larger；And the signal of grid middle-end and gate distal ends occurs delay,
Corresponding its feed-trough voltage (Δ Vb and Δ Vc) is smaller.Therefore, using the design side of gate input cabling in the display panel
Case, Hui AA areas cause feed-trough voltage homogeneity poor due to Gate voltage delays, i.e. Δ Va, Δ Vb, and Δ Vc differences are larger,
So as to cause the flicker homogeneity of display panel poor, and then influence the quality of display panel.
First embodiment
A kind of display panel in the first embodiment of the present invention, it include viewing area and the viewing area periphery it is non-
Viewing area, the non-display area includes one-to-one multiple array base palte horizontal drive circuit unit each other and multiple capacitance-resistances
Unit, wherein：
The output end of each array base palte horizontal drive circuit unit passes through the corresponding capacitor resistor unit and the display
Corresponding gate input in region is electrically connected with, so that the grid letter of each array base palte horizontal drive circuit unit output
Number enter the viewing area before have temporal delay.
Preferably, the capacitor resistor unit is following either circuit element：Wire resistor, polysilicon resistance and electric capacity.Need
What is illustrated is, it is also possible to other circuit elements as capacitor resistor unit, as long as in fact, signal can be made to show entering
The circuit element for having temporal delay before region can be carried out, and wire resistor, polysilicon resistance and electric capacity are only used for teaching
How those skilled in the art specifically implement the present invention, but it is not intended that are only capable of using these three circuit elements, specifically using which kind of
Circuit element, practice can be combined in implementation process to be needed to determine.
Compared to existing display panel, the design of the gate input cabling of the display panel in the present embodiment
In, gate input increased capacitor resistor unit, when capacitor resistor unit is wire resistor, polysilicon resistance and either circuit unit in electric capacity
During part, the signal of viewing area postpones situation and feed-trough voltage situation referring specifically to Fig. 3.
Fig. 3 is that the signal in the display panel in the first embodiment of the present invention in viewing area postpones and feedthrough
Voltage's distribiuting schematic diagram.Reference picture 3, top half is represented in viewing area grid near-end, grid middle-end and gate distal ends
The delay situation of signal, the latter half represents the feedthrough in viewing area grid near-end, grid middle-end and gate distal ends
Voltage's distribiuting situation (Δ Va, Δ Vb, Δ Vc).
Because the display panel increased capacitor resistor unit in gate input, thus signal enter viewing area it
Before there is a delay for appropriateness so that the signal of grid near-end, grid middle-end and gate distal ends can all exist certain
Delay, referring to Fig. 3 top halfs.So, it is equal in the feed-trough voltage of viewing area grid near-end, grid middle-end and gate distal ends
Preferably, i.e. Δ Va, Δ Vb, Δ Vc difference are smaller for one property, and referring to Fig. 3 the latter half, and then it is homogeneous to improve the flicker of display panel
Property, improve the quality of panel.
The display panel that the display panel that the present embodiment is provided can be effectively improved existing mobile phone, display and TV dodges
Bright phenomenon, can also cover LCD (Liquid Crystal Display, liquid crystal display), OLED (Organic Light-
Emitting Diode, Organic Light Emitting Diode) industry improvement panel flash homogeneity technology.
Second embodiment
Fig. 4 is the structural representation of the display panel in the second embodiment of the present invention.Reference picture 4, in the present embodiment
The structure of display panel is identical with first embodiment, is the design of gate input cabling in the display panel, institute at 200
Capacitor resistor unit is stated for wire resistor, the wire resistor is located at the first metal layer M1 of the display panel, the wire resistor
The output end of one end and corresponding array base palte horizontal drive circuit unit be electrically connected with, the other end and the phase of the wire resistor
The gate input answered is electrically connected with.
Fig. 5 is each film layer generalized section of the display panel in the second embodiment of the present invention.Reference picture 5, with bottom gate
As a example by mode TFT-LCD, the first metal layer M1 is the metal level for making grid G E cablings, and second metal layer M2 leaks to make source electrode
The metal level of pole SD cablings, M3 is the 3rd metal level.Wire resistor is arranged on the first metal layer, due to there is wire resistor,
So that signal there is a delay for appropriateness before viewing area is entered.
Table 1 is the Sino-British lexical or textual analysis table of each film layer of the display panel in the second embodiment of the present invention, specific as follows shown：
Table 1
| ITO_top | Top layer indium tin oxide transparent conductive semiconductor film | PV(SiNx) | Passivation layer |
| M3 | 3rd metal level | ITO_COM | The public electrode being made up of indium tin oxide semiconductor |
| PL | Organic planarizationization layer | SD | Source drain |
| ILD | Insulating barrier | GE | Grid |
| GI(SiOx+SiNx) | Gate insulator | Poly-Si | Polysilicon |
| SiO2 | Silicon dioxide insulating layer | SiNx | Nitrogen silicon compound |
| A_Si/Mo | Non-crystalline silicon/molybdenum | Glass | Glass substrate |
| NMOS | N-type metal oxide semiconductor transistor | PMOS | P-type mos transistor |
Preferably, the material of the wire resistor is identical with the material of the first metal layer of the display panel.
Specifically, wire resistor is arranged on the first metal layer, it is also to be made of this metal material.
Preferably, when the capacitor resistor unit is wire resistor, the Wiring structure of the wire resistor is meander line structure.
Preferably, the meander line structure is continuous U-shaped meander line structure.
Specifically, the Wiring structure of wire resistor is designed as meander line structure, it is for save space.Meander line structure is designed as
Continuous U-shaped meander line structure, but be not limited only to a kind of this meander line structure, can be according to specific implementation situation depending on.
3rd embodiment
Fig. 6 is the structural representation of the display panel in the third embodiment of the present invention.Reference picture 6, in the present embodiment
The structure of display panel is identical with first embodiment, is the design of gate input cabling in the display panel, institute at 300
Capacitor resistor unit is stated for polysilicon resistance (Poly resistance), the polysilicon resistance is located at the active layer of the display panel, described
One end of polysilicon resistance is electrically connected with by the first via with the output end of corresponding array base palte horizontal drive circuit unit, institute
The other end for stating polysilicon resistance is electrically connected with by the second via with corresponding gate input.
Reference picture 5, by taking bottom gate mode TFT LCD as an example, Poly-Si layers is active layer, and polysilicon resistance is arranged on into this
One layer, due to there is polysilicon resistance so that signal there is a delay for appropriateness before viewing area is entered.Have
Active layer and the first metal layer be not in same film layer, it is necessary to pass through via is connected to the first metal layer by polysilicon resistance.Polycrystalline
The resistivity very little of silicon, can change resistivity by adjusting doping level, reach and wire resistor phase in second embodiment
Same result.
Fourth embodiment
Fig. 7 is the structural representation of the display panel in the fourth embodiment of the present invention.Reference picture 7, in the present embodiment
The structure of display panel is identical with first embodiment, is the design of gate input cabling in the display panel, institute at 400
Stating non-display area also includes public electrode (COM electrodes), when the capacitor resistor unit is electric capacity, an electrode of the electric capacity
It is made up of the public electrode, another electrode of the electric capacity is located at the first metal layer of the display panel.
Reference picture 5, by taking bottom gate mode TFT LCD as an example, the first metal layer M1 is the metal level for making grid G E cablings, the
Two metal level M2 are the metal level for making source drain SD cablings, and M3 is the 3rd metal level.One electrode of electric capacity is by common electrical
Pole is constituted, and another electrode of electric capacity is arranged on the first metal layer, and is arranged on the underface of public electrode.If display panel
It is top gate structure, then another electrode of electric capacity is arranged on the surface of public electrode.The first metal is arranged on due to existing
The electric capacity that the electrode and public electrode of layer are formed so that signal there is prolonging for appropriateness before viewing area is entered
Late.
Preferably, the material and the first of the display panel of another electrode of the first metal layer is located in the electric capacity
The material of metal level is identical.
Specifically, another electrode in electric capacity positioned at the first metal layer is arranged on the first metal layer, it is also using this
What metal material was made.
Preferably, another electrode in the electric capacity positioned at the first metal layer is shaped as square block.
Specifically, the shape of another electrode in electric capacity positioned at the first metal layer typically uses square block.
It follows that the display panel provided using the present invention, can improve the homogeneity of feed-trough voltage, so as to improve aobvious
Show the flicker homogeneity of panel.
In sum, the display panel of the present embodiment, has actual directive significance in liquid crystal display panel design.
The above, specific implementation case only of the invention, protection scope of the present invention is not limited thereto, any ripe
Those skilled in the art are known in technical specification of the present invention, modifications of the present invention or replacement all should be in the present invention
Protection domain within.
Claims (9)
1. a kind of display panel, its non-display area for including viewing area and viewing area periphery, it is characterised in that institute
Stating non-display area includes one-to-one multiple array base palte horizontal drive circuit unit each other and multiple capacitor resistor units, wherein：
The output end of each array base palte horizontal drive circuit unit passes through the corresponding capacitor resistor unit and the viewing area
In corresponding gate input be electrically connected with so that the signal of each array base palte horizontal drive circuit unit output exists
There is temporal delay before into the viewing area.
2. display panel according to claim 1, it is characterised in that the capacitor resistor unit is following either circuit element：
Wire resistor, polysilicon resistance and electric capacity.
3. display panel according to claim 2, it is characterised in that described when the capacitor resistor unit is wire resistor
Wire resistor is located at the first metal layer of the display panel, and one end of the wire resistor drives with corresponding array base palte row
The output end of circuit unit is electrically connected with, and the other end of the wire resistor is electrically connected with corresponding gate input.
4. the display panel according to Claims 2 or 3, it is characterised in that the material of the wire resistor and the display
The material of the first metal layer of panel is identical.
5. display panel according to claim 2, it is characterised in that described when the capacitor resistor unit is wire resistor
The Wiring structure of wire resistor is meander line structure.
6. display panel according to claim 5, it is characterised in that the meander line structure is continuous U-shaped meander line structure.
7. display panel according to claim 2, it is characterised in that when the capacitor resistor unit is polysilicon resistance, institute
State active layer of the polysilicon resistance positioned at the display panel, one end of the polysilicon resistance by the first via with it is corresponding
The output end of array base palte horizontal drive circuit unit is electrically connected with, and the other end of the polysilicon resistance passes through the second via and phase
The gate input answered is electrically connected with.
8. display panel according to claim 2, it is characterised in that the non-display area also includes public electrode, when
When the capacitor resistor unit is electric capacity, an electrode of the electric capacity is made up of the public electrode, another electricity of the electric capacity
Pole is located at the first metal layer of the display panel.
9. display panel according to claim 8, it is characterised in that in the electric capacity positioned at the first metal layer another
The material of electrode is identical with the material of the first metal layer of the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611156456.2A CN106773383A (en) | 2016-12-14 | 2016-12-14 | A kind of display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611156456.2A CN106773383A (en) | 2016-12-14 | 2016-12-14 | A kind of display panel |
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| Publication Number | Publication Date |
|---|---|
| CN106773383A true CN106773383A (en) | 2017-05-31 |
Family
ID=58888185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611156456.2A Pending CN106773383A (en) | 2016-12-14 | 2016-12-14 | A kind of display panel |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110322850A (en) * | 2019-05-06 | 2019-10-11 | 惠科股份有限公司 | Display device |
| WO2020224168A1 (en) * | 2019-05-07 | 2020-11-12 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, display panel and display apparatus |
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|---|---|---|---|---|
| JPH07218896A (en) * | 1994-02-02 | 1995-08-18 | Sanyo Electric Co Ltd | Active matrix type liquid crystal display device |
| KR20140026189A (en) * | 2012-08-24 | 2014-03-05 | 엘지디스플레이 주식회사 | Liquid crystal display panel |
| CN103730093A (en) * | 2013-12-26 | 2014-04-16 | 深圳市华星光电技术有限公司 | Array substrate drive circuit, array substrate and corresponding liquid crystal displayer |
| US20150097190A1 (en) * | 2013-10-07 | 2015-04-09 | Tianma Micro-Electronics Co., Ltd. | Tft array substrate, display panel and display device |
| CN104730792A (en) * | 2015-04-08 | 2015-06-24 | 合肥京东方光电科技有限公司 | Array substrate and display device |
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2016
- 2016-12-14 CN CN201611156456.2A patent/CN106773383A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07218896A (en) * | 1994-02-02 | 1995-08-18 | Sanyo Electric Co Ltd | Active matrix type liquid crystal display device |
| KR20140026189A (en) * | 2012-08-24 | 2014-03-05 | 엘지디스플레이 주식회사 | Liquid crystal display panel |
| US20150097190A1 (en) * | 2013-10-07 | 2015-04-09 | Tianma Micro-Electronics Co., Ltd. | Tft array substrate, display panel and display device |
| CN103730093A (en) * | 2013-12-26 | 2014-04-16 | 深圳市华星光电技术有限公司 | Array substrate drive circuit, array substrate and corresponding liquid crystal displayer |
| CN104730792A (en) * | 2015-04-08 | 2015-06-24 | 合肥京东方光电科技有限公司 | Array substrate and display device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110322850A (en) * | 2019-05-06 | 2019-10-11 | 惠科股份有限公司 | Display device |
| CN110322850B (en) * | 2019-05-06 | 2020-12-08 | 惠科股份有限公司 | Display device |
| WO2020224168A1 (en) * | 2019-05-07 | 2020-11-12 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, display panel and display apparatus |
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