CN106712488B - Main control chip circuit and method of PFC switching power supply - Google Patents
Main control chip circuit and method of PFC switching power supply Download PDFInfo
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- CN106712488B CN106712488B CN201710217994.6A CN201710217994A CN106712488B CN 106712488 B CN106712488 B CN 106712488B CN 201710217994 A CN201710217994 A CN 201710217994A CN 106712488 B CN106712488 B CN 106712488B
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- 238000000034 method Methods 0.000 title claims abstract description 6
- 239000003990 capacitor Substances 0.000 claims abstract description 15
- 230000001052 transient effect Effects 0.000 claims abstract description 5
- 230000000087 stabilizing effect Effects 0.000 claims description 34
- 238000005070 sampling Methods 0.000 claims description 6
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000001514 detection method Methods 0.000 abstract description 4
- 230000007423 decrease Effects 0.000 abstract description 2
- 238000011084 recovery Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention discloses a PFC switch power supply main control chip circuit and a PFC switch power supply main control chip method. The main circuit of the chip is a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit. A common emitter-timed multi-harmonic voltage controlled oscillator is a Frequency Modulation (FM) circuit that controls only the magnitude of the forward charging current I (+) and the reverse charging current I (-) of its timing capacitor CT. The invention simultaneously controls the magnitude and the ratio of I (+) and I (-) to be transformed into a Frequency Modulation (FM) plus Pulse Width Modulation (PWM) circuit, and the control signal is indirectly from the AC mains supply rectification bus voltage. When the transient voltage of the bus increases, the frequency of an output switching signal of the emitter timing multi-harmonic voltage-controlled oscillator specially modified by the chip correspondingly increases, and the pulse width of the emitter timing multi-harmonic voltage-controlled oscillator correspondingly decreases. The switch power supply adopting the chip has the efficiency as high as 95%, the PF as high as 0.98, low harmonic wave and meets the relevant national standards for high-power supply, zero-crossing detection and multiplier circuits are not needed, and the circuit is simple.
Description
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a main control chip circuit and a method for a PFC switching power supply.
Background
The prior art such as single-stage flyback and half-bridge and full-bridge Power Factor Correction (PFC) switching power supply has the characteristics of high Power Factor (PF), low harmonic wave, high efficiency and the like, and is widely applied to modern electronic equipment. However, in the application circuit of the main control chip of the existing single-stage flyback PFC switching power supply, the MOS switching transistor has problems of excessively high reverse voltage and spike recoil high voltage interference, and a zero-crossing detection circuit is required. And the circuit of the half-bridge PFC switch power supply or the full-bridge PFC switch power supply is too complex and has high cost. The PF value of the existing buck-type active PFC switch power supply driving chip such as BP2318 of Haiying Feng Mingyuan semiconductor Co., ltd is difficult to reach 0.95, and the harmonic value is difficult to meet the national relevant standards of high-power supplies. Meanwhile, the PFC switch power supply driving chip also comprises a zero-crossing detection circuit, a multiplier and other circuits, the structure is complex, and the chip cost is relatively increased.
Disclosure of Invention
The invention relates to a PFC switch power supply main control chip circuit and a PFC switch power supply main control chip method. The main circuit of the chip is a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit. A common emitter-timed multi-harmonic voltage controlled oscillator is a Frequency Modulation (FM) circuit that controls only the magnitude of the forward charging current I (+) and the reverse charging current I (-) of its timing capacitor CT. The invention simultaneously controls the magnitude and the ratio of the I (+) and the I (-) to be transformed into a Frequency Modulation (FM) plus Pulse Width Modulation (PWM) circuit, wherein the control signal is from the transient current of the MOS switch transistor and is also indirectly from the voltage of the alternating current mains supply rectification bus. When the transient voltage of the bus increases, the frequency of an output switching signal of the emitter timing multi-harmonic voltage-controlled oscillator specially modified by the chip correspondingly increases, and the pulse width of the output switching signal correspondingly decreases. The switching power supply adopting the chip has the efficiency up to 95%, the PF up to 0.98, low harmonic wave, low working reverse voltage of the MOS switching transistor, no peak recoil high voltage interference, simple internal circuit structure, no need of zero crossing detection circuit, multiplier and other circuits, high reliability and low cost, and meets the national relevant standards for high-power supplies.
In order to achieve the above purpose, the present invention adopts the following technical scheme. The main control chip consists of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2. The main control chip can be an integrated circuit with 8 pins, wherein the voltage stabilizing circuit 1 is a conventional voltage stabilizing circuit, the pin (8) is the input end of the positive power end of the voltage stabilizing circuit 1, and the voltage stabilizing output of the voltage stabilizing circuit 1 is connected with the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2 to provide a low-voltage direct-current power supply for the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2. Pin (4) is the control signal VI input end of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it connects the source of MOS switch transistor TM and one end of the current sampling resistor RSA, pin (5) is the switch control signal VO output end of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it links to each other with the grid of TM, pins (6) and (7) are the external terminal of the timing capacitor CT of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, pin (2) is the adjustment terminal of the Power Factor (PF) of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it connects with one end of the external resistor RPH, pin (1) is the reference Ground (GND) end, pin (3) is the empty (NC) end.
The application circuit of the chip comprises a rectifier bridge B1, high-voltage filter capacitors CH 1-CH 3, a high-voltage power supply power taking resistor RH1, a MOS switch transistor TM, a fast recovery diode DH, an inductor L1, LED loads LED 1-LEDN connected in parallel, a current sampling resistor RSA, a low-voltage filter capacitor CL1, a timing capacitor CT and a resistor RPH for adjusting PF.
Wherein two input ends of B1 are connected with an Alternating Current (AC) end, a negative output end of B1 is connected with GND, a positive output end of B1 is high voltage VH, one end of CH1 is connected with VH, the other end of CH1 is connected with GND, one end of RH1 is connected with VH, the other end of RH1 is connected with pin (8) and one end of CL1, the other end of CL1 is connected with GND, two ends of CT are respectively connected with pin (6) and pin (7), one end of RPH is connected with pin (2), the other end of RPH is connected with GND, the negative electrode of DH is connected with VH, the positive electrode of DH is connected with one end of TM and one end of L1, the other end of L1 is connected with the negative electrode of LEDN and one end of CH3 in series connection with LEDs 1-LEDN, the other end of CH3 is connected with VH, the grid of TM is connected with pin (5), the source of TM is connected with pin (4) and one end of RSA, and the other end of RSA is connected with GND.
The internal circuit of the main control chip consists of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, and the internal circuit is as follows. The voltage stabilizing circuit 1 consists of a resistor R1, an NPN transistor T1, diodes D1-D6 connected in parallel and in series and a voltage stabilizing tube W1, wherein one end of the R1 is connected with a collector electrode of the T1 and a pin (8), the other end of the R1 is connected with a base electrode of the T1 and an anode of the D1, a cathode of the D6 is connected with a cathode of the W1, an anode of the W1 is connected with GND, an emitter of the T1 is an internal output V+ end of the voltage stabilizing power supply, and the pin (1) is a GND end. The specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2 consists of NPN transistors T2-T13, resistors R2-R15, diodes D7 and D8, transverse PNP transistors Q1-Q3 and voltage stabilizing diodes W2 and W3, wherein one end of R4 and one end of R5 are connected with V+, the positive electrode of D7 and the positive electrode of D8 are connected with the negative electrode of D7 in parallel and connected with the collector of T2 and the base of T3 and the base of T9, the other end of R5 is connected with the negative electrode of D8 in parallel and connected with the collector of T3 and the base of T2 and the base of T8, the emitter of T2 and the collector of T4 are simultaneously connected with pin (7), the emitter of T3 and the collector of T5 are simultaneously connected with pin (6), the base of T4 is connected with one end of T5 in parallel and connected with one end of R2, the emitter of T4 is connected with one end of R6, one end of T5 is connected with one end of R7 and the base of T7, the other end of R2 is connected with the collector of V+, R3 and the other end of R6 and R7 is connected with GND, the emitter of T6 is connected with one end of R10 and pin (2), the base of T6 is connected with one end of R8 and one end of R9, the collector of T6 is connected with one end of R8 and is connected with V+ and the base of T7 at the same time, the other end of R9 and the other end of R10 are connected with GND, the emitter of T8 is connected with the cathode of W2, the collector of T8 is connected with V+ and the emitter of T9 is connected with the cathode of W3, the positive electrode of W2 is connected with the base of T11 and one end of R12, the other end of R12 is connected with GND, the positive electrode of W3 is connected with the base of T10 and one end of R13, the other end of R13 is connected with GND, the emitter of T10 is connected with one end of R14 at the same time, the other end of R14 is connected with GND, the collector of T10 is connected with the base of T11 at the same time, the other end of R11 is connected with V+ and the emitter of T12, the collector of T12 is connected with GND, the collector of T12 is connected with the base of Q13, and the base of Q3 is connected with the base of Q1, and the base of Q12 is connected with the base of Q, the base and collector of Q1 are short-circuited and simultaneously connected with the base of Q2 and one end of R15, the other end of R15 is connected with GND, the emitter of Q2 is connected with V+ and the emitter of Q3 is connected with the emitter of T13 and simultaneously connected with pin (5), the collector of Q3 is connected with GND, the collector of T13 is connected with V+ and pin (3) is an empty (NC) end.
Drawings
FIG. 1 is a schematic circuit diagram of a main control chip and peripheral circuits thereof in the present invention;
fig. 2 is a schematic diagram of an internal circuit of the main control chip in the present invention.
Detailed Description
In embodiment 1, as shown in fig. 1, the main control chip is composed of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2. The main control chip can be an integrated circuit with 8 pins, wherein the voltage stabilizing circuit 1 is a conventional voltage stabilizing circuit, the pin (8) is the input end of the positive power end of the voltage stabilizing circuit 1, and the voltage stabilizing output of the voltage stabilizing circuit 1 is connected with the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2 to provide a low-voltage direct-current power supply for the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2. Pin (4) is the control signal VI input end of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it connects the source of MOS switch transistor TM and one end of the current sampling resistor RSA, pin (5) is the switch control signal VO output end of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it links to each other with the grid of TM, pins (6) and (7) are the external terminal of the timing capacitor CT of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, pin (2) is the adjustment terminal of the Power Factor (PF) of the emitter timing multi-harmonic voltage-controlled oscillator circuit 2 specially modified, it connects with one end of the external resistor RPH, pin (1) is the reference Ground (GND) end, pin (3) is the empty (NC) end.
The application circuit of the chip comprises a rectifier bridge B1, high-voltage filter capacitors CH 1-CH 3, a high-voltage power supply power taking resistor RH1, a MOS switch transistor TM, a fast recovery diode DH, an inductor L1, LED loads LED 1-LEDN connected in parallel, a current sampling resistor RSA, a low-voltage filter capacitor CL1, a timing capacitor CT and a resistor RPH for adjusting PF.
Wherein two input ends of B1 are connected with an Alternating Current (AC) end, a negative output end of B1 is connected with GND, a positive output end of B1 is high voltage VH, one end of CH1 is connected with VH, the other end of CH1 is connected with GND, one end of RH1 is connected with VH, the other end of RH1 is connected with pin (8) and one end of CL1, the other end of CL1 is connected with GND, two ends of CT are respectively connected with pin (6) and pin (7), one end of RPH is connected with pin (2), the other end of RPH is connected with GND, the negative electrode of DH is connected with VH, the positive electrode of DH is connected with one end of TM and one end of L1, the other end of L1 is connected with the negative electrode of LEDN and one end of CH3 in series connection with LEDs 1-LEDN, the other end of CH3 is connected with VH, the grid of TM is connected with pin (5), the source of TM is connected with pin (4) and one end of RSA, and the other end of RSA is connected with GND.
The rectifier bridge B1 is DB157S, the high-voltage filter capacitor CH1 is 1uF/630V, the CH2 is 1000uF/200V, the CH3 is 0.47uF/200V, the low-voltage filter capacitor CL1 is 2.2uF/25V, the timing capacitor CT is 1nF/10V, the high-voltage power supply resistor RH1 is 300K/0.5W, the MOS switch transistor TM is 8N60, the fast recovery diode DH is MUR8100, the inductance L1 is 2mH/2A, the LEDs 1-LEDN (N=30) connected in parallel are blue light or white light LEDs with the power supply of 3V/3W, the current sampling resistor RSA is 0.5 omega/1W, the adjusting PF resistor RPH is 100K/0.25W, and the main control chip of the PFC switch power supply is the product of the photo technology Co-current-technology limited company, and the model YS81.
Typical parameters of the application circuit are: the output power is 100 W+/-5% (AC 160-260V), the power conversion efficiency is more than or equal to 95%, the Power Factor (PF) is more than or equal to 0.98, and the harmonic meets the harmonic limit value requirements of standards such as China CCC, european Union CE and the like on a high-power switch power supply.
In embodiment 2, as shown in fig. 2, the internal circuit of the main control chip is composed of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, and the internal circuit is as follows. The voltage stabilizing circuit 1 consists of a resistor R1, an NPN transistor T1, diodes D1-D6 connected in parallel and in series and a voltage stabilizing tube W1, wherein one end of the R1 is connected with a collector electrode of the T1 and a pin (8), the other end of the R1 is connected with a base electrode of the T1 and an anode of the D1, a cathode of the D6 is connected with a cathode of the W1, an anode of the W1 is connected with GND, an emitter of the T1 is an internal output V+ end of the voltage stabilizing power supply, and the pin (1) is a GND end. The specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2 consists of NPN transistors T2-T13, resistors R2-R15, diodes D7 and D8, transverse PNP transistors Q1-Q3 and voltage stabilizing diodes W2 and W3, wherein one end of R4 and one end of R5 are connected with V+, the positive electrode of D7 and the positive electrode of D8 are connected with the negative electrode of D7 in parallel and connected with the collector of T2 and the base of T3 and the base of T9, the other end of R5 is connected with the negative electrode of D8 in parallel and connected with the collector of T3 and the base of T2 and the base of T8, the emitter of T2 and the collector of T4 are simultaneously connected with pin (7), the emitter of T3 and the collector of T5 are simultaneously connected with pin (6), the base of T4 is connected with one end of T5 in parallel and connected with one end of R2, the emitter of T4 is connected with one end of R6, one end of T5 is connected with one end of R7 and the base of T7, the other end of R2 is connected with the collector of V+, R3 and the other end of R6 and R7 is connected with GND, the emitter of T6 is connected with one end of R10 and pin (2), the base of T6 is connected with one end of R8 and one end of R9, the collector of T6 is connected with one end of R8 and is connected with V+ and the base of T7 at the same time, the other end of R9 and the other end of R10 are connected with GND, the emitter of T8 is connected with the cathode of W2, the collector of T8 is connected with V+ and the emitter of T9 is connected with the cathode of W3, the positive electrode of W2 is connected with the base of T11 and one end of R12, the other end of R12 is connected with GND, the positive electrode of W3 is connected with the base of T10 and one end of R13, the other end of R13 is connected with GND, the emitter of T10 is connected with one end of R14 at the same time, the other end of R14 is connected with GND, the collector of T10 is connected with the base of T11 at the same time, the other end of R11 is connected with V+ and the emitter of T12, the collector of T12 is connected with GND, the collector of T12 is connected with the base of Q13, and the base of Q3 is connected with the base of Q1, and the base of Q12 is connected with the base of Q, the base and collector of Q1 are short-circuited and simultaneously connected with the base of Q2 and one end of R15, the other end of R15 is connected with GND, the emitter of Q2 is connected with V+ and the emitter of Q3 is connected with the emitter of T13 and simultaneously connected with pin (5), the collector of Q3 is connected with GND, the collector of T13 is connected with V+ and pin (3) is an empty (NC) end.
Wherein T1 to T13 are general bipolar NPN transistors, Q1 to Q3 are lateral bipolar PNP transistors, D1 to D8 are forward NPN transistors with base and collector shorted, W1 to W3 are reverse NPN transistors with base and collector shorted, r1=200k, r2=120k, r3=100k, r4=30k, r5=30k, r6=100k, r7=200k, r8=200k, r9=10k, r10=100k, r11=200k, r12=100k, r13=100k, r14=30k, r15=100deg.k. The main parameters of the chip are as follows: the working voltage ranges from 12V to 18V, the quiescent current ranges from 0.5mA to 0.7mA, the frequency range of an output switching signal FM of the chip is 2KHz to 100KHz, the PWM pulse width duty ratio ranges from 2/3 to 1/20, and the working temperature ranges from-55 ℃ to 125 ℃.
Claims (4)
1. A main control chip circuit of PFC switching power supply comprises a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit; the common emitter timing multi-harmonic voltage-controlled oscillator is a frequency modulation FM circuit which only controls the forward charging current I+ and the reverse charging current I-of a timing capacitor CT; the emitter timing multi-harmonic voltage-controlled oscillator specially modified controls the magnitude and the ratio of I+ and I < - > simultaneously to be modified into a frequency modulation FM plus pulse width modulation PWM circuit, wherein the control signal is from the transient current of the MOS switch transistor TM and is also indirectly from the voltage of an alternating current mains supply rectification bus;
the main control chip consists of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, the main control chip is an 8-pin integrated circuit, wherein the voltage stabilizing circuit 1 is a conventional voltage stabilizing circuit, a pin (8) is a positive power end input end of the voltage stabilizing circuit 1, a voltage stabilizing output of the voltage stabilizing circuit 1 is connected with the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, a low-voltage direct current power supply is provided for the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, a pin (4) is a control signal VI input end of the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, the pin (4) is connected with a source electrode of a MOS switching transistor TM and one end of a current sampling resistor RSA, a pin (5) is a switch control signal VO output end of the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, the pins (6) and (7) are external terminals of a timing capacitor CT of the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, and one end of the pin (2) is a power factor adjusting terminal PF of the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, and the other end of the pin (2) is connected with an external resistor RPH (1) and the end of the pin (GND) is an empty pin (3);
the main control chip internal circuit consists of a voltage stabilizing circuit 1 and a specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2, wherein the voltage stabilizing circuit 1 consists of a resistor R1, an NPN transistor T1, diodes D1-D6 connected in parallel and in series and a voltage stabilizing tube W1, one end of the R1 is connected with a collector electrode of the T1 and a pin (8), the other end of the R1 is connected with a base electrode of the T1 and an anode of the D1, a cathode of the D6 is connected with a cathode of the W1, an anode of the W1 is connected with GND, an emitter of the T1 is an internal output V+ end of the voltage stabilizing circuit 1, and the pin (1) is a GND end; the specially modified emitter timing multi-harmonic voltage-controlled oscillator circuit 2 consists of NPN transistors T2-T13, resistors R2-R15, diodes D7 and D8, transverse PNP transistors Q1-Q3 and voltage stabilizing diodes W2 and W3, wherein one end of R4 and one end of R5 are connected with V+, the positive electrode of D7 and the positive electrode of D8 are connected with the negative electrode of D7 in parallel and connected with the collector of T2 and the base of T3 and the base of T9, the other end of R5 is connected with the negative electrode of D8 in parallel and connected with the collector of T3 and the base of T2 and the base of T8, the emitter of T2 and the collector of T4 are simultaneously connected with pin (7), the emitter of T3 and the collector of T5 are simultaneously connected with pin (6), the base of T4 is connected with one end of T5 in parallel and connected with one end of R2, the emitter of T4 is connected with one end of R6, one end of T5 is connected with one end of R7 and the base of T7, the other end of R2 is connected with the collector of V+, R3 and the other end of R6 and R7 is connected with GND, the emitter of T6 is connected with one end of R10 and pin (2), the base of T6 is connected with one end of R8 and one end of R9, the collector of T6 is connected with one end of R8 and is connected with V+ and the base of T7 at the same time, the other end of R9 and the other end of R10 are connected with GND, the emitter of T8 is connected with the cathode of W2, the collector of T8 is connected with V+ and the emitter of T9 is connected with the cathode of W3, the positive electrode of W2 is connected with the base of T11 and one end of R12, the other end of R12 is connected with GND, the positive electrode of W3 is connected with the base of T10 and one end of R13, the other end of R13 is connected with GND, the emitter of T10 is connected with one end of R14 at the same time, the other end of R14 is connected with GND, the collector of T10 is connected with the base of T11 at the same time, the other end of R11 is connected with V+ and the emitter of T12, the collector of T12 is connected with GND, the collector of T12 is connected with the base of Q13, and the base of Q3 is connected with the base of Q1, and the base of Q12 is connected with the base of Q, the base and collector of Q1 are short-circuited and simultaneously connected with the base of Q2 and one end of R15, the other end of R15 is connected with GND, the emitter of Q2 is connected with V+ and the emitter of Q3 is connected with the emitter of T13 and simultaneously connected with pin (5), the collector of Q3 is connected with GND, the collector of T13 is connected with V+ and pin (3) is an empty NC end.
2. The master chip circuit of claim 1, wherein: when the transient voltage of the bus is increased, the frequency of the switching signal output by the specially-modified emitter timing multi-harmonic voltage-controlled oscillator of the chip is correspondingly increased, and the pulse width of the switching signal is correspondingly reduced.
3. The master chip circuit of claim 1, wherein: the device also comprises an over-current and over-voltage protection circuit, a temperature control circuit and an output short-circuit protection circuit.
4. The master chip circuit of claim 1, wherein: the method also comprises the step of monolithically integrating a main control chip circuit and an MOS switch transistor, and can also be used for double-chip packaging.
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CN102638226A (en) * | 2012-04-13 | 2012-08-15 | 武汉农立信科技有限公司 | Multi-path adjustable self-excited multivibrator |
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