CN106711058A - Method for reducing warping of silicon wafer in epitaxial machine - Google Patents

Method for reducing warping of silicon wafer in epitaxial machine Download PDF

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Publication number
CN106711058A
CN106711058A CN201611216894.3A CN201611216894A CN106711058A CN 106711058 A CN106711058 A CN 106711058A CN 201611216894 A CN201611216894 A CN 201611216894A CN 106711058 A CN106711058 A CN 106711058A
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temperature
machine platform
thickness
epitaxy machine
substrate film
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陈海波
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WAFER WORKS EPITAXIAL CORP
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WAFER WORKS EPITAXIAL CORP
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Priority to CN201611216894.3A priority Critical patent/CN106711058A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67248Temperature monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

The invention relates to a method for reducing warping of a silicon wafer in an epitaxial machine. The method is characterized in that distribution of temperature in an epitaxial machine cavity can be obtained according to thickness distribution of a polycrystalline layer; if the thicknesses of all points are consistent, the temperature at any place in the cavity is same; if the thicknesses of the points are inconsistent, the larger the thickness of the polycrystalline layer is, the higher the temperature at the place in the epitaxial machine cavity is; the smaller the thickness of the polycrystalline layer is, the lower the temperature at the place in the epitaxial machine cavity is; when the thickness of the polycrystalline layer at some detection point is inconsistent with the thickness of the polycrystalline layer grew at the circle center position, the temperature of the detection point is adjusted; and after the temperature is adjusted, the epitaxial machine is applied to epitaxial wafer production. According to the method, the temperature in the epitaxial machine cavity can be adjusted; and the proportion of scratch due to base plate edge warping before adjustment of temperature uniformity is 0.4%, and the proportion of scratch due to base plate edge warping after adjustment of temperature uniformity is 0.01%.

Description

Reduce silicon chip and be put into epitaxy machine platform the method for producing warpage
Technical field
The method for producing warpage is put into epitaxy machine platform the present invention relates to reduce silicon chip.
Background technology
Silicon chip is in normal temperature state before entering process cavity, and silicon is drawn from silicon chip top by mechanical arm (including Wand) After piece enters 800 DEG C of -900 DEG C of epitaxy machine platform cavitys, it is placed in susceptor tray, then mechanical arm is exited.Silicon chip due to The drastically change of temperature, edge can be upturned, so that meeting grazing causes edge to the mechanical arm for not leaving cavity also now Scratch.
The content of the invention
An object of the present invention is to overcome deficiency of the prior art, there is provided one kind reduces silicon chip and is put into extension machine The method that warpage is produced in platform.
To realize object above, the present invention is achieved through the following technical solutions:
Reduce silicon chip and be put into epitaxy machine platform the method for producing warpage, it is characterised in that including step,
A, one substrate film of offer;
B, substrate film is put into epitaxy machine platform, one layer of polycrystal layer is grown on substrate film;In grown on substrates polycrystal layer, The growth temperature of polycrystal layer is 600 DEG C -950 DEG C, and in polycrystal layer growth course, substrate film does not rotate;
After the completion of C, polycrystal layer growth, the thickness distribution of polycrystal layer is determined, the thickness distribution according to polycrystal layer can go out Prolong the Temperature Distribution in board cavity;Such as each point consistency of thickness, then the temperature in cavity everywhere is identical;If each point variable thickness Cause, then polycrystal layer thickness is thicker, correspondingly the temperature in epitaxy machine platform cavity at this is higher;Polycrystal layer thickness is thinner, then correspond to outer The temperature prolonged in board cavity at this is lower;
The polycrystal layer variable thickness of polycrystal layer thickness and the home position growth of D, such as some test point is caused, then adjustment should The temperature of test point;
After E, adjustment temperature, then epitaxy machine platform is used to produce epitaxial wafer.
Embodiments in accordance with the present invention, epitaxy machine platform cavity inner temperature uniformity extension for substrate film is positioned over The uniformity being heated after in board cavity.
Embodiments in accordance with the present invention, epitaxy machine platform cavity inner temperature uniformity be epitaxy machine platform cavity in 600 DEG C- 950 DEG C of temperature homogeneities in interval.
Embodiments in accordance with the present invention, in the step C, using trichlorosilane polycrystal layer long, growth temperature is 800 DEG C- 900℃;Or silane polycrystal layer long is used, growth temperature is 600 DEG C -700 DEG C, or uses dichlorosilane polycrystal layer long, Growth temperature is 700 DEG C -800 DEG C.
Embodiments in accordance with the present invention, the substrate film is boron-doping monocrystalline polished silicon wafer, and resistivity is 5-100ohm.cm.
Embodiments in accordance with the present invention, in the step A, make one layer of back cover layer of the substrate film Surface Creation, the envelope Underlayer thickness is 800-1200 angstroms.
Embodiments in accordance with the present invention, the cryogenic oxygen that the back cover layer grows for monocrystalline polished silicon wafer in oxygen atmosphere Change layer.
Embodiments in accordance with the present invention, in the step A, one layer of inculating crystal layer are grown on back cover layer;The step B In, the polycrystal layer is grown on the inculating crystal layer.
Embodiments in accordance with the present invention, envelope underlayer thickness is 800-1200 angstroms;200-500 angstroms of inculating crystal layer thickness.
Embodiments in accordance with the present invention, choose multiple points and detect its thickness with polycrystalline layer surface.
Embodiments in accordance with the present invention, centered on the circular substrate film center of circle, are uniformly distributed the multiple points of selection and detect it Thickness.
Embodiments in accordance with the present invention, choose one or more of front end, the center of circle, left side, right side and the rear end of substrate film Point determines its thickness;And judge that the temperature in epitaxy machine platform cavity is equal according to the thickness of front end, center, left side, right side and rear end Even property.
Embodiments in accordance with the present invention, with perpendicular to a diameter of boundary of the circular substrate piece in gas inlet direction, gas Not crossing the polycrystal layer thickness of the position on the substrate film before the diameter is used to judge the temperature that epitaxy machine platform cavity is anterior;Position It is used to judge the temperature of epitaxy machine platform cavity sidepiece in the position of the center of circle both sides diametrically;Gas is crossed after the diameter The polycrystal layer thickness of the position on substrate film is used to judge the temperature of epitaxy machine platform tail of cavity body.
Embodiments in accordance with the present invention, using substrate film circle centre position growth polycrystal layer thickness as standard value, by each position The polycrystal layer thickness of growth is contrasted with standard value, such as consistent, then judge that temperature is uniform, such as inconsistent, then judge non-uniform temperature.
Embodiments in accordance with the present invention, the epitaxy machine platform cavity includes front portion, left side, right side and afterbody;Afterbody The temperature adjustment number of degrees be the polycrystal layer that (R-C)/25, R is the growth of substrate film back-end location thickness, C represents the substrate film center of circle The polycrystal layer thickness of position growth, total represents that needs are reduced on the basis of setting value for "+", and total represents that needs exist for "-" Increase on the basis of former setting value;Left side is with the right side offset adjustment number of degrees【(SIt is left+SIt is right)/2-C】/ 25, SIt is leftAnd SIt is rightRespectively It is the polycrystal layer thickness that substrate film leftward position and right positions grow, C represents the polycrystalline thickness of substrate film home position growth Degree, total represents that needs are reduced on the basis of former setting value for "+", and total represents that needs increase on the basis of former setting value for "-" Plus;Anterior offset adjusts the number of degrees:(F-C)/25, wherein F represents the polycrystal layer thickness of substrate film front position growth;C The polycrystal layer thickness of substrate film home position growth is represented, total represents that needs are reduced on the basis of former setting value for "+", total For "-" represents that needs increase on the basis of former setting value.
Embodiments in accordance with the present invention, after the temperature homogeneity in adjustment epitaxy machine platform cavity, are clapped using high-temperature camera Deformation quantity when on the pedestal that silicon chip is put into epitaxy machine platform cavity is taken the photograph, according to the deformation quantity of the graphical analysis silicon chip for shooting, is adjusted Thermocouple power output near the larger position of shaping variable.
Embodiments in accordance with the present invention, the temperature in epitaxy machine platform cavity is 800 DEG C -900 DEG C.
Heated by thermocouple in embodiments in accordance with the present invention, the board cavity, such as the polycrystalline of some test point Thickness degree is caused with the polycrystal layer variable thickness grown with home position, then adjust the corresponding thermocouple power output of the test point.
As shown in figure 1, arrow is the gas inlet direction in epitaxy machine platform cavity, with perpendicular to the circle in gas inlet direction The diameter 12 of shape substrate film 10 is boundary, and the position that gas does not cross on the substrate film 10 before the diameter 12 is front position; The leftward position of the center of circle 11 and right positions on the diameter 12;Gas crosses the position on the substrate film 10 after the diameter 12 It is set to back-end location.It is divided into front portion, left side, right side and afterbody in epitaxy machine platform cavity, and is respectively provided with above position There is thermocouple.The front position that anterior thermocouple is mainly substrate film provides heat to grow polycrystal layer.Left side thermocouple master To there is provided heat to grow polycrystal layer for the leftward position of substrate film.The right positions that right side thermocouple is mainly substrate film are carried Heating load is growing polycrystal layer.The back-end location that afterbody thermocouple is mainly substrate film provides heat to grow polycrystal layer.Substrate Piece is positioned on pedestal within the cavity, and pedestal heating provides heat for substrate film growth polycrystal layer.
Inventor it has been investigated that, the edge warping of epitaxial wafer mainly due to 700 DEG C -950 DEG C, especially 800 DEG C - It is heated during film releasing at a temperature of 900 DEG C uneven caused.Therefore the temperature homogeneity in the epitaxy machine platform cavity of the temperature range It is most important.
The bulk temperature of epitaxy machine platform is controlled by the center thermocouple immediately below pedestal, and remaining also has anterior thermoelectricity Even, left side thermocouple, right side thermocouple and afterbody thermocouple provide heat, and anterior cavity, sidepiece and afterbody are controlled respectively Temperature Distribution.Before operation, the thermocouple at each position presets working value.In some cases, one can be also set Fixed offset, with the setting working value before amendment.
Temperature in epitaxial process is generally 1100 DEG C -1180 DEG C, in epitaxy machine platform cavity in this temperature range The monitoring temperature of each point is mainly realized by ion implanting piece.But during piece is picked and placeed, the temperature in epitaxy machine platform cavity is DEG C -900 DEG C of intervals of 600 DEG C -950 DEG C, especially 800, are the blind spots of monitoring in this temperature range.But due in this temperature range Interior film releasing, such as it cannot be guaranteed that herein interval in temperature homogeneity, then easily cause substrate film edge warping.Picking and placeing piece process In, such as substrate film edge warping, then mechanical arm in the process of walking can scratch substrate film, cause final production epitaxial wafer draw Wound, reduces the qualification rate of epitaxial wafer.
During present invention utilizes growing polycrystal layer in 700 DEG C of -950 DEG C of temperature ranges, reaction rate is in temperature control Rather than flow control region, therefore Temperature Distribution of the silicon chip in the temperature range can be corresponded to by the thickness distribution of polycrystal layer, from And whether uniformly judge whether the temperature in epitaxy machine platform cavity is uniform using the thickness distribution of polycrystal layer, base is can determine whether whereby Whether plate being heated in epitaxy machine platform be uniform.The difference of polycrystal layer thickness and standard value according to each test position, can Temperature Distribution in adjustment epitaxy machine platform cavity.And be directed to the substrate of different size, then can be from silicon chip transmission cavity window or from peace The high-temperature camera observation deformation quantity of dress, then each regional temperature uniformity is finely adjusted, reach silicon chip and be heated evenly, silicon chip side Edge is contactless with arm, reaches the purpose without crimping scratch.
Brief description of the drawings
Fig. 1 is the test position schematic diagram that the present invention chooses.
The surface defect optics of the epitaxial wafer that Fig. 2 is produced before not adjusted for the epitaxy machine platform cavity inner temperature in embodiment 1 Scanning figure.
Fig. 3 sweeps for the surface defect optics of the epitaxial wafer produced after the epitaxy machine platform cavity inner temperature adjustment in embodiment 1 Tracing.
The surface defect optics of the epitaxial wafer that Fig. 4 is produced before not adjusted for the epitaxy machine platform cavity inner temperature in embodiment 2 Scanning figure.
Fig. 5 sweeps for the surface defect optics of the epitaxial wafer produced after the epitaxy machine platform cavity inner temperature adjustment in embodiment 2 Tracing.
Specific embodiment
The present invention is described in detail with reference to embodiment and accompanying drawing:
The method for determining epitaxy machine platform cavity inner temperature uniformity, the epitaxy machine platform cavity inner temperature uniformity is substrate The uniformity that piece is heated after being positioned in the epitaxy machine platform cavity.According to a preferred embodiment of the invention, the present invention especially For determining in epitaxy machine platform cavity in 600 DEG C of temperature homogeneities in -950 DEG C of intervals.It is particularly suited in epitaxy machine platform cavity In 800 DEG C of temperature homogeneities in -900 DEG C of intervals.
Method of the present invention includes step,
A, one substrate film of offer;The substrate film is boron-doping monocrystalline polished silicon wafer, and resistivity is 5-100ohm.cm, makes its table Face first grows one layer of back cover layer.According to a preferred embodiment of the invention, one layer of inculating crystal layer can also be grown on back cover layer, it is described Inculating crystal layer is polycrystal layer.200-500 angstroms of inculating crystal layer thickness.
B, substrate film is put into epitaxy machine platform, one layer of polycrystal layer is grown on inculating crystal layer;The back cover layer is using list The low temperature oxide layer that brilliant polished silicon wafer grows in oxygen atmosphere, envelope underlayer thickness is 800-1200 angstroms.In the inculating crystal layer Upper growth polycrystal layer, the growth temperature of polycrystal layer is 600 DEG C -950 DEG C, and in polycrystal layer growth course, substrate film does not rotate;It is described In step C, using trichlorosilane polycrystal layer long, growth temperature is 800 DEG C -900 DEG C;Or use silane polycrystal layer long, growth Temperature is 600 DEG C -700 DEG C, or uses dichlorosilane polycrystal layer long, and growth temperature is 700 DEG C -800 DEG C.Skill in the art Art personnel are appreciated that according to practical condition, can be adjusted in each temperature range more than, can grow polycrystalline Layer.
After the completion of C, polycrystal layer growth, the thickness distribution of polycrystal layer is determined, the thickness distribution according to polycrystal layer can go out Prolong the Temperature Distribution in board cavity;Such as each point consistency of thickness, then the temperature in cavity everywhere is identical;If each point variable thickness Cause, then polycrystal layer thickness is thicker, correspondingly the temperature in epitaxy machine platform cavity at this is higher;Polycrystal layer thickness is thinner, then correspond to outer The temperature prolonged in board cavity at this is lower.
Multiple points are chosen with polycrystalline layer surface and detects its thickness.According to a preferred embodiment of the invention, with circular substrate Centered on the piece center of circle, it is uniformly distributed the multiple points of selection and detects its thickness.Choose the front end of substrate film, the center of circle, left side, right side and after The one or more points at end determines its thickness;And epitaxy machine platform is judged according to the thickness of front end, center, left side, right side and rear end Temperature homogeneity in cavity.It is as shown in Figure 1 a specific embodiment, arrow is the gas inlet side in epitaxy machine platform cavity To, with perpendicular to the diameter 12 of the circular substrate piece 10 in gas inlet direction for boundary, before gas does not cross the diameter 12 Position on substrate film 10 is front position, and the polycrystal layer thickness of front position is used to judge the temperature that epitaxy machine platform cavity is anterior Degree;The leftward position of the center of circle 11 and right positions on the diameter 12 are respectively used to judge epitaxy machine platform cavity left side and the right side The temperature of sidepiece;The position that gas crosses on the substrate film 10 after the diameter 12 is back-end location, the polycrystal layer of back-end location Thickness is used to judge the temperature of epitaxy machine platform tail of cavity body.In example as depicted, the present invention chooses and determines two front ends The thickness of location point 16, two thickness of leftward position point 13, two thickness of right positions point 14, two back-end location points 15 Thickness.
Heated by thermocouple in epitaxy machine platform cavity, determine whether the temperature in epitaxy machine platform is equal according to foregoing method It is even, it is such as uniform, then need not adjust the power of thermocouple;Such as the polycrystal layer thickness and the polycrystal layer thickness of other positions of a certain position It is identical, then adjust the thermocouple working effect at the corresponding epitaxy machine platform cavity in the position.
The present invention using substrate film home position grow polycrystal layer thickness as standard value, then by many of other test points Crystal layer thickness and standard value are contrasted, such as consistent, then judge that temperature is suitable at this, to should position thermocouple work without adjusting It is whole;It is such as inconsistent, then judge that temperature is improper at this, then the corresponding thermocouple in position at this is adjusted, reduce or increase at this Temperature.
Heretofore described thickness, its unit is angstrom, and numerical value is only substituted into each computing formula, does not substitute into unit.
Illustrated as a example by below using the polycrystal layer thickness of substrate film home position growth as standard value, and according to other positions The polycrystal layer thickness difference of polycrystal layer thickness and home position calculate to should test position thermocouple the adjustment temperature number of degrees.
Embodiments in accordance with the present invention, the epitaxy machine platform cavity includes front portion, left side, right side and afterbody;Afterbody The temperature adjustment number of degrees be the polycrystal layer that (R-C)/25, R is the growth of substrate film back-end location thickness, C represents the substrate film center of circle The polycrystal layer thickness of position growth, total represents that needs are reduced on the basis of setting value for "+", and total represents that needs exist for "-" Increase on the basis of former setting value;Left side is with the right side offset adjustment number of degrees【(SIt is left+SIt is right)/2-C】/ 25, SIt is leftAnd SIt is rightRespectively It is the polycrystal layer thickness that substrate film leftward position and right positions grow, C represents the polycrystalline thickness of substrate film home position growth Degree, total represents that needs are reduced on the basis of former setting value for "+", and total represents that needs increase on the basis of former setting value for "-" Plus;Anterior offset adjusts the number of degrees:(F-C)/25, wherein F represents the polycrystal layer thickness of substrate film front position growth;C The polycrystal layer thickness of substrate film home position growth is represented, total represents that needs are reduced on the basis of former setting value for "+", total For "-" represents that needs increase on the basis of former setting value.
Embodiment 1
Method of the present invention includes step,
A, one substrate film of offer;The substrate film is boron-doping monocrystalline polished silicon wafer, and resistivity is 5-100ohm.cm, makes its table Face first generates one layer of back cover layer;The back cover layer is the low-temperature oxidation grown in oxygen atmosphere using monocrystalline polished silicon wafer Layer, then grow one layer of inculating crystal layer on back cover layer.According to a preferred embodiment of the invention, the inculating crystal layer is polycrystal layer.Seed crystal 500 angstroms of thickness degree.
B, substrate film is put into epitaxy machine platform, one layer of polycrystal layer is grown on inculating crystal layer;Envelope underlayer thickness is 1000 angstroms. Polycrystal layer is grown on inculating crystal layer, in polycrystal layer growth course, substrate film does not rotate;It is long using trichlorosilane in the step C Polycrystal layer, growth temperature is 900 DEG C.
After the completion of C, polycrystal layer growth, the thickness of each position polycrystal layer is determined.And according to the polycrystalline thickness of each test position The offset of the mathematic interpolation thermocouple of degree and home position polycrystal layer thickness.
Table 1 is the calculated examples that cavity inner temperature uniformity is adjusted using the inventive method.
Table 1
Embodiment 2
Method of the present invention includes step,
A, one substrate film of offer;The substrate film is boron-doping monocrystalline polished silicon wafer, and resistivity is 5-100ohm.cm, makes its table First generate one layer of back cover layer.According to a preferred embodiment of the invention, one layer of inculating crystal layer, the seed can also be grown on back cover layer Crystal layer is polycrystal layer.400 angstroms of inculating crystal layer thickness.
B, substrate film is put into epitaxy machine platform, one layer of polycrystal layer is grown on inculating crystal layer;The back cover layer is using list The low temperature oxide layer that brilliant polished silicon wafer grows in oxygen atmosphere, envelope underlayer thickness is 1100 angstroms.Grown on inculating crystal layer many Crystal layer, in polycrystal layer growth course, substrate film does not rotate;In the step C, using dichlorosilane polycrystal layer long, growth temperature Spend is 800 DEG C.
After the completion of C, polycrystal layer growth, the thickness of each position polycrystal layer is determined.And according to the polycrystalline thickness of each test position The offset of the mathematic interpolation thermocouple of degree and home position polycrystal layer thickness.
Table 2 is the calculated examples that cavity inner temperature uniformity is adjusted using the inventive method.
Table 2
Inventor selects specific numerical value through experiment discovery in above listed each technological parameter number range, To realize the object of the invention.
The present invention adjusts the temperature homogeneity in epitaxy machine platform cavity according to above method, reduces silicon chip with this and is put into extension Warpage is produced in board.Adjustment epitaxy machine platform cavity inner temperature uniformity is determined according to preceding method, according to the chamber that detection is obtained Temperature in internal temperature homogeneity adjustment epitaxy machine platform cavity, is heated evenly silicon chip.
Embodiments in accordance with the present invention, after the temperature homogeneity in adjustment epitaxy machine platform cavity, are clapped using high-temperature camera Deformation quantity when on the pedestal that silicon chip is put into epitaxy machine platform cavity is taken the photograph, according to the deformation quantity of the graphical analysis silicon chip for shooting, is adjusted Thermocouple power output near the larger position of shaping variable.
The working condition of Fig. 2 and Fig. 3 is in addition to whether the temperature homogeneity in cavity adjusts, and remaining condition is identical.Fig. 2 is The view of epitaxial wafer 20 produced before adjustment cavity inner temperature uniformity, it can be seen that it has obvious scuffing area Domain 21.Fig. 3 is the view of epitaxial wafer 20 generated after data point reuse cavity inner temperature uniformity according to embodiment, can from figure To find out, it does not exist obvious scuffing.
The working condition of Fig. 4 and Fig. 5 is in addition to whether the temperature homogeneity in cavity adjusts, and remaining condition is identical.Fig. 4 is The view of epitaxial wafer 20 produced before adjustment cavity inner temperature uniformity, it can be seen that it has obvious scuffing area Domain 22.Fig. 5 is the view of epitaxial wafer 20 generated after data point reuse cavity inner temperature uniformity according to embodiment, can from figure To find out, it does not exist obvious scuffing.
After adjusting the temperature in epitaxy machine platform cavity according to the inventive method, because substrate edges stick up before adjustment temperature homogeneity The ratio that Qu Zaocheng is scratched is 0.4%, and the ratio scratched caused by substrate edges warpage after adjustment temperature homogeneity is 0.01%.
Embodiment in the present invention is only used for that the present invention will be described, does not constitute the limitation to right, Other substantially equivalent replacements that those skilled in that art are contemplated that, all fall in the scope of protection of the present invention.

Claims (18)

1. reduce silicon chip and be put into epitaxy machine platform the method for producing warpage, it is characterised in that including step,
A, one substrate film of offer;
B, substrate film is put into epitaxy machine platform, one layer of polycrystal layer is grown on substrate film;In grown on substrates polycrystal layer, polycrystalline The growth temperature of layer is 600 DEG C -950 DEG C, and in polycrystal layer growth course, substrate film does not rotate;
After the completion of C, polycrystal layer growth, the thickness distribution of polycrystal layer is determined, the thickness distribution according to polycrystal layer can draw extension machine Temperature Distribution in platform cavity;Such as each point consistency of thickness, then the temperature in cavity everywhere is identical;If each point variable thickness is caused, Polycrystal layer thickness is thicker, and correspondingly the temperature in epitaxy machine platform cavity at this is higher;Polycrystal layer thickness is thinner, then correspond to epitaxy machine platform Temperature in cavity at this is lower;
The polycrystal layer variable thickness of polycrystal layer thickness and the home position growth of D, such as some test point is caused, then adjust the detection The temperature of point;
After E, adjustment temperature, then epitaxy machine platform is used to produce epitaxial wafer.
2. the silicon chip that reduces according to claim 1 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described Epitaxy machine platform cavity inner temperature uniformity is the uniformity being heated after in substrate film the is positioned over epitaxy machine platform cavity.
3. the silicon chip that reduces according to claim 1 is put into epitaxy machine platform the method for producing warpage, it is characterised in that extension Board cavity inner temperature uniformity is in 600 DEG C of temperature homogeneities in -950 DEG C of intervals in epitaxy machine platform cavity.
4. the silicon chip that reduces according to claim 1 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described In step C, using trichlorosilane polycrystal layer long, growth temperature is 800 DEG C -900 DEG C;Or use silane polycrystal layer long, growth Temperature is 600 DEG C -700 DEG C, or uses dichlorosilane polycrystal layer long, and growth temperature is 700 DEG C -800 DEG C.
5. the silicon chip that reduces according to claim 1 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described Substrate film is boron-doping monocrystalline polished silicon wafer, and resistivity is 5-100ohm.cm.
6. the silicon chip that reduces according to claim 5 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described In step A, make one layer of back cover layer of the substrate film Surface Creation, the envelope underlayer thickness is 800-1200 angstroms.
7. the silicon chip that reduces according to claim 6 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described The low temperature oxide layer that back cover layer grows for monocrystalline polished silicon wafer in oxygen atmosphere.
8. the silicon chip that reduces according to claim 6 is put into epitaxy machine platform the method for producing warpage, it is characterised in that described In step A, one layer of inculating crystal layer is grown on back cover layer;In the step B, the polycrystalline is grown on the inculating crystal layer Layer.
9. the silicon chip that reduces according to claim 8 is put into epitaxy machine platform the method for producing warpage, it is characterised in that back cover Thickness degree is 800-1200 angstroms;200-500 angstroms of inculating crystal layer thickness.
10. the silicon chip that reduces according to claim 1 is put into epitaxy machine platform the method for producing warpage, it is characterised in that with Polycrystalline layer surface chooses multiple points and detects its thickness.
11. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that with Centered on the circular substrate film center of circle, it is uniformly distributed the multiple points of selection and detects its thickness.
12. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that choosing The one or more points for taking front end, the center of circle, left side, right side and the rear end of substrate film determines its thickness;And according to front end, center, The thickness of left side, right side and rear end judges the temperature homogeneity in epitaxy machine platform cavity.
13. silicon chips that reduce according to claim 12 are put into epitaxy machine platform the method for producing warpage, it is characterised in that with Perpendicular to a diameter of boundary of the circular substrate piece in gas inlet direction, gas does not cross the position on the substrate film before the diameter The polycrystal layer thickness put is used to judge the temperature that epitaxy machine platform cavity is anterior;Position positioned at the center of circle both sides diametrically is used for Judge the temperature of epitaxy machine platform cavity sidepiece;The polycrystal layer thickness that gas crosses the position on the substrate film after the diameter is used for Judge the temperature of epitaxy machine platform tail of cavity body.
14. silicon chips that reduce according to claim 13 are put into epitaxy machine platform the method for producing warpage, it is characterised in that with The polycrystal layer thickness of substrate film circle centre position growth is contrasted as standard value, the polycrystal layer thickness that each position is grown with standard value, As unanimously, then judged, temperature is uniform, such as inconsistent, then judge non-uniform temperature.
15. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that institute Stating epitaxy machine platform cavity includes front portion, left side, right side and afterbody;The temperature adjustment number of degrees of afterbody are base for (R-C)/25, R The thickness of the polycrystal layer of plate back-end location growth, C represents the polycrystal layer thickness of substrate film home position growth, and total is "+" Representing needs to be reduced on the basis of setting value, and total represents that needs increase on the basis of former setting value for "-";Left side and right side Portion's offset adjusts the number of degrees【(SIt is left+SIt is right)/2-C】/ 25, SIt is leftAnd SIt is rightRespectively substrate film leftward position and right positions grow Polycrystal layer thickness, C represents the polycrystal layer thickness of substrate film home position growth, and total represents needs in former setting value base for "+" Reduced on plinth, total represents that needs increase on the basis of former setting value for "-";Anterior offset adjusts the number of degrees:(F-C)/ 25, wherein F represent the polycrystal layer thickness of substrate film front position growth;C represents the polycrystalline thickness of substrate film home position growth Degree, total represents that needs are reduced on the basis of former setting value for "+", and total represents that needs increase on the basis of former setting value for "-" Plus.
16. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that adjust After temperature homogeneity in whole epitaxy machine platform cavity, the pedestal that silicon chip is put into epitaxy machine platform cavity is shot using high-temperature camera Deformation quantity when upper, according to the deformation quantity of the graphical analysis silicon chip for shooting, the thermocouple near the larger position of adjustment deformation quantity is defeated Go out power.
17. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that outward It is 800 DEG C -900 DEG C to prolong the temperature in board cavity.
18. silicon chips that reduce according to claim 1 are put into epitaxy machine platform the method for producing warpage, it is characterised in that institute State in board cavity and heated by thermocouple, such as the polycrystal layer thickness of some test point and the polycrystal layer grown with home position Variable thickness is caused, then adjust the corresponding thermocouple power output of the test point.
CN201611216894.3A 2016-12-26 2016-12-26 Method for reducing warping of silicon wafer in epitaxial machine Pending CN106711058A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108040110A (en) * 2017-12-11 2018-05-15 国网宁夏电力有限公司信息通信公司 A kind of mobile data safety means of defence based on security sandbox
CN112947634A (en) * 2021-02-01 2021-06-11 泉芯集成电路制造(济南)有限公司 Hot plate temperature adjusting method and hot plate device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060126701A1 (en) * 2002-10-30 2006-06-15 Matsushita Electric Industrial Co., Ltd. Method of estimating substrate temperature
US20120012047A1 (en) * 2010-07-14 2012-01-19 Taiwan Semiconductor Manufacturing Co., Ltd. Method of temperature determination for deposition reactors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060126701A1 (en) * 2002-10-30 2006-06-15 Matsushita Electric Industrial Co., Ltd. Method of estimating substrate temperature
US20120012047A1 (en) * 2010-07-14 2012-01-19 Taiwan Semiconductor Manufacturing Co., Ltd. Method of temperature determination for deposition reactors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108040110A (en) * 2017-12-11 2018-05-15 国网宁夏电力有限公司信息通信公司 A kind of mobile data safety means of defence based on security sandbox
CN108040110B (en) * 2017-12-11 2020-10-27 国网宁夏电力有限公司信息通信公司 Mobile data security protection method based on security sandbox
CN112947634A (en) * 2021-02-01 2021-06-11 泉芯集成电路制造(济南)有限公司 Hot plate temperature adjusting method and hot plate device

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