CN106687937B - 用于压缩算法的高速缓冲存储体扩展 - Google Patents

用于压缩算法的高速缓冲存储体扩展 Download PDF

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CN106687937B
CN106687937B CN201580048563.0A CN201580048563A CN106687937B CN 106687937 B CN106687937 B CN 106687937B CN 201580048563 A CN201580048563 A CN 201580048563A CN 106687937 B CN106687937 B CN 106687937B
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cache
bank
access request
compressed data
extension
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Chinese (zh)
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CN106687937A (zh
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G·帕奇拉腊斯
A·E·特纳
B·雷赫利克
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0851—Cache with interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0886—Variable-length word access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G06F2212/1044—Space efficiency improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN201580048563.0A 2014-09-11 2015-07-23 用于压缩算法的高速缓冲存储体扩展 Active CN106687937B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/483,902 US9355038B2 (en) 2014-09-11 2014-09-11 Cache bank spreading for compression algorithms
US14/483,902 2014-09-11
PCT/US2015/041781 WO2016039866A1 (en) 2014-09-11 2015-07-23 Cache bank spreading for compression algorithms

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CN106687937A CN106687937A (zh) 2017-05-17
CN106687937B true CN106687937B (zh) 2020-06-23

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Country Link
US (1) US9355038B2 (https=)
EP (1) EP3191967B1 (https=)
JP (1) JP2017532657A (https=)
KR (1) KR20170053630A (https=)
CN (1) CN106687937B (https=)
WO (1) WO2016039866A1 (https=)

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US9514047B2 (en) * 2014-12-17 2016-12-06 Intel Corporation Apparatus and method to dynamically expand associativity of a cache memory
US10191850B2 (en) 2016-03-31 2019-01-29 Qualcomm Incorporated Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit (CPU)-based system
US10176090B2 (en) 2016-09-15 2019-01-08 Qualcomm Incorporated Providing memory bandwidth compression using adaptive compression in central processing unit (CPU)-based systems
US10445261B2 (en) 2016-12-30 2019-10-15 Intel Corporation System memory having point-to-point link that transports compressed traffic
US10503652B2 (en) * 2017-04-01 2019-12-10 Intel Corporation Sector cache for compression
US10609172B1 (en) 2017-04-27 2020-03-31 Chicago Mercantile Exchange Inc. Adaptive compression of stored data
US12105716B2 (en) * 2017-06-23 2024-10-01 Xilinx, Inc. Parallel compute offload to database accelerator
US11048419B2 (en) * 2019-01-30 2021-06-29 EMC IP Holding Company LLC Adaptively over-allocating storage space for compressed data

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CN1217505A (zh) * 1997-11-06 1999-05-26 中国科学院计算技术研究所 高速缓冲存储器系统中的地址映射变换技术与装置
CN1952911A (zh) * 2005-10-21 2007-04-25 英特尔公司 实现矢量存储器操作
US7266651B1 (en) * 2004-09-07 2007-09-04 Sun Microsystems, Inc. Method for in-place memory interleaving and de-interleaving
CN102129873A (zh) * 2011-03-29 2011-07-20 西安交通大学 提高计算机末级高速缓存可靠性的数据压缩装置及其方法
US7996597B1 (en) * 2007-04-16 2011-08-09 Juniper Networks, Inc. Mapping address bits to improve spread of banks
CN103546158A (zh) * 2012-04-04 2014-01-29 英特尔公司 压缩深度高速缓存

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US6115787A (en) * 1996-11-05 2000-09-05 Hitachi, Ltd. Disc storage system having cache memory which stores compressed data
JPH10232838A (ja) * 1996-11-05 1998-09-02 Hitachi Ltd ディスク記憶システム
IL150556A0 (en) 2000-01-03 2003-02-12 Efeckta Technologies Corp Efficient and lossless conversion for transmission or storage of data
US6307790B1 (en) * 2000-08-30 2001-10-23 Micron Technology, Inc. Read compression in a memory
US6820182B1 (en) * 2000-10-18 2004-11-16 International Business Machines Corporation Support for exhaustion recovery in a data processing system with memory mirroring
US8443162B2 (en) * 2005-01-21 2013-05-14 Qualcomm Incorporated Methods and apparatus for dynamically managing banked memory
US7705753B2 (en) 2005-10-22 2010-04-27 Sytex, Inc. Methods, systems and computer-readable media for compressing data
JP4653830B2 (ja) * 2008-09-19 2011-03-16 株式会社東芝 命令キャッシュシステム
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US7266651B1 (en) * 2004-09-07 2007-09-04 Sun Microsystems, Inc. Method for in-place memory interleaving and de-interleaving
CN1952911A (zh) * 2005-10-21 2007-04-25 英特尔公司 实现矢量存储器操作
US7996597B1 (en) * 2007-04-16 2011-08-09 Juniper Networks, Inc. Mapping address bits to improve spread of banks
CN102129873A (zh) * 2011-03-29 2011-07-20 西安交通大学 提高计算机末级高速缓存可靠性的数据压缩装置及其方法
CN103546158A (zh) * 2012-04-04 2014-01-29 英特尔公司 压缩深度高速缓存

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Also Published As

Publication number Publication date
CN106687937A (zh) 2017-05-17
WO2016039866A1 (en) 2016-03-17
EP3191967A1 (en) 2017-07-19
JP2017532657A (ja) 2017-11-02
US9355038B2 (en) 2016-05-31
EP3191967B1 (en) 2018-12-26
KR20170053630A (ko) 2017-05-16
US20160077973A1 (en) 2016-03-17

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