CN106684515A - Silicon-based inverted microstrip line structure and manufacturing method therefor - Google Patents
Silicon-based inverted microstrip line structure and manufacturing method therefor Download PDFInfo
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- CN106684515A CN106684515A CN201611185444.2A CN201611185444A CN106684515A CN 106684515 A CN106684515 A CN 106684515A CN 201611185444 A CN201611185444 A CN 201611185444A CN 106684515 A CN106684515 A CN 106684515A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
- H01P3/081—Microstriplines
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- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
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Abstract
The invention discloses a silicon-based inverted microstrip line structure and a manufacturing method therefor, and mainly solves the problems of high loss and low processing precision in millimeter wave and submillimeter wave transmission by a standard microstrip line and a conventional inverted microstrip line. The silicon-based inverted microstrip line structure comprises a microstrip line, a suspension layer, a silicon substrate, a cavity and a metal grounding layer, wherein the silicon substrate comprises an upper silicon substrate and a lower silicon substrate; and inverted layer is positioned on the upper surface of the upper silicon substrate; the microstrip line comprises a lower metal layer and an upper metal layer; the upper metal layer is fixed in the inverted layer; the lower metal layer is prepared on the lower surface of the upper metal layer and exposed in the cavity; the cavity is formed in the upper silicon substrate in an etching manner, positioned below the microstrip line and suspends the microstrip line; and the metal grounding layer is positioned below the cavity and embedded between the upper silicon substrate and the lower silicon substrate. The manufacturing method is high in processing precision, and a low-loss and simple-manufacturing millimeter wave transmission line structure is realized.
Description
Technical field
The invention belongs to microelectromechanical systems field, and in particular to a kind of silicon substrate is inverted microstrip line construction and its making side
Method.
Background technology
MEMS (MEMS) grows up on the basis of microelectric technique, is usually used in processing fine knot
Structure, to realize anisotropic etching.MEMS technology, as substrate, is prepared generally using silicon chip or SOI using microelectric technique
Asia μm precision mask carry out the size of explication figure, the high aspect ratio of body structure is realized using special mask.It is logical
The deep etching method for often using includes dry etching and the class of wet etching two, wherein, dry etching is typically not dependent on crystal orientation, but
The complexity of processing is high, need to support the use the etching apparatus of costliness；Wet etching is then using the different crystal orientations in crystal to etching
The sensitivity of speed realizes anisotropic etching.Negative glue used in MEMS deep etchings, such as SU8 has knot after exposure curing
Structure is strong, good airproof performance the features such as, you can for use as etching barrier layer, it is also possible to as supporting medium layer.Now MEMS technology is tied
Close microwave microelectric technique has become study hotspot.Microwave millimeter circuit generally adopts standard microstrip, however as work frequency
The continuous improvement of rate, its loss and dispersion can become highly significant.Therefore people improve the structure of microstrip line, it is proposed that be inverted
Microstrip line construction.It is a kind of special transmission line structure using air as microstrip line medium to be inverted microstrip line, with the low, color of loss
The advantages of dissipating big little, frequency band range and preparation process is simple.It is commonly used for developing frequency mixer, filter in microwave and millimeter wave circuit
Ripple device etc. is active and passive circuit.Therefore it is inverted microstrip line to have great application prospect in high band millimeter wave.
However, because tradition is inverted the inversion layer that microstrip line has thicker dielectric substrate as fixed microstrip line, passing
During defeated millimeter wave sub-millimetre electromagnetic energy, dielectric substrate can bring significant dielectric loss, and so as to limit microstrip line is inverted
Use range.In addition tradition is inverted microstrip line and also needs to can as metallic enclosure, and cost is high, and volume is big, and quality is big, essence
Degree is low, and undersized standard microstrip line structure difficulty or ease realize that high accuracy is processed.Tradition is inverted microstrip line and typically adopts microwave
The materials such as plate, plastics, ceramics are difficult to process straticulation supporting construction, modeling as the dielectric substrate for fixing microstrip line, but microwave board
Material, ceramics are difficult the precision for realizing sub- μm level, the preparation of can make traditional suspended mictrostrip cannot compatible traditional IC technique, separately
It is outer that when operating frequency reaches Terahertz frequency range, common process technology is difficult to make transmission line realize small size high-precision configuration,
These factors not only affect tradition to be inverted the Performance And Reliability of microstrip line, and limit it in portable or high integration
Application in product.
The content of the invention
Present invention aims to above-mentioned the problems of the prior art, there is provided one kind can effectively reduce loss, carry
High manufacturing accuracy, the silicon substrate of reduction difficulty of processing are inverted microstrip line construction and preparation method thereof, the reliable operation of obtained product
Property it is high.
To achieve these goals, silicon substrate of the present invention is inverted the lower silicon substrate that microstrip line construction includes setting gradually from the bottom to top
Piece, upper silicon chip and inversion layer；Upper silicon chip etching is jagged, the upper table of the lower surface and lower silicon chip of breach and inversion layer
Face surrounds cavity, is inverted on the lower surface of layer and arranges microstrip line, and microstrip line includes being embedded in the upper metal being inverted on layer lower surface
Layer and prepare upper metal level lower surface and the exposed lower metal layer in cavity；It is provided between upper silicon chip and lower silicon chip
Metal ground plane.
Described lower metal layer is suspended in the surface of cavity.
Nitrogen, air or noble gases are filled with described cavity.
Described inversion layer is prepared using SU8 photoresists, and its thickness is between 10 μm~20 μm.
The width of the upper metal level is 1.2~1.4 times of lower metal layer, and both thickness 0.5 μm~1 μm it
Between.
The size of the live width of the microstrip line, the thickness of upper silicon chip and cavity is set according to required impedance.
Described cavity is rectangular structure, and the width of cavity is more than the width of twice microstrip line.
Described upper silicon chip adopts 110 silicon.
Described metal ground plane is bonded together by conducting resinl with the lower surface of upper silicon chip.
The manufacture method that silicon substrate of the present invention is inverted microstrip line construction, comprises the following steps：
1) lower metal layer is made；
1a) two size identical silicon chips are chosen, respectively as upper silicon chip and lower silicon chip；
1b) using evaporation or the furling plating of the upper surface deposit lower metal layer for sputtering at silicon chip；
1c) upper surface in upper silicon chip smears the SU8 photoresists of one layer of 2 μm~3 μ m-thick, by photoetching development, by area
Domain is come out, and forms lower metal mask layer；
1d) the furling plating region plating to coming out to be electroplated thickeies, and forms the lower metal layer of 2 μm~3 μ m-thicks；
2) upper metal level is made；
2a) upper surface in lower metal mask layer smears again a positive photoresist, and photoetching development exposes lower metal layer
Out, metal mask layer in formation；
2b) using the furling plating for sputtering at the upper metal level of one layer of metal mask layer deposit；
2c) the furling plating plating of upper metal level is thickeied, the upper metal level of 2 μm~3 μ m-thicks is formed；
2d) furling plating of the remaining upper metal level of erosion removal, then carries out pan-exposure to positive photoresist, and washes away remnants
Positive photoresist；
3) make and be inverted layer；
The SU8 photoresists of one layer of 5 μm~10 μ m-thick are smeared in the upper surface and upper metal level of lower metal mask layer, after exposure
It is carried out from elevated cure, form the inversion layer of fixed microstrip line；
4) thinning upper silicon chip and the mask layer of cavity is made：
4a) one layer of paraffin is applied in the upper surface for being inverted layer, the surface structure of upper silicon chip is protected, then will be scribbled
One face back-off of paraffin is simultaneously fixed on platen；
4b) upper silicon chip is thinned to by desired thickness using the method for mechanical lapping；
4c) lower surface in upper silicon chip prepares mask layer, and smears one layer of positive photoetching rubber, the mask plate photoetching pair for passing through
Standard, in the mask pattern area for being formed immediately below cavity of microstrip line；
The window of cavity 4d) is etched on mask layer, silicon face to be etched is come out；
5) cavity is prepared；
5a) upper silicon chip is performed etching using corrosive liquid, and form cavity；
5b) remove the mask layer in cavity mask pattern area and the positive photoresist of remnants；
5c) using corrosion by the way of removing step 1a) in unnecessary lower metal layer furling plating；
6) silicon chip is combined to form inversion microstrip line construction：
6a) upper surface in lower silicon chip deposits furling plating, and electroplates thickening and form metal ground plane；
6b) metal ground plane is pasted into upper silicon chip lower surface with conducting resinl, formed and be inverted microstrip line construction.
Compared with prior art, present invention inversion microstrip line construction has following beneficial effect：Upper silicon chip is etched with
Breach, breach surrounds cavity with the upper surface of the lower surface and lower silicon chip of being inverted layer, and electromagnetic field is mainly distributed in cavity,
The electromagnetic energy also mainly propagation in cavity, reduces insertion loss, therefore the present invention is less than the loss that tradition is inverted microstrip line,
A kind of high performance transmission line suitable for millimeter-wave signal can be obtained.The substrate material that the present invention is adopted is silicon, i.e., common
Silicon materials can be realized as the preparation of cavity, with low cost.The thermal conductivity of silicon materials is the several times of steel, better than microwave material
Material is high to the disposal ability of system thermal.Silicon materials are easily interconnected as substrate with silicon-based devices, can be accurate using thinning machine
The thickness of control silicon materials, it is most thin to reach tens of μm, solve tradition and be inverted microstrip line because solid state medium is blocked up, processing
The loss that error is larger and brings, realizes a kind of low-loss, preparation method is simple, machining accuracy is high millimeter wave transmission line knot
Structure.
Compared with prior art, the manufacture method of present invention inversion microstrip line construction has following beneficial effect：Using
Fine process, will be fixed up, because SU8 photoresists can be made by the use of SU8 photoresists as the microstrip line for being inverted layer
Very thin, electromagnetic field is mainly distributed in cavity, and electromagnetic energy is mainly propagated in cavity, reduces insertion loss.In addition SU8 glue is
Negative glue, structural strength is big after exposure curing, good seal performance, therefore cavity structure proposed by the present invention can fill nitrogen, sky
Gas or noble gases, can so reduce the transmitting of secondary electron, and being applied to space field can increase the reliability of circuit.
Cavity, preparation process is simple are formed in upper silicon chip using silicon substrate MEMS wet method deep etching technique, it is not necessary to using expensive
Etching apparatus can realize that and silicon materials etching characteristic is stable, consistent degree when physical dimension batch is produced is high.This
The bright microelectronics photoetching technique that employs prepares mask plate, and machining accuracy can reach sub- μm level, in the mask pattern of substrate floor
It is grade ratio relation with the targeted graphical under microstrip line, the requirement on machining accuracy of bottom surface mask pattern can be reduced by scaling relation,
Make the dimension of microstrip line of design accurate and easily realize, realize high impedance, solve and prepare in microwave board extra-high resistance line
A difficult problem.
Description of the drawings
The overall structure diagram of Fig. 1 present invention；
The overall structure sectional view of Fig. 2 present invention；
The upper silicon chips of Fig. 3-a make the cross-sectional view of microstrip line lower metal layer；
Fig. 3-b form the cross-sectional view of microstrip line；
Fig. 3-c form the cross section signal that microstrip line is inverted layer；
The cross-sectional view of air chamber mask layer is prepared after Fig. 3-d are thinning；
Cross-sectional view after Fig. 3-e etching cavities；
Cross-sectional view after the upper and lower silicon chip bondings of Fig. 3-f；
Analogous diagram of Fig. 4 suspended mictrostrips of the present invention in Terahertz frequency range S parameter；
In accompanying drawing：1. microstrip line；2. layer is inverted；3. silicon chip；Silicon chip on 31.；32. times silicon chips；4. cavity；5. gold
Category ground plane；6. paraffin；7. mask layer；8. positive photoetching rubber；Metal level on 11.；12. lower metal layers；21. the oneth SU8 photoresists
Layer；22. the 2nd SU8 photoresist layers.
Specific embodiment
Below in conjunction with the accompanying drawings the present invention is described in further detail.The embodiment is that the part of the present invention is real
Example is applied, embodiment is not all, of, the present invention can also be implemented by the way of other are different, and those skilled in the art can
To do similar popularization in the case of without prejudice to intension of the present invention, therefore the present invention is not limited by following public specific embodiment
System.
Referring to Fig. 1,2, silicon substrate of the present invention be inverted the lower silicon chip 32 that microstrip line construction includes setting gradually from the bottom to top, on
Silicon chip 31 and inversion layer 2.It is inverted layer 2 to prepare using SU8 photoresists, and its thickness is between 10 μm~20 μm.Upper silicon chip
31 adopt 110 silicon, and the width of upper metal level 11 is 1.2~1.4 times of lower metal layer 12, and both thickness is 0.5 μm~1
Between μm.Upper silicon chip 31 etches jagged, and breach surrounds chamber with the lower surface and the upper surface of lower silicon chip 32 of being inverted layer 2
Body 4, cavity 4 is rectangular structure, and the width of cavity 4 is more than the width of twice microstrip line 1.It is inverted on the lower surface of layer 2 and arranges
There is microstrip line 1, microstrip line 1 includes the upper metal level 11 being embedded on the inversion lower surface of layer 2 and prepares in upper metal level 11
Lower surface and the exposed lower metal layer 12 in cavity 4, lower metal layer 12 is suspended in the surface of cavity 4, can fill out in cavity 4
Inflated with nitrogen, air or noble gases.Metal ground plane 5 is provided between the upper silicon chip 31 and lower silicon chip 32 of the present invention.Gold
Category ground plane 5 is bonded together by conducting resinl with the lower surface of upper silicon chip 31.The live width of microstrip line 1, upper silicon chip 31
The size of thickness and cavity 4 is set according to required impedance.
Silicon substrate of the present invention is inverted the manufacture method of microstrip line construction by taking 50 ohm transmission lines as an example, comprises the following steps：
Step 1, makes lower metal layer (referring to Fig. 3 a)：
1.1) two size identical silicon chips are chosen, respectively as upper silicon chip 31 and lower silicon chip 32；
1.2) by way of evaporating or sputtering, in the upper surface of upper silicon chip 31 the lower metal of one layer of 0.05 μ m-thick is deposited
The furling plating of layer 12；
1.3) upper surface in upper silicon chip 31 smears a SU8 photoresists 21 of one layer of 2 μ m-thick, by photoetching development,
Furling plating region to be electroplated is come out, lower metal mask layer is formed；
1.4) plating thickening is carried out to the furling plating region for coming out to be electroplated by electroplating technology, ultimately forms 2 μm
Thickness, 244 μm wide of lower metal layer 12.
Step 2, metal level (referring to Fig. 3 b) in making：
2.1) upper surface in lower metal mask layer smears again the positive photoresist of 3 μ m-thicks, and photoetching development makes lower gold
Category layer comes out, metal mask layer in formation；
2.2) by the way of sputtering, in upper metal mask layer the furling plating of metal level 11 on a layer is deposited；
2.3) the furling plating plating of upper metal level is thickeied, forms 3 μ m-thicks, 284 μm wide of upper metal level 11；
2.4) furling plating of remaining upper metal level 11 is removed with the method for corrosion, then goes out positive photoresist pan-exposure
Come, and wash away the positive photoresist of remnants.
Step 3, makes and is inverted layer (referring to Fig. 3 c)：
3.1) upper surface and upper metal level 11 in lower metal mask layer smears the 2nd SU8 photoresists 22 of one layer of 5 μ m-thick,
It is carried out from elevated cure after exposure, a SU8 photoresist layers 21 and the 2nd SU8 photoresist layers 22 collectively constitute fixed micro-strip
The inversion layer 2 of line.
Step 4, thinning upper silicon chip simultaneously makes the mask layer (with reference to Fig. 3 d) of air chamber：
4.1) one layer of paraffin is applied in the upper surface for being inverted layer 2, the surface structure of upper silicon chip 31 is protected, afterwards
The face back-off of paraffin one will be scribbled and be fixed on platen；
4.2) thickness of upper silicon chip 31 is thinned to into 55 μm using mechanical grinding method；
4.3) lower surface of silicon chip 31 prepares the silicon dioxide of 0.2 μ m-thick and the silicon nitride conduct of 1 μ m-thick on described
Mask layer 7, and the positive photoetching rubber 8 of one layer of 3 μ m-thick is smeared, the mask plate lithography alignment technology for passing through, in the underface shape of microstrip line 1
Into the mask pattern area of cavity 4；
4.4) by the way of ICP etchings, 1054 μm of wide cavity windows are etched on mask layer 7, by subsequent technique
In silicon face to be etched come out.
Step 5, makes cavity (referring to Fig. 3 e)：
5.1) using silicon substrate MEMS wet method deep etching technique, upper silicon chip 31 is carved along 110 crystal faces with KOH corrosive liquids
Erosion, and the cavity 4 of a rectangular structure is formed, top surface is suspension layer 2, and width is 1000 μm；
5.2) mask layer in cavity pattern area and the positive photoresist of remnants are removed；
5.3) removing step 1 by the way of the corrosion) 1.1) in unnecessary lower metal layer furling plating.
Step 6, silicon chip combines to form suspended mictrostrip (with reference to Fig. 3 f)：
6.1) upper surface in lower silicon chip 32 deposits furling plating, and electroplates thickening and form metal ground plane 5；
6.2) metal ground plane 5 is pasted the lower surface of upper silicon chip 31 with conducting resinl, so as to form inversion microstrip line
Structure.
The effect of the present invention can be further illustrated by following emulation：
The present invention is inverted microstrip line using the 3 D electromagnetic simulation software HFSS of Ansoft companies to 50 ohm of embodiment
S parameter in the frequency range of 10GHz to 200GHz is emulated, as a result as shown in figure 4, as seen from Figure 4, reflection parameters S
(1,1) closely 0dB, and configured transmission S (2,1) below -25dB, this shows the inversion microstrip line of the present invention in transmission milli
Extraordinary performance is shown during metric wave submillimeter wave.
Claims (10)
1. a kind of silicon substrate is inverted microstrip line construction, it is characterised in that：Including the lower silicon chip (32) for setting gradually from the bottom to top, on
Silicon chip (31) and inversion layer (2)；Upper silicon chip (31) etching is jagged, the lower surface and lower silicon of breach and inversion layer (2)
The upper surface of substrate (32) surrounds cavity (4), is inverted on the lower surface of layer (2) and arranges microstrip line (1), and microstrip line (1) is including embedding
Enter in the upper metal level (11) being inverted on layer (2) lower surface and prepare in the lower surface of upper metal level (11) and exposed in cavity
(4) lower metal layer (12) in；Metal ground plane (5) is provided between upper silicon chip (31) and lower silicon chip (32).
2. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Described lower metal layer (12) is suspended in
The surface of cavity (4).
3. silicon substrate according to claim 1 or claim 2 is inverted microstrip line construction, it is characterised in that：It is filled with described cavity (4)
Nitrogen, air or noble gases.
4. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Described inversion layer (2) is using SU8 light
Prepared by photoresist, and its thickness is between 10 μm~20 μm.
5. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：The width of described upper metal level (11)
It is 1.2~1.4 times of lower metal layer (12), and both thickness is between 0.5 μm~1 μm.
6. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Live width, the upper silicon of the microstrip line (1)
The thickness of substrate (31) and the size of cavity (4) are set according to required impedance.
7. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Described cavity (4) is cuboid knot
Structure, the width of cavity (4) is more than the width of twice microstrip line (1).
8. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Upper silicon chip (31) is using 110 silicon.
9. according to claim 1 silicon substrate is inverted microstrip line construction, it is characterised in that：Described metal ground plane (5) passes through
Conducting resinl is bonded together with the lower surface of upper silicon chip (31).
10. the manufacture method that a kind of silicon substrate is inverted microstrip line construction, it is characterised in that comprise the following steps：
1) lower metal layer (12) is made；
1a) two size identical silicon chips are chosen, respectively as upper silicon chip (31) and lower silicon chip (32)；
1b) using evaporation or the furling plating of upper surface deposit lower metal layer (12) for sputtering at silicon chip (31)；
1c) upper surface in upper silicon chip (31) smears the SU8 photoresists of one layer of 2 μm~3 μ m-thick, by photoetching development, by area
Domain is come out, and forms lower metal mask layer；
1d) the furling plating region plating to coming out to be electroplated thickeies, and forms the lower metal layer (12) of 2 μm~3 μ m-thicks；
2) upper metal level (12) is made；
2a) upper surface in lower metal mask layer smears again a positive photoresist, and photoetching development exposes lower metal layer (12)
Out, metal mask layer in formation；
2b) using the furling plating for sputtering at the upper metal level (11) of one layer of metal mask layer deposit；
2c) the furling plating plating of upper metal level (11) is thickeied, the upper metal level (11) of 2 μm~3 μ m-thicks is formed；
2d) furling plating of the remaining upper metal level (11) of erosion removal, then carries out pan-exposure to positive photoresist, and washes away remnants
Positive photoresist；
3) make and be inverted layer (2)；
The SU8 photoresists of one layer of 5 μm~10 μ m-thick are smeared in the upper surface and upper metal level (11) of lower metal mask layer, after exposure
It is carried out from elevated cure, form the inversion layer (2) of fixed microstrip line (1)；
4) thinning upper silicon chip (31) and the mask layer of cavity (4) is made：
4a) one layer of paraffin is applied in the upper surface for being inverted layer (2), the surface structure of upper silicon chip (31) is protected,
A face back-off of paraffin will be scribbled again and is fixed on platen；
4b) upper silicon chip (31) is thinned to by desired thickness using the method for mechanical lapping；
4c) lower surface in upper silicon chip (31) prepares mask layer, and smears one layer of positive photoetching rubber, the mask plate photoetching pair for passing through
Standard, in the mask pattern area for being formed immediately below cavity (4) of microstrip line (1)；
The window of cavity (4) 4d) is etched on mask layer, silicon face to be etched is come out；
5) cavity (4) is prepared；
5a) upper silicon chip is performed etching using corrosive liquid, and form cavity (4)；
5b) remove the mask layer in cavity (4) mask pattern area and the positive photoresist of remnants；
5c) using corrosion by the way of removing step 1a) in unnecessary lower metal layer (12) furling plating；
6) silicon chip is combined to form inversion microstrip line construction：
6a) upper surface in lower silicon chip (32) deposits furling plating, and electroplates thickening and form metal ground plane (5)；
6b) metal ground plane (5) is pasted into upper silicon chip (31) lower surface with conducting resinl, formed and be inverted microstrip line construction.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111837293A (en) * | 2018-04-12 | 2020-10-27 | 谷歌有限责任公司 | Embedded air gap transmission line |
| WO2022145978A1 (en) * | 2020-12-30 | 2022-07-07 | 삼성전자 주식회사 | Transmission line structure for reducing insertion loss, and electronic device comprising same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201490315U (en) * | 2009-09-01 | 2010-05-26 | 鞍山市嘉惠广播电子技术有限公司 | Overhang micro-band structure |
| CN105896013A (en) * | 2016-04-28 | 2016-08-24 | 西安电子科技大学 | Silicon-based suspended microstrip line structure for terahertz waves, and manufacturing method therefor |
-
2016
- 2016-12-20 CN CN201611185444.2A patent/CN106684515B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201490315U (en) * | 2009-09-01 | 2010-05-26 | 鞍山市嘉惠广播电子技术有限公司 | Overhang micro-band structure |
| CN105896013A (en) * | 2016-04-28 | 2016-08-24 | 西安电子科技大学 | Silicon-based suspended microstrip line structure for terahertz waves, and manufacturing method therefor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111837293A (en) * | 2018-04-12 | 2020-10-27 | 谷歌有限责任公司 | Embedded air gap transmission line |
| WO2022145978A1 (en) * | 2020-12-30 | 2022-07-07 | 삼성전자 주식회사 | Transmission line structure for reducing insertion loss, and electronic device comprising same |
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| Publication number | Publication date |
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| CN106684515B (en) | 2019-04-30 |
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