CN106681425A - Current square switching circuit system - Google Patents

Current square switching circuit system Download PDF

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Publication number
CN106681425A
CN106681425A CN201611222677.5A CN201611222677A CN106681425A CN 106681425 A CN106681425 A CN 106681425A CN 201611222677 A CN201611222677 A CN 201611222677A CN 106681425 A CN106681425 A CN 106681425A
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CN
China
Prior art keywords
field effect
type field
effect transistor
circuit
current
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Pending
Application number
CN201611222677.5A
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Chinese (zh)
Inventor
胡建国
吴江旭
吴劲
段志奎
王德明
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Guangzhou Smart City Development Research Institute
National Sun Yat Sen University
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Guangzhou Smart City Development Research Institute
National Sun Yat Sen University
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Application filed by Guangzhou Smart City Development Research Institute, National Sun Yat Sen University filed Critical Guangzhou Smart City Development Research Institute
Priority to CN201611222677.5A priority Critical patent/CN106681425A/en
Publication of CN106681425A publication Critical patent/CN106681425A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/262Current mirrors using field-effect transistors only

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a current square switching circuit system. A current square switching circuit comprises a fixed voltage generating circuit and a current square circuit; the fixed voltage generating circuit comprises a fixed voltage output end and a circuit output end, and is used for providing fixed voltage for the current square circuit; the current square circuit is connected with the fixed voltage generating circuit, and a square relationship is formed between an output current and an input circuit of the current square circuit. In the embodiment of the current square switching circuit system, the fixed voltage generating circuit is composed of two P-type field effect transistors and used for providing the fixed voltage for the current square circuit, the current square circuit is composed of three P-type field effect transistors, and finally, the current is output with a set of current mirrors. The current square switching circuit system is simple in circuit structure and small in chip area, and the standard CMOS technology is adopted.

Description

A kind of current squaring conversion circuitry
Technical field
The present invention relates to the current squaring change-over circuit technical field of chip, more particularly to a kind of current squaring change-over circuit System.
Background technology
Variable gain amplifier (variable gain amplifier, VGA) is in the system for needing to process analogue signal Have a wide range of applications, such as sonifer, hard disk and the communications field.Used in traditional VGA designs is audion, this be by Voltage in audion has exponent relation with electric current, can be used to realize VGA.But in Advanced CMOS Process, voltage with Electric current is in square, therefore VGA can not be realized as audion using CMOS transistor, while in Advanced CMOS Process Not in offer triode device, therefore original method for designing be not suitable for, and exigence is replaced using cmos device.Solve One of method be exactly to approach exponential function by using Taylor series, then Taylor series are intercepted, obtain one with The close function of exponential function, then realize this function with cmos circuit.And current squaring electric current is exactly exponent circuit Core.
The content of the invention
It is an object of the invention to overcome the deficiencies in the prior art, the invention provides a kind of current squaring change-over circuit system System, constitutes fixed voltage and produces circuit using two p-type field effect transistor, for providing fixed voltage to current squaring circuit, makes Current squaring circuit is constituted with three p-type field effect transistor, is finally exported in electric current with one group of current mirror, circuit structure letter of the present invention Single, chip area is little, uses standard CMOS process.
In order to solve above-mentioned technical problem, the invention provides a kind of current squaring conversion circuitry, the electric current is put down Square conversion circuitry includes:Fixed voltage produces circuit, current squaring circuit;Wherein,
The fixed voltage produces circuit includes fixed voltage output and circuit output end, and the fixed voltage produces electricity Road is used to provide fixed voltage for the current squaring circuit;
The current squaring circuit produces circuit and is connected with the fixed voltage, the current squaring circuit output current Quadratic relationship is formed with input circuit.
Preferably, the current squaring conversion circuitry also includes current mirror, the current mirror and the current squaring Circuit is connected, for exporting the electric current that the current squaring circuit is produced.
Preferably, the current mirror includes the first N-type field effect transistor and the second N-type field effect transistor;Wherein,
The first N-type field effect transistor drain electrode is connected with the first N-type fet gate, the first N-type field Effect pipe source electrode is connected with the current squaring circuit, and the first N-type field effect transistor substrate is connected with the supply voltage Connect;
The second N-type field effect transistor drain electrode output circuit, the second N-type fet gate and first N-type Fet gate is connected, and the second N-type field effect transistor substrate is connected with the supply voltage.
Preferably, the fixed voltage produces circuit includes the 4th p-type field effect transistor, the 5th p-type field effect transistor and direct current Power supply is constituted;Wherein,
The 4th p-type field effect transistor drain electrode is connected with the 4th p-type fet gate, the 4th p-type field effect Should pipe source electrode be connected with supply voltage, the 4th p-type field effect transistor substrate is connected with the supply voltage;
The 5th p-type field effect transistor drain electrode is connected with the 5th p-type fet gate, the 5th p-type field Effect pipe source electrode is connected with the 4th p-type field effect transistor drain electrode, and the 5th p-type field effect transistor substrate and the power supply are electric Pressure is connected;
Described DC source one end is connected with the 5th p-type field effect transistor drain electrode, and the other end is connected to the ground.
Preferably, the 4th p-type field effect transistor is identical with the breadth length ratio of the 5th p-type field effect transistor.
Preferably, the current squaring circuit includes the first p-type field effect transistor, the second p-type field effect transistor and the 3rd p-type field Effect pipe;Wherein,
First p-type field effect transistor drain electrode is connected with the current mirror, the first p-type fet gate and institute State fixed voltage generation circuit to be connected, the first p-type field effect transistor source electrode is connected with the 3rd p-type field effect transistor, a P Type field effect transistor substrate is connected with supply voltage;
Second p-type field effect transistor drain electrode is connected with the current mirror, the second p-type fet gate and described the Three p-type fet gates are connected, and the second p-type field effect transistor source electrode is connected with supply voltage;
3rd p-type field effect transistor drain electrode be connected with the 3rd p-type fet gate, the 3rd p-type field effect transistor source electrode and Supply voltage is connected, and the 3rd p-type field effect transistor substrate is connected with supply voltage.
In the embodiment of the present invention, the 4th p-type field effect transistor, the 5th p-type field effect transistor and DC source are used to produce fixation Voltage V2, V2 are exported from the 5th p-type fet gate, and DC current source is provided by other circuits in system;Imitate the first p-type field Ying Guan, the second p-type field effect transistor and the 3rd p-type field effect transistor constitute current squaring circuit, and the first p-type field effect transistor produces electric current I11, the second p-type field effect transistor produces electric current I12, and the difference of I11 and I12 is equal to input current Iin, I11 and I12 sums and Iin With quadratic relationship, so the output current of current squaring circuit and its input current have quadratic relationship;First N-type field effect Pipe and the second N-type field effect transistor constitute current output circuit, and the first N-type field effect transistor and the second N-type field effect transistor constitute electric current Mirror, output circuit is exported from the drain electrode of the second N-type field effect transistor;Circuit structure of the present invention is simple, and chip area is little, uses mark Quasi- CMOS technology.
Description of the drawings
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing The accompanying drawing to be used needed for having technology description is briefly described, it is clear that, drawings in the following description are only this Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the structural representation of the current squaring conversion circuitry in the embodiment of the present invention;
Fig. 2 is the structural representation that the fixed voltage in the embodiment of the present invention produces circuit;
Fig. 3 is the structural representation of the current squaring circuit in the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than the embodiment of whole.It is based on Embodiment in the present invention, it is all other that those of ordinary skill in the art are obtained under the premise of creative work is not made Embodiment, belongs to the scope of protection of the invention.
Fig. 1 is the structural representation of the current squaring conversion circuitry in the embodiment of the present invention, as shown in figure 1, described Current squaring conversion circuitry includes:Fixed voltage produces circuit, current squaring circuit;Wherein,
The fixed voltage produces circuit includes fixed voltage output and circuit output end, and the fixed voltage produces electricity Road is used to provide fixed voltage for the current squaring circuit;
The current squaring circuit produces circuit and is connected with the fixed voltage, the current squaring circuit output current Quadratic relationship is formed with input circuit.
Preferably, the current squaring conversion circuitry also includes current mirror, and the current mirror is flat with the electric current Square circuit is connected, for exporting the electric current that the current squaring circuit is produced.
Preferably, the current mirror includes the first N-type field effect transistor N11 and the second N-type field effect transistor N12;Wherein,
The first N-type field effect transistor N11 drain electrode is connected with the first N-type field effect transistor N11 grid, and described first N-type field effect transistor N11 source electrode is connected with the current squaring circuit, the first N-type field effect transistor N11 substrate and the electricity Source voltage is connected;
Second N-type field effect transistor N12 drains output circuit, the second N-type field effect transistor N12 grid and described the One N-type field effect transistor N11 grid is connected, and the second N-type field effect transistor N12 substrate is connected with the supply voltage.
Preferably, the fixed voltage produces circuit includes the 4th p-type field effect transistor P14, the 5th p-type field effect transistor P15 With DC source composition;Wherein,
The 4th p-type field effect transistor P14 drain electrode is connected with the 4th p-type field effect transistor P14 grid, the 4th P Type field effect transistor P14 source electrode is connected with supply voltage, and the 4th p-type field effect transistor P14 substrate is connected with the supply voltage;
The 5th p-type field effect transistor drain electrode is connected with the 5th p-type field effect transistor P15 grid, the 5th p-type Field effect transistor P15 source electrode is connected with the 4th p-type field effect transistor P14 drain electrode, the 5th p-type field effect transistor P15 substrate It is connected with the supply voltage;
Described DC source one end is connected with the 5th p-type field effect transistor P15 drain electrode, and the other end is connected to the ground.
Preferably, the 4th p-type field effect transistor P14 is identical with the breadth length ratio of the 5th p-type field effect transistor P15.
Fig. 2 is the structural representation that the fixed voltage in the embodiment of the present invention produces circuit, with reference to Fig. 2, to fixed voltage Produce circuit to be described further:
The calculating process of fixed voltage given below, the V in formula belowaAnd VbThe 4th p-type field effect transistor is represented respectively Voltage difference between P14 and the 5th p-type field effect transistor P15 gate-source, electric current I0Fixed DC current is made, by its in system He provides circuit, wherein, the breadth length ratio of the 4th p-type field effect transistor P14 and the 5th p-type field effect transistor P15 is identical;Computing formula is such as Under:
At the same time it can also obtain I0Expression formula,
Preferably, the current squaring circuit includes the first p-type field effect transistor P11, the second p-type field effect transistor P12 and the Three p-type field effect transistor P13;Wherein,
The first p-type field effect transistor P11 drain electrode is connected with the current mirror, the first p-type field effect transistor P11 grid Pole and the fixed voltage produce circuit and are connected, the first p-type field effect transistor P11 source electrode and the 3rd p-type field effect transistor P13 It is connected, the first p-type field effect transistor P11 substrate is connected with supply voltage;
Second p-type field effect transistor P12 drain electrode is connected with the current mirror, the second p-type field effect transistor P12 grid with The 3rd p-type field effect transistor P13 grid is connected, and the second p-type field effect transistor P12 source electrode is connected with supply voltage;
The drain electrode of 3rd p-type field effect transistor P13 is connected with the 3rd p-type field effect transistor P13 grid, the 3rd p-type field effect transistor P13 source electrodes are connected with supply voltage, and the 3rd p-type field effect transistor P13 substrate is connected with supply voltage.
Fig. 3 is the structural representation of the current squaring circuit in the embodiment of the present invention, with reference to Fig. 3, above-mentioned steps are made into One step explanation:
Current squaring circuit counting process is given below:Assume VaAnd VbThe first p-type field effect transistor P11 and are represented respectively Voltage difference between two p-type field effect transistor P12 grids and source electrode, V2Represent the first p-type field effect transistor P11 grid and source voltage Difference, then have:
V2=Va+Vb
According to saturation region current formula, the electric current I in the first p-type field effect transistor P1111In the second p-type field effect transistor P12 Electric current I12It is expressed as:
Order
Again because I11-I12=Iin, substituting into above formula can obtain:
According to I0With V2Relation, orderFurther simplify I11+I12
I11+I12The output current of indication circuit, from above formula circuit output current and input current I can be seeninWith flat Square relation.
Aforementioned p-type field effect transistor refers to p-type Metal-oxide-semicondutor (P-Mental-Oxide- Semiconductor, PMOS) transistor, each PMOS transistor include four pins, i.e. drain D, source S, substrate, grid G。
Above-mentioned N-type field effect transistor be N-type Metal-oxide-semicondutor (N-Mental-Oxide-Semiconductor, NMOS) transistor, each nmos pass transistor includes four pins, i.e. drain D, source S, substrate, grid G.
In the embodiment of the present invention, the 4th p-type field effect transistor, the 5th p-type field effect transistor and DC source are used to produce fixation Voltage V2, V2 are exported from the 5th p-type fet gate, and DC current source is provided by other circuits in system;Imitate the first p-type field Ying Guan, the second p-type field effect transistor and the 3rd p-type field effect transistor constitute current squaring circuit, and the first p-type field effect transistor produces electric current I11, the second p-type field effect transistor produces electric current I12, and the difference of I11 and I12 is equal to input current Iin, I11 and I12 sums and Iin With quadratic relationship, so the output current of current squaring circuit and its input current have quadratic relationship;First N-type field effect Pipe and the second N-type field effect transistor constitute current output circuit, and the first N-type field effect transistor and the second N-type field effect transistor constitute electric current Mirror, output circuit is exported from the drain electrode of the second N-type field effect transistor;Circuit structure of the present invention is simple, and chip area is little, uses mark Quasi- CMOS technology.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment is can Completed with instructing the hardware of correlation by program, the program can be stored in a computer-readable recording medium, storage Medium can include:Read only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), disk or CD etc..
In addition, a kind of current squaring conversion circuitry for being provided the embodiment of the present invention above has carried out detailed Jie Continue, specific case should be employed herein the principle and embodiment of the present invention are set forth, the explanation of above example It is only intended to help and understands the method for the present invention and its core concept;Simultaneously for one of ordinary skill in the art, according to this The thought of invention, will change in specific embodiments and applications, and in sum, this specification content should not It is interpreted as limitation of the present invention.

Claims (6)

1. a kind of current squaring conversion circuitry, it is characterised in that the current squaring conversion circuitry includes:Fixed electricity Pressure produces circuit, current squaring circuit;Wherein,
The fixed voltage produces circuit includes fixed voltage output and circuit output end, and the fixed voltage produces circuit and uses In providing fixed voltage for the current squaring circuit;
The current squaring circuit and the fixed voltage produce circuit and are connected, the current squaring circuit output current with it is defeated Enter circuit and form quadratic relationship.
2. current squaring conversion circuitry according to claim 1, it is characterised in that the current squaring change-over circuit System also includes current mirror, and the current mirror is connected with the current squaring circuit, for exporting the current squaring circuit The electric current of generation.
3. current squaring conversion circuitry according to claim 2, it is characterised in that the current mirror includes a N Type field effect transistor and the second N-type field effect transistor;Wherein,
The first N-type field effect transistor drain electrode is connected with the first N-type fet gate, the first N-type field effect Pipe source electrode is connected with the current squaring circuit, and the first N-type field effect transistor substrate is connected with the supply voltage;
The second N-type field effect transistor drain electrode output circuit, the second N-type fet gate is imitated with the first N-type field Tube grid is answered to be connected, the second N-type field effect transistor substrate is connected with the supply voltage.
4. current squaring conversion circuitry according to claim 1, it is characterised in that the fixed voltage produces circuit Including the 4th p-type field effect transistor, the 5th p-type field effect transistor and DC source composition;Wherein,
The 4th p-type field effect transistor drain electrode is connected with the 4th p-type fet gate, the 4th p-type field effect transistor Source electrode is connected with supply voltage, and the 4th p-type field effect transistor substrate is connected with the supply voltage;
The 5th p-type field effect transistor drain electrode is connected with the 5th p-type fet gate, the 5th p-type field effect The drain electrode of pipe source electrode and the 4th p-type field effect transistor is connected, the 5th p-type field effect transistor substrate and the supply voltage phase Connection;
Described DC source one end is connected with the 5th p-type field effect transistor drain electrode, and the other end is connected to the ground.
5. current squaring conversion circuitry according to claim 4, it is characterised in that the 4th p-type field effect transistor It is identical with the breadth length ratio of the 5th p-type field effect transistor.
6. current squaring conversion circuitry according to claim 1, it is characterised in that the current squaring circuit includes First p-type field effect transistor, the second p-type field effect transistor and the 3rd p-type field effect transistor;Wherein,
The first p-type field effect transistor drain electrode is connected with the current mirror, and the first p-type fet gate is solid with described Determine voltage generation circuit to be connected, the first p-type field effect transistor source electrode is connected with the 3rd p-type field effect transistor, the first p-type field Effect tube lining bottom is connected with supply voltage;
Second p-type field effect transistor drain electrode is connected with the current mirror, the second p-type fet gate and the 3rd P Type fet gate is connected, and the second p-type field effect transistor source electrode is connected with supply voltage;
The drain electrode of 3rd p-type field effect transistor is connected with the 3rd p-type fet gate, the 3rd p-type field effect transistor source electrode and power supply Voltage is connected, and the 3rd p-type field effect transistor substrate is connected with supply voltage.
CN201611222677.5A 2016-12-27 2016-12-27 Current square switching circuit system Pending CN106681425A (en)

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Application Number Priority Date Filing Date Title
CN201611222677.5A CN106681425A (en) 2016-12-27 2016-12-27 Current square switching circuit system

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Application Number Priority Date Filing Date Title
CN201611222677.5A CN106681425A (en) 2016-12-27 2016-12-27 Current square switching circuit system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113778166A (en) * 2021-09-28 2021-12-10 电子科技大学 Voltage differential circuit with ultra-low power consumption

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WO2009023719A2 (en) * 2007-08-14 2009-02-19 Texas Instruments Incorporated Square-function circuit
US8120426B1 (en) * 2009-06-22 2012-02-21 Rf Micro Devices, Inc. Low noise class AB linearized transconductor
CN102820856A (en) * 2009-02-03 2012-12-12 瑞萨电子株式会社 RF power amplifier and RF power module using the same
CN103365331A (en) * 2013-07-19 2013-10-23 天津大学 A kind of second order standard of compensation voltage generation circuit
CN104035470A (en) * 2014-06-19 2014-09-10 电子科技大学 Low-temperature-offset-coefficient bandgap reference voltage generation circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1987713A (en) * 2005-12-23 2007-06-27 深圳市芯海科技有限公司 Reference voltage source for low temperature coefficient with gap
WO2009023719A2 (en) * 2007-08-14 2009-02-19 Texas Instruments Incorporated Square-function circuit
CN102820856A (en) * 2009-02-03 2012-12-12 瑞萨电子株式会社 RF power amplifier and RF power module using the same
US8120426B1 (en) * 2009-06-22 2012-02-21 Rf Micro Devices, Inc. Low noise class AB linearized transconductor
CN103365331A (en) * 2013-07-19 2013-10-23 天津大学 A kind of second order standard of compensation voltage generation circuit
CN104035470A (en) * 2014-06-19 2014-09-10 电子科技大学 Low-temperature-offset-coefficient bandgap reference voltage generation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113778166A (en) * 2021-09-28 2021-12-10 电子科技大学 Voltage differential circuit with ultra-low power consumption
CN113778166B (en) * 2021-09-28 2022-10-04 电子科技大学 Voltage differential circuit with ultra-low power consumption

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Application publication date: 20170517