CN106663026B - 针对事务型数据处理执行模式的调用堆栈维护 - Google Patents

针对事务型数据处理执行模式的调用堆栈维护 Download PDF

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CN106663026B
CN106663026B CN201580037126.9A CN201580037126A CN106663026B CN 106663026 B CN106663026 B CN 106663026B CN 201580037126 A CN201580037126 A CN 201580037126A CN 106663026 B CN106663026 B CN 106663026B
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stack
data processing
modification
processor
execution mode
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CN106663026A (zh
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马修·詹姆斯·霍斯内尔
斯蒂芬·迪斯特尔霍斯特
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ARM Ltd
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/466Transaction processing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/466Transaction processing
    • G06F9/467Transactional memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1474Saving, restoring, recovering or retrying in transactions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/128Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526Mutual exclusion algorithms
    • G06F9/528Mutual exclusion algorithms by using speculative mechanisms
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45Caching of specific data in cache memory
    • G06F2212/451Stack data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/62Details of cache specific to multiprocessor cache arrangements
    • G06F2212/621Coherency control relating to peripheral accessing, e.g. from DMA or I/O device

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN201580037126.9A 2014-07-15 2015-06-09 针对事务型数据处理执行模式的调用堆栈维护 Active CN106663026B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1412534.8 2014-07-15
GB1412534.8A GB2528270A (en) 2014-07-15 2014-07-15 Call stack maintenance for a transactional data processing execution mode
PCT/GB2015/051675 WO2016009168A1 (en) 2014-07-15 2015-06-09 Call stack maintenance for a transactional data processing execution mode

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CN106663026A CN106663026A (zh) 2017-05-10
CN106663026B true CN106663026B (zh) 2021-01-12

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US (1) US10002020B2 (enExample)
EP (1) EP3170075B1 (enExample)
JP (1) JP6568575B2 (enExample)
KR (1) KR102284957B1 (enExample)
CN (1) CN106663026B (enExample)
GB (1) GB2528270A (enExample)
IL (1) IL249697B (enExample)
WO (1) WO2016009168A1 (enExample)

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GB2554096B (en) * 2016-09-20 2019-03-20 Advanced Risc Mach Ltd Handling of inter-element address hazards for vector instructions
CN107291480B (zh) * 2017-08-15 2020-12-15 中国农业银行股份有限公司 一种函数调用方法及装置
US10572259B2 (en) * 2018-01-22 2020-02-25 Arm Limited Hints in a data processing apparatus
US10698724B2 (en) * 2018-04-10 2020-06-30 Osisoft, Llc Managing shared resources in a distributed computing system
US11231932B2 (en) * 2019-03-05 2022-01-25 Arm Limited Transactional recovery storage for branch history and return addresses to partially or fully restore the return stack and branch history register on transaction aborts
US11334495B2 (en) * 2019-08-23 2022-05-17 Arm Limited Cache eviction
US11687519B2 (en) 2021-08-11 2023-06-27 T-Mobile Usa, Inc. Ensuring availability and integrity of a database across geographical regions
FR3147397A1 (fr) * 2023-03-28 2024-10-04 Stmicroelectronics International N.V. Système informatique configuré pour exécuter un programme d’ordinateur

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101206633A (zh) * 2006-12-19 2008-06-25 国际商业机器公司 用事务协议和共享存储器在主机系统间通信的系统和方法
CN101300545A (zh) * 2005-11-08 2008-11-05 国际商业机器公司 进行异类处理联合体中的外部辅助调用的装置与方法
US9009452B2 (en) * 2007-05-14 2015-04-14 International Business Machines Corporation Computing system with transactional memory using millicode assists

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8544020B1 (en) * 2004-09-14 2013-09-24 Azul Systems, Inc. Cooperative preemption
US20080016325A1 (en) * 2006-07-12 2008-01-17 Laudon James P Using windowed register file to checkpoint register state
US8621183B2 (en) * 2008-07-28 2013-12-31 Advanced Micro Devices, Inc. Processor with support for nested speculative sections with different transactional modes
US8739164B2 (en) * 2010-02-24 2014-05-27 Advanced Micro Devices, Inc. Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereof
US9880848B2 (en) * 2010-06-11 2018-01-30 Advanced Micro Devices, Inc. Processor support for hardware transactional memory
US9274919B2 (en) * 2011-04-29 2016-03-01 Dynatrace Software Gmbh Transaction tracing mechanism of distributed heterogenous transactions having instrumented byte code with constant memory consumption and independent of instrumented method call depth
US9152509B2 (en) * 2011-12-13 2015-10-06 Advanced Micro Devices, Inc. Transactional memory conflict management

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101300545A (zh) * 2005-11-08 2008-11-05 国际商业机器公司 进行异类处理联合体中的外部辅助调用的装置与方法
CN101206633A (zh) * 2006-12-19 2008-06-25 国际商业机器公司 用事务协议和共享存储器在主机系统间通信的系统和方法
US9009452B2 (en) * 2007-05-14 2015-04-14 International Business Machines Corporation Computing system with transactional memory using millicode assists

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Transactional Memory Architecture and Implementation for IBM System z;Christian Jacobi等;《2012 IEEE/ACM 45th Annual International Symposium on Microarchitecture》;20121231;全文 *

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IL249697A0 (en) 2017-02-28
GB2528270A (en) 2016-01-20
EP3170075A1 (en) 2017-05-24
IL249697B (en) 2020-01-30
US10002020B2 (en) 2018-06-19
WO2016009168A1 (en) 2016-01-21
JP2017520857A (ja) 2017-07-27
KR102284957B1 (ko) 2021-08-04
EP3170075B1 (en) 2021-01-13
JP6568575B2 (ja) 2019-08-28
GB201412534D0 (en) 2014-08-27
CN106663026A (zh) 2017-05-10
KR20170031708A (ko) 2017-03-21
US20170161095A1 (en) 2017-06-08

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