CN106652665A

CN106652665A - Experimental device of computer composition principle

Info

Publication number: CN106652665A
Application number: CN201611130429.8A
Authority: CN
Inventors: 李平舟; 杨威; 韩亮; 黄洪伟
Original assignee: Xidian University
Current assignee: Xidian University
Priority date: 2016-12-09
Filing date: 2016-12-09
Publication date: 2017-05-10

Abstract

The invention provides an experimental device of a computer composition principle. The experimental device comprises a time sequence generator, a memory, an arithmetic unit and a controller. The experimental device of the computer composition principle is in USB communication with a computer; the computer is embedded in the experimental device; two control modes, namely micro-program control and combined logic control, are provided so as to meet experimental schemes under different experimental conditions; and meanwhile, errors and mistakes caused by serial port-to-USB connection between the computer and the experimental instrument (the experimental device) are reduced.

Description

A kind of experimental provision of Principles of Computer Composition

Technical field

The present invention relates to a kind of experimental provision of Principles of Computer Composition, belongs to computer teaching laboratory apparatus technical field.

Background technology

Principles of Computer Composition are the critically important basic courses of university, existing computer component principle experiment device, mainly It is to be connected with unit respectively as control unit by single-chip microcomputer.By singlechip group into control unit control and switch each The gating and read signal of individual unit.The gating that main control unit (micro controller unit) sends in the experimental facility of this mode Signal does not directly arrive unit circuit, but is first sent to single chip control unit, then is exported by single chip control unit To unit circuit, each gating signal is not detected when student tests, the transparency of experiment is inadequate, experiment control pattern list One, it is impossible to meet different experimental programs；Turn USB connections using serial ports between simultaneous computer and experiment instrument, increased experiment The unreliability of device.

The content of the invention

It is an object of the invention to provide a kind of experimental provision of Principles of Computer Composition, computer is embedded in experimental provision It is interior, usb communication is adopted between experimental provision and computer, and provide selective laser sintering and Combinational Logic Control two kinds of control moulds Formula, meets the experimental program of different experimental conditions, makes while reducing and turning USB connections using serial ports between computer and experiment instrument Into error and mistake.

A kind of experimental provision of Principles of Computer Composition proposed by the present invention, including：Timing sequencer, memory, computing Device and controller；Wherein, (1) timing sequencer according to the control signal received in timing control signal bus based on producing this Cadence signal and reset signal needed for calculation machine composition principle test device, cadence signal send cadence signal bus, reset signal Send reseting signal line；The time of various operations is controlled, control signal is received, stops the output of cadence signal；(2) selective laser sintering Device, for receiving the signal in clock signal bus, receives the cadence signal in cadence signal bus, receives on reseting signal line Reset signal, according to needed for reset signal, instruction operation code and cadence signal produce this computer component principle experiment device Full control signal；(3) combinational logic control device, for receiving the signal in clock signal bus, receives cadence signal total Cadence signal on line, receives the reset signal on reseting signal line, is produced according to reset signal, instruction operation code and cadence signal Full control signal needed for raw this computer component principle experiment device；Above-mentioned microprogram control unit and combinational logic control device Can independent control computer component principle experiment device other parts operation；In micro-programming controller, can only make The control signal produced with microprogram control unit；When using combinational logic control device, can only be produced using combinational logic control device Raw control signal；Each microprogram of the microprogram control unit includes one or several microcommand, each microcommand pair The microoperation instruction of each component actuation of one or several controls, all microprograms is answered to be stored in memory, the calculating unit It is embedded in experimental provision into usb communication, the computer is adopted between the experimental provision and computer of principle.Wherein, it is described Microprogram control unit includes control memory, micro-order register, micro address register, command register and command decoder, According to the status condition of command register, decoding generates the corresponding micro- address of the machine instruction, sends into micro address register；If Not in fetching condition, micro- address of micro address register comes from microinstruction register and the micro- finger that will be exported in control memory Order is latched into microinstruction register.

A kind of experimental provision of Principles of Computer Composition that the present invention is provided, computer is embedded in experimental provision, is tested Usb communication is adopted between device and computer, and selective laser sintering and two kinds of control models of Combinational Logic Control are provided, met not With the experimental program of experiment condition, while to reduce turn the error that USB connections are caused using serial ports between computer and experiment instrument And mistake.

Description of the drawings

The structured flowchart of Fig. 1 computer component principle experiment devices proposed by the present invention；

Fig. 2 microprogram control unit theory diagrams of the present invention；

Fig. 3 arithmetic unit theory diagrams of the present invention；

Fig. 4 (1), (2) (3) one embodiment of the present invention.

Specific embodiment

Below in conjunction with the accompanying drawings, the present invention is described in detail.

In order that the objects, technical solutions and advantages of the present invention become more apparent, it is right below in conjunction with drawings and Examples The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only to explain the present invention, not For limiting the present invention.

As shown in figure 1, the structured flowchart of computer component principle experiment device proposed by the present invention, including：Sequential occurs Device, memory, arithmetic unit and controller；Wherein, (1) timing sequencer is used for according to the control received in timing control signal bus Signal processed produces the cadence signal and reset signal needed for this computer component principle experiment device, and cadence signal send cadence signal Bus, reset signal send reseting signal line；The time of various operations is controlled, control signal is received, stops the output of cadence signal； (2) microprogram control unit, for receiving the signal in clock signal bus, receives the cadence signal in cadence signal bus, connects The reset signal on reseting signal line is received, this computer composition is produced according to reset signal, instruction operation code and cadence signal former Full control signal needed for reason experimental provision；(3) combinational logic control device, for receiving the signal in clock signal bus, The cadence signal in cadence signal bus is received, the reset signal on reseting signal line is received, according to reset signal, command operating Code and cadence signal produce the full control signal needed for this computer component principle experiment device；Above-mentioned microprogram control unit and Combinational logic control device can independent control computer component principle experiment device other parts operation；In micro-programming control During device processed, can only micro-programming controller produce control signal；When using combinational logic control device, can only be using combination The control signal that logic controller is produced；Each microprogram of the microprogram control unit includes one or several microcommand, often One microcommand corresponds to the microoperations instruction of each component actuation of one or several controls, and all microprograms are stored in memory, The computer is embedded in experimental provision, logical using USB between the experimental provision and computer of the Principles of Computer Composition Letter.

As shown in Fig. 2 wherein, the microprogram control unit includes control memory, micro-order register, the deposit of micro- address Device, command register and command decoder, according to the status condition of command register, it is corresponding micro- that decoding generates the machine instruction Address, sends into micro address register；If not in fetching condition, micro- address of micro address register comes from microinstruction register And the microcommand exported in control memory is latched into microinstruction register.

As shown in figure 3, three operation independent parts, respectively arithmetic, logical sum shift operation portion are contained in arithmetic unit inside Part, data to be processed are stored in buffer A and buffer B, and three parts are while receive data (some processors from A and B Architecture is put in shift operation device before arithmetic sum logic unit, such as ARM), control signal S3..S0, CN_I is determined Which component working, which kind of computing is carried out to operand, S3..S0 selects the result of this part to make by multidiameter option switch For the output of ALU；If computing affects carry flag FC, zero flag FZ, positive and negative flag bit FS, in the trailing edge of T3 states, knot Fruit is latched into respectively FC, FZ, FS；I is to interrupt to allow flag bit.

When micro-programming controller of the present invention works, shown in such as Fig. 4 (1), it includes arithmetic unit (ALU), general deposit The parts such as device (R0), program counter (PC), address register (MAR), command register (IR), microprogram control unit (uM), Plus program counter (PC), address register (MAR), memory MEM.See Fig. 4 (2) program counter (PC) schematic diagram and figure 4 (3) address register (MAR) schematic diagrams, PC is by the counter with preparatory function (two 74HC161), output to address bus Triple gate, the triple gate of output to internal data bus iDBus, PC display circuits composition.The nRst keys of CON units are pressed, can With reset PC；WPC low levels, write data on iDBus in PC in the trailing edge of T3；PC+1 signal high level, under T3 Drop edge, PC+1->PC；RPC is effective, on T1, T2 moment, PC data outputs to iDBus；Effectively, PC data outputs are arrived nPCOE On address bus.

For a person skilled in the art, technical scheme that can be as described above and design, make other each Plant corresponding change and deform, and all these changes and deforms the protection model that should all belong to the claims in the present invention Within enclosing.

Claims

1. a kind of experimental provision of Principles of Computer Composition, it is characterised in that including timing sequencer, memory, arithmetic unit and Controller；Wherein, (1) timing sequencer is used to produce this computer according to the control signal in reception timing control signal bus Cadence signal and reset signal needed for theory of constitution experimental provision, cadence signal send cadence signal bus, reset signal to send multiple Position holding wire；The time of various operations is controlled, control signal is received, stops the output of cadence signal；(2) microprogram control unit, For receiving the signal in clock signal bus, the cadence signal in cadence signal bus is received, received on reseting signal line Reset signal, according to needed for reset signal, instruction operation code and cadence signal produce this computer component principle experiment device Full control signal；(3) combinational logic control device, for receiving the signal in clock signal bus, receives cadence signal bus On cadence signal, receive reseting signal line on reset signal, according to reset signal, instruction operation code and cadence signal produce Full control signal needed for this computer component principle experiment device；Above-mentioned microprogram control unit and combinational logic control device are all The operation of energy independent control computer component principle experiment device other parts；In micro-programming controller, can only use The control signal that microprogram control unit is produced；When using combinational logic control device, can only be produced using combinational logic control device Control signal；Each microprogram of the microprogram control unit includes one or several microcommand, each microcommand correspondence One or several microoperation instructions for controlling each component actuation, all microprograms are stored in memory, the computer composition Usb communication, the computer is adopted to be embedded in experimental provision between the experimental provision and computer of principle.

2. a kind of experimental provision of Principles of Computer Composition according to claim 1, it is characterised in that the microprogram control Device processed includes control memory, micro-order register, micro address register, command register and command decoder, according to instruction The status condition of register, decoding generates the corresponding micro- address of the machine instruction, sends into micro address register；If not in fetching Condition, micro- address of micro address register comes from microinstruction register and is latched into the microcommand exported in control memory In microinstruction register.