CN106651740B - A method and system for fast imaging of ultrasound full data focusing based on FPGA - Google Patents

Abstract

The invention relates to an FPGA-based ultrasonic full-data focused fast imaging method and system. The FPGA-based ultrasonic full-data focused fast imaging method includes: collecting a first ultrasonic signal emitted by each array element of at least one first array element to the pixel point, and the pixel point reflects at least one second ultrasonic signal to at least one second array element, and stores the collected data; according to the first ultrasonic signal and at least one second ultrasonic signal, determine at least one a transmission delay; retrieve the data corresponding to the stored pixel point according to at least one transmission delay of the pixel point; synthesize the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; transform the pixel value corresponding to the pixel point to determine the pixel value , and imaged after acquiring the envelope of the resolved signal. Based on the imaging method of the present invention, the degree of parallelization of imaging is improved, the imaging efficiency is accelerated, and the influence of the increase of the number of array elements and the number of pixels on the efficiency is significantly improved.

Description

A method and system for fast imaging of ultrasound full data focusing based on FPGA

technical field

The invention relates to the field of ultrasonic detection, in particular to an FPGA-based method and system for fast imaging of ultrasonic full data focusing.

Background technique

Ultrasound full data focus (TFM) imaging is an advanced phased array detection method based on full matrix capture (FMC). application prospects.

TFM is an imaging method based on FMC. As shown in Figure 1, TFM grids the detection area, calculates the transmission delay according to the spatial distance between the array element and the pixel, retrieves the corresponding FMC data, and completes the superposition and synthesis of pixel points.

The value I of any pixel point P(x, z) is given by Equation 1.

h _ij is the received data of the j array element when the excitation array element is i, and has undergone the Hilbert transform. x _i and x _j are the abscissa coordinates of array elements i and j, respectively, c is the speed of sound, and N is the number of array elements.

For a long time, full data focus can only be realized in non-real time in the laboratory, and a large amount of data processing and calculation has become the bottleneck of its application. With its efficient concurrent execution capability, the parallel computing platform has become an important method to improve the efficiency of all-focus imaging.

Parallel computing platforms mainly include GPU, multi-core CPU and FPGA. The acceleration of the TFM algorithm based on GPU+CPU is the main implementation method in recent years, but it does not consider the impact of hardware acquisition and data transmission, and is limited by the parallel capability of the software processor, the TFM calculation efficiency is still insufficient, and the number of array elements or pixels increases , the imaging efficiency will drop sharply.

FPGA provides a good parallel platform for efficient computation of TFM. In 2013, a study proposed that TFM imaging based on multiple FPGAs can achieve a 73Hz imaging rate with 16 elements and 60*60 pixels, but when the pixels are increased to 128*128, the efficiency drops significantly below 20Hz. The reason is that the current FPGA design method is insufficiently parallelized. For example, the focusing delay is calculated by software and downloaded and stored, so that it takes multiple cycles for the FPGA to read the delay value and calculate a pixel, which limits the calculation efficiency; When the imaging rate is high, the imaging rate decreases significantly, and it is difficult to meet the requirements of TFM rapid detection represented by mechanical scanning.

In the prior art TFM imaging, due to insufficient parallelization of the calculation method, the imaging rate is low, and it is significantly affected by the number of array elements and pixels.

SUMMARY OF THE INVENTION

The purpose of the present invention is to address the defects of the prior art, and propose an FPGA-based ultrasound full data focusing fast imaging method and system. Compared with the prior art, the TFM imaging efficiency is effectively improved, and the number of array elements and pixels are significantly improved. The influence of the increase of the number on the imaging efficiency provides a fast imaging solution for the high-speed TFM detection represented by mechanical scanning.

In order to achieve the above object, on the one hand, the present invention provides an FPGA-based ultrasound full-data focused fast imaging method. The FPGA-based ultrasound full-data focused fast imaging specifically includes: collecting each array consisting of at least one first array element. The first ultrasonic signal transmitted by the element is sent to the pixel point, and at least one second ultrasonic signal is reflected by the pixel point to at least one second array element, and the collected data is stored; according to the first ultrasonic signal and at least one second ultrasonic signal , determine at least one transmission delay corresponding to the pixel point; retrieve the data corresponding to the stored pixel point according to at least one transmission delay of the pixel point; synthesize the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; The values are transformed, the analytic signal of the pixel value is determined, and the envelope of the analytic signal is acquired and imaged.

Preferably, the step of storing after collection specifically includes: storing the first ultrasonic signal and at least one second ultrasonic signal corresponding to the pixel in a dual-port memory.

Preferably, the method further includes: when the acquisition and retrieval are performed concurrently, the first port of the dual-port memory configured with the first port and the second port is used as the port for data input, and the dual-port memory configured with the first port and the second port is used as the port for data input. The second port of the port memory is used as the retrieval output of the data; after the collection is completed, when the retrieval is executed, the first port of the dual-port memory configured with the first port and the second port and the first port configured with the first port and the second port are configured. The second port of the dual-port memory is respectively used as the retrieval output.

Preferably, according to the first ultrasonic signal and the at least one second ultrasonic signal, the step of determining at least one transmission delay corresponding to a pixel specifically includes: calculating each of the at least one first array element corresponding to a pixel by a real-time delay algorithm The sound path between the array element and at least one second array element; at least one transmission delay is determined according to the sound path and the sound speed.

Preferably, the steps of calculating the sound path between each of the at least one first array element and the at least one second array element corresponding to the pixel point by the real-time delay algorithm are:

The abscissa x _i of the i-th array element of at least one first array element, the abscissa x _j of the j-th array element of at least one second array element, and the pixel coordinates are (x, z).

Preferably, the method further includes: concurrently calculating the first ultrasonic signal and the at least one second ultrasonic signal through a field programmable logic gate array chip to obtain at least one transmission delay corresponding to a pixel point.

Preferably, the step of transforming the pixel to obtain the analysis signal of the pixel specifically includes: transforming the pixel value according to the Hilbert transform, and changing the pixel value from a time-domain signal to a frequency-domain signal; The pixel values of the frequency domain signal synthesize the analytical signal.

Preferably, the step of imaging after acquiring the envelope of the analytical signal specifically includes: uploading the envelope of the analytical signal to a host computer for imaging.

Preferably, the Hilbert transform can also be: an FIR filter.

On the other hand, an embodiment of the present invention provides an FPGA-based ultrasound full-data focused fast imaging system, where the FPGA-based ultrasound full-data focused fast imaging system includes: an acquisition module, a storage module, a calculation module, a retrieval module, and a transformation module; The acquisition module is used to collect the first ultrasonic signal emitted by each array element of the at least one first array element to the pixel point, and to reflect at least one second ultrasonic signal from the pixel point to the at least one second array element; the storage module is used for is used to store the collected data; the calculation module is used to, according to the first ultrasonic signal and at least one second ultrasonic signal, determine at least one transmission delay corresponding to the pixel point; the retrieval module is used to, according to the at least one transmission time delay of the pixel point The data corresponding to the stored pixel points is retrieved by time delay; the synthesis module is used to synthesize the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; the transformation module is used to transform the pixel value corresponding to the pixel point to determine the analysis of the pixel value Signal.

The invention adopts FPGA on-chip calculation without CPU participation, effectively improves the parallelization degree of TFM imaging, accelerates the imaging efficiency, and at the same time significantly improves the influence of the increase of the number of array elements and the number of pixels on the efficiency.

Description of drawings

1 is an ultrasound full data focused imaging diagram in the prior art;

2 is a structural flowchart of a method for FPGA-based ultrasound full data focused fast imaging provided by an embodiment of the present invention;

Figure 3 is a polar coordinate conversion diagram;

Fig. 4 is the frequency, amplitude, phase diagram of FIR filter;

5 is a schematic structural diagram of an FPGA-based ultrasound full data focusing system for fast imaging provided by an embodiment of the present invention;

FIG. 6 is a specific imaging diagram based on the FPGA-based ultrasound full data focused fast imaging method in FIG. 1 .

Detailed ways

The technical solutions of the present invention will be further described in detail below through the accompanying drawings and embodiments.

The invention designs a fully parallel computing scheme in the FPGA chip, including real-time delay calculation based on CORDIC (Coordinate Rotational Digital Computer), parallel pixel synthesis and Hilbert transform after pixel synthesis. Real-time parallel calculation of focus delay, concurrent synthesis of multi-pixel points, and acquisition of pixel resolution signals are realized respectively.

FIG. 2 is a flowchart of an FPGA-based ultrasound full data focused fast imaging method provided by an embodiment of the present invention. As shown in Figure 2, the steps of the ultrasound full data focusing and fast imaging specifically include:

Step S100: Collect the first ultrasonic signal emitted by each of the at least one first array element to the pixel point, and reflect at least one second ultrasonic signal from the pixel point to the at least one second array element, and store after collection. ;

Taking the excitation-reception combination of N array elements as an example, each FMC acquisition only excites and transmits the first ultrasonic signal to one first array element in the ultrasonic phased array probe, and N second array elements are used as receiving units. In the channel phased array, N second ultrasonic signals can be obtained by one excitation, and the second ultrasonic waves are all echo signals received by the N second array elements. The first array element is the excited transmitting array element for transmitting the first ultrasonic signal, and the second array element is the receiving array element for receiving the second ultrasonic signal.

Take the 16-element system as an example, the process is: array element 1 transmits, and array elements 1-16 all collect the transmitted wave and ultrasonic reflected echo; after the acquisition, array element 2 transmits, and array elements 1-16 all collect and transmit Wave and ultrasonic reflection echoes; and so on, until the array element 16 transmits, the ultrasonic reflection echoes are collected by the array elements 1-16.

Due to the different imaging resolution, the number of pixels is also different. After the FMC acquisition is completed, the first ultrasonic signal and N second ultrasonic signals corresponding to the pixel points are stored in the dual-port memory.

Dual-port memory (True Dual-port RAM) is the on-chip resource of FPGA, which can meet various data read and write requirements. Compared with the off-chip cache method, the use of on-chip resource storage can improve the parallel read and write degree of the channel. Among the on-chip storage resources, dual-port memory can achieve double the data read bandwidth compared to single-port RAM and FIFO.

Step S110: Determine at least one transmission delay corresponding to the pixel point according to the first ultrasonic signal and at least one second ultrasonic signal;

Taking an excitation-reception combination with N array elements as an example, the N receiving units receive N second ultrasonic signals respectively, and each receiving array element receives only one second ultrasonic signal.

The time delay is based on the difference between the sound path and the sound speed of each of the N receiving array elements according to the excitation of one array element in the ultrasonic phased array probe to transmit the first ultrasonic signal to the pixel point, and the second ultrasonic signal reflected from the pixel point to each of the N receiving array elements. ratio obtained.

Specifically, according to the first ultrasonic signal and at least one second ultrasonic signal, the step of determining at least one transmission delay corresponding to a pixel point specifically includes:

According to the real-time delay algorithm (CORDIC algorithm), one array element in the ultrasonic phased array probe is excited to transmit the first ultrasonic signal to the pixel point, and the second ultrasonic signal is reflected from the pixel point to each of the N receiving array elements. The sound path of the element; the transmission delay is determined by the ratio of the sound path to the sound speed.

The CORDIC algorithm uses a series of fixed angles related to the operation base, and the angle is continuously swayed and iterated to approximate the required rotation angle, which is suitable for the calculation of coordinate transformation and trigonometric functions.

The CORDIC algorithm applied to coordinate transformation can rotate any input vector (X, Y) along the unit circle until the Y coordinate of the vector is 0, obtain the rotation angle θ and the modulo X' of the vector, so as to realize the conversion from polar coordinates to rectangular coordinates .

The propagation delay of TFM is derived from the sound path/sound velocity. The sound path between the pixel and the array element can be obtained in the CORDIC coordinate conversion, without direct square root operation, which greatly facilitates the sound path calculation.

For example, the array element i and the pixel point P(x, z), the input coordinate X of the CORDIC is the difference between the abscissa element i and the pixel point P(x, z), and the ordinate Y is the array element i and the pixel point P The Z-axis coordinate difference of (x, z), the amplitude result after the coordinate rotation is the one-way sound path between the pixel point P(x, z) and the array element i. The mathematical expression of this process is:

The bidirectional sound path between the combination of excitation by array element i and reception of array element j and pixel P(x, z) is:

A transmission delay is:

Among them, T is the transmission delay between array element i and array element j, and c is the speed of sound.

That is, the ratio between the excitation of array element i and the reception combination of N array elements and the speed of sound, that is, the N transmission delays required for each pixel in the TFM.

Optionally, the embodiment of the present invention adopts N CORDIC calculation modules based on FPGA, which can realize the concurrent calculation of N transmission delays, and meet the requirements for fast calculation of pixel values corresponding to pixel points. Compared with the conventional software calculation method, the embodiment of the present invention is completely calculated by the FPGA without any storage and reading, which can truly realize real-time parallel calculation, and effectively improve the TFM pixel calculation efficiency.

Step S120: retrieving data corresponding to the stored pixel point according to at least one transmission delay of the pixel point;

Step S130 : synthesizing pixel values corresponding to the pixel points according to the data corresponding to the pixel points.

Taking the excitation-reception combination of N array elements as an example, each pixel corresponds to N transmission delays. The N transmission delays are retrieved to retrieve the data stored in the dual-port memory, and the retrieved data is superimposed on the pixel of the pixel. Pixel values.

Since TFM imaging involves a lot of pixel values, the pixel values are generally stored first. When it is necessary to image the pixel value, the pixel value is directly obtained from the stored location.

Step S140: Transform the pixel value corresponding to the pixel point to determine the analysis signal of the pixel value.

The pixel value is transformed according to the Hilbert transform, and the pixel value of the time domain signal is converted into the pixel value of the frequency domain signal; the pixel value of the time domain signal and the pixel value of the frequency domain signal are combined into an analytical signal.

Hilbert transform is performed on the pixel value array to obtain the analytic signal of the pixel value, which ensures the imaging effect, conforms to the FPGA pipeline design, and reduces resource occupation.

In the field of communication, the Hilbert transform is an effective way to obtain the envelope of the signal. In post-processing imaging based on FMC, the analytical signal of ultrasonic echo is usually obtained by Hilbert transform first, and then the envelope signal of the analytical signal is obtained. Compared to direct imaging of the original signal, the envelope of the resolved signal results in smoother imaging.

In conventional TFM imaging, Hilbert transform is mainly implemented by software, and its point-by-point operation brings inconvenience to the real-time improvement of software. Hilbert transform is a linear transformation process, which conforms to the superposition principle. Therefore, in TFM imaging, the signals are first superimposed to obtain the pixel values corresponding to the pixels, and then the Hilbert transform to obtain the analytical signal has the same effect in theory as Hilbert transform and then superposition. However, the latter is more in line with the resource saving and pipeline computing of FPGAs.

The execution sequence of step S130 and step S140 may be that step S140 is executed first and then step S130 is executed. This embodiment of the present invention only enumerates that step S130 is performed and then step S140 is performed, and step S140 is performed first, which is not discussed here, and the imaging effects are the same.

The Hilbert transform is physically unrealizable, so an FIR filter is used in the FPGA to achieve the same function as the Hilbert transform.

The embodiment of the present invention adopts a 128-order FIR filter, and its frequency, amplitude and phase response are shown in Figure 3, wherein the amplitude spectrum has an all-pass characteristic, and the phase has strict linearity, which meets the requirements of Hilbert transform.

Step S150 : acquiring the envelope of the analytical signal and uploading it to the host computer for imaging.

Obtain the envelope of the analytical signal; upload the envelope signal to the host computer to display the image, thus completing the TFM imaging.

Since the dual-port memory configuration has two configurable first ports and second ports, the ultrasound full data focused imaging method further includes:

Step S160: When the FMC acquisition and retrieval are performed concurrently, the first port of the dual-port memory configured with the first port and the second port is used as the port for data input, and the dual-port memory configured with the first port and the second port is used. The second port is used as the retrieval output of data;

After the collection is completed, when the retrieval is executed, the first port of the dual-port memory configured with the first port and the second port is used as the retrieval output, and the second port of the dual-port memory configured with the first port and the second port is used as the retrieval output. Retrieve output.

Specifically, the dual-port memory is configured with a configurable first port and a second port, where the first port is port A and the second port is port B.

When FMC deceleration and retrieval are executed concurrently, port A is used as data input port, and port B is used as data retrieval output; when FMC collection is completed and only retrieval is performed, port A and port B are used as retrieval output, and port A and port B can be Independent of each other, it can support the calculation of 2N transmission delays for 2 pixels at the same time, and then retrieve the data corresponding to the pixels from port A and port B respectively, and synthesize the pixel values corresponding to the two pixels.

For one pixel, based on FPGA, N CORDIC calculation modules can be used to calculate N transmission delays; for 2 pixels, N CORDIC algorithm modules are formed into a delay module, and each pixel is based on The delay module obtains the corresponding N transmission delays, and then can obtain the calculation of the 2N transmission delays of the two pixel points, and then synthesize the pixel values corresponding to the two pixel points respectively.

Compared with the off-chip data cache and the on-chip common cache, the embodiment of the present invention can realize the concurrent calculation of 2 pixels, double the pixel calculation efficiency, and speed up the imaging rate. With the improvement of resources in the FPGA, when the number of array elements N increases, the instantiation of dual-port memory can be improved to ensure the FMC acquisition of each channel and reduce the impact of increasing N on TFM efficiency.

It should be noted that the one-dimensional linear array probe of N array elements performs FMC acquisition, and sequentially excites each array element. After each excitation, all array elements simultaneously and independently receive data. To activate each array element sequentially, N delay sequences can be used, and the delay sequence corresponds to the array elements to realize the sequential excitation of the array elements; it is also possible to realize N timings through software, and when the first time is reached, the first array is excited. Elements to pixels, and so on.

The embodiment of the present invention proposes an FPGA-based fully parallel TFM computing architecture, including CORDIC (Coordinate Rotational Digital Computer)-based real-time delay computation, parallel pixel synthesis, and Hilbert transform after pixel synthesis. The invention can realize the real-time concurrent calculation of the focusing delay without any storage, and can realize the concurrent synthesis of multiple pixel points at the same time. Compared with the conventional method, the present invention better utilizes the advantages of FPGA in parallel computing and signal processing, effectively improves the TFM imaging rate, and can significantly improve the influence of the increase in the number of array elements and pixels on the efficiency. The present invention can provide a fast imaging solution for high-speed TFM detection represented by mechanical scanning.

Figure 3 is a polar coordinate conversion diagram. As shown in Figure 3, the CORDIC algorithm is applied to polar coordinate transformation to convert any input vector (Input Vector) rotate along the unit circle until the If it is zero, the rotation angle (Outputphase) and the modulus of the input vector (Output Mag) are obtained, so as to realize the conversion from polar coordinates to rectangular coordinates.

The sound path between the pixel point and each of the at least one first array element and the at least one second array element can be obtained in the conversion from polar coordinates to rectangular coordinates of CORDIC.

For example, the array element i and the pixel point P(x, z), the input coordinate X of the CORDIC is the difference between the abscissa x of the array element i and the pixel point P(x, z), and the ordinate Y is the array element i and the pixel point. The difference between the vertical coordinates z of P(x, z) and the amplitude result after the coordinate rotation is the one-way sound path between the pixel point P(x, z) and the array element i. The mathematical expression of this process is:

Wherein, the abscissa X is the difference between the abscissa x _i of one array element of at least one first array element and the abscissa x of the pixel point, and the ordinate Y is the ordinate zi and z _i of one array element of at least one first array element The difference between the axis coordinates z of the pixel points.

The same function as the CORDIC algorithm can be replaced by equivalent.

Figure 4 shows the frequency, amplitude and phase diagrams of the FIR filter. As shown in Figure 4, the frequency (Frequency), the unit is MHz; the amplitude (Magnitude), the unit is dB (decibel); the phase (Phase), the unit is radians (radians).

The FIR filter is a 128-order filter, which is used to convert the pixel value of the time domain signal into the pixel value of the frequency domain signal.

As shown in Figure 4, the amplitude spectrum of the FIR filter has an all-pass characteristic, and the phase of the FIR filter has strict linearity, which meets the requirements of Hilbert transform.

It can be equivalently replaced with the same function as Hilber transform.

FIG. 5 is a schematic structural diagram of an FPGA-based ultrasound full data focusing fast imaging system provided by an embodiment of the present invention. As shown in Figure 5, the ultrasound full data focusing rapid imaging system includes:

The hardware part is based on FPGA. The FPGA-based ultrasound full data focusing fast imaging system includes an FMC acquisition module 10 , a storage module 20 , a calculation module 30 , a retrieval module 40 , a synthesis module 50 and a transformation module 60 .

The acquisition module 10 is used to collect the first ultrasonic signal emitted by each of the at least one first array element to the pixel point, and to reflect at least one second ultrasonic signal from the pixel point to the at least one second array element; the storage module 20 Used to store the collected data in the dual-port memory; the calculation module 30 is used to, according to the first ultrasonic signal and at least one second ultrasonic signal, determine at least one transmission delay corresponding to the pixel point; the retrieval module 40 is used to, according to At least one transmission delay of the pixel point retrieves the data corresponding to the stored pixel point; the synthesis module 50 is used for synthesizing the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; the transformation module 60 is used for the pixel value corresponding to the pixel point. A transformation is performed to determine the analytic signal of the pixel value.

Specifically, the storage module 20 is used for storing the collected data in the dual-port memory.

The dual-port memory is configured with a configurable first port and a second port, where the first port is port A and the second port is port B.

When FMC deceleration and retrieval are executed concurrently, port A is used as data input port, and port B is used as data retrieval output; when FMC collection is completed and only retrieval is performed, port A and port B are used as retrieval output, and port A and port B can be Independent of each other, it can support the calculation of 2N transmission delays for 2 pixels at the same time, and then retrieve the data corresponding to the pixels from port A and port B respectively, and synthesize the pixel values corresponding to the two pixels.

For one pixel, based on FPGA, N CORDIC calculation modules can be used to calculate N transmission delays; for 2 pixels, N CORDIC calculation modules are formed into a delay module, and each pixel is based on The delay module obtains the corresponding N transmission delays, and then can obtain the calculation of the 2N transmission delays of the two pixel points, and then synthesize the pixel values corresponding to the two pixel points respectively.

The calculation module 30 calculates the sound path between each of the at least one first array element corresponding to the pixel and at least one second array element through a real-time delay algorithm; and determines at least one transmission delay according to the sound path and sound speed.

The embodiment of the present invention adopts N CORDIC calculation modules based on the FPGA, which can realize the concurrent calculation of N transmission delays, and meet the requirements for fast calculation of pixel values corresponding to pixel points.

The synthesis module 50 transforms the pixel value according to the Hilbert transform, and changes the pixel value from a time-domain signal to a frequency-domain signal; and synthesizes the analytical signal according to the pixel value of the time-domain signal and the pixel value of the frequency-domain signal.

Since TFM imaging involves a lot of pixel values, the pixel values are generally stored first. The FPGA-based ultrasound full-data rapid imaging system further includes a storage module 70, which is used for storing pixel values, which may be a common cache or memory, which is not limited here, and is not marked in FIG. 5 .

In the software part, the FPGA-based ultrasound full-data focusing fast imaging system includes a system control module 80 and an image imaging module 90. The system control module 80 is used to sequentially excite the array elements, and the image imaging module 90 is used to obtain the envelope of the analytical signal and upload it to the system. PC imaging.

FIG. 6 is a specific imaging diagram based on the FPGA-based ultrasound full data focused fast imaging method in FIG. 1 . As shown in FIG. 6 , the embodiment of the present invention adopts 16/64 (pulse repetition frequency/number of array elements), and realizes the rapid detection of cracks and defects in the rail parent material through TFM real-time imaging.

The 1mm transverse perforation in the steel block is a common artificial defect. In the embodiment of the present invention, in order to verify the TFM calculation efficiency and imaging effect, TFM detection and imaging are performed on the 1mm transverse perforation with a depth of 20mm, and the imaging rate can reach 312.5Hz, which satisfies the fast, fast, and reliable performance of TFM. Real-time imaging inspection.

The present invention effectively improves the efficiency of ultrasound full data imaging, and the imaging rate is PRF/N (pulse repetition frequency/number of array elements), which reaches the physical limit of TFM detection; when the pixel resolution increases, the efficiency reduction is significantly reduced. improve.

Under the resolution of 100*100 and 200*200 pixels, the TFM imaging rate of 16 array elements in the embodiment of the present invention can reach 312.5 Hz, and the efficiency does not decrease with the increase of the number of pixels; when the number of pixels is 32, the TFM imaging rate can be Up to 156.25Hz, when the number of array elements increases, it meets the physical limit of PRF/N. It can provide a fast imaging solution for high-speed TFM inspection represented by mechanical scanning.

The invention adopts FPGA on-chip calculation without CPU participation, effectively improves the parallelization degree of TFM imaging, accelerates the imaging efficiency, and at the same time significantly improves the influence of the increase of the number of array elements and the number of pixels on the efficiency.

The specific embodiments described above further describe the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention, and are not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims (7)

1. a FPGA-based ultrasound full data focusing fast imaging method, is characterized in that, comprising: Collect the first ultrasonic signal emitted by each of the at least one first array element to a pixel point, and reflect at least one second ultrasonic signal from the pixel point to the at least one second array element, and collect the collected data storage; wherein, the first ultrasonic signal and the at least one second ultrasonic signal corresponding to the pixel are stored in a dual-port memory; when the acquisition and retrieval are performed concurrently, the first port and the second port are configured with the first port and the second port. The first port of the dual-port memory is used as the port for data input, and the second port of the dual-port memory configured with the first port and the second port is used as the retrieval output of data; after the collection is completed, when the retrieval is executed, The first port of the dual-port memory configured with the first port and the second port and the second port of the dual-port memory configured with the first port and the second port are respectively used as retrieval outputs; The first ultrasonic signal and the at least one second ultrasonic signal are concurrently calculated by a field programmable gate array (FPGA) chip to obtain at least one transmission delay corresponding to the pixel point; Retrieve the stored data corresponding to the pixel point according to at least one transmission delay of the pixel point; Synthesize the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; Transforming the pixel value corresponding to the pixel point, determining the analytical signal of the pixel value, and obtaining an image after obtaining the envelope of the analytical signal. 2 . The imaging method according to claim 1 , wherein the first ultrasonic signal and the at least one second ultrasonic signal are concurrently calculated by a Field Programmable Logic Gate Array (FPGA) chip, and the obtained result is obtained. 3 . The step of at least one transmission delay corresponding to the pixel point specifically includes: Calculate the sound path between each array element of the at least one first array element corresponding to the pixel point and the at least one second array element by using a real-time delay algorithm; The at least one transmission delay is determined based on the sound path and the sound speed. 3 . The imaging method according to claim 2 , wherein the calculation of each array element of the at least one first array element corresponding to the pixel point by a real-time delay algorithm and the at least one second array element are 3 . The steps of the sound path between the elements are: Wherein, x _i is the abscissa of the i-th array element of at least one first array element, x _j is the abscissa of the j-th array element of at least one second array element, and (x, z) is the pixel coordinate. 4. The imaging method according to claim 1, wherein the step of transforming the pixel value corresponding to the pixel point and determining the analytical signal of the pixel value specifically comprises: Transform the pixel value according to the Hilbert transform, and change the pixel value from a time-domain signal to a frequency-domain signal; An analytical signal is synthesized from pixel values of the time domain signal and pixel values of the frequency domain signal. 5. The imaging method according to claim 4, wherein the step of imaging after acquiring the envelope of the analytical signal specifically comprises: Upload the envelope of the analysis signal to the upper computer for imaging. 6 . The imaging method according to claim 4 , wherein the Hilbert transform can also be an FIR filter. 7 . 7. An FPGA-based ultrasound full-data focused fast imaging system, characterized in that, comprising: an acquisition module (10), a storage module (20), a calculation module (30), a retrieval module (40), and a synthesis module (50) and a transformation module (60); The acquisition module (10) is used for acquiring a first ultrasonic signal emitted by each of the at least one first array element to a pixel point, and reflecting at least one second ultrasonic signal from the pixel point to at least one first ultrasonic signal. binary element; The storage module (20) is used for storing the collected data; wherein, the first ultrasonic signal and the at least one second ultrasonic signal corresponding to the pixel are stored in a dual-port memory; when collecting and When the retrieval is executed concurrently, the first port of the dual-port memory configured with the first port and the second port is used as the port for data input, and the second port of the dual-port memory configured with the first port and the second port is used. As the retrieval output of the data; when the retrieval is performed after the collection is completed, the first port and the dual-port memory configured with the first port and the second port are configured with the first port and the second port. The second ports are respectively used as retrieval outputs; The calculation module (30) is used for concurrently calculating the first ultrasonic signal and the at least one second ultrasonic signal through a field programmable logic gate array (FPGA) chip to obtain at least one transmission corresponding to the pixel point delay; The retrieval module (40) is configured to retrieve the stored data corresponding to the pixel point according to at least one transmission delay of the pixel point; The synthesizing module (50) is configured to synthesize the pixel value corresponding to the pixel point according to the data corresponding to the pixel point; The transformation module (60) is used for transforming the pixel value corresponding to the pixel point, determining an analytical signal of the pixel value, and imaging after acquiring the envelope of the analytical signal.