CN106650009B - Method for estimating rapid transient heat distribution of microprocessor - Google Patents

Method for estimating rapid transient heat distribution of microprocessor Download PDF

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CN106650009B
CN106650009B CN201611041987.7A CN201611041987A CN106650009B CN 106650009 B CN106650009 B CN 106650009B CN 201611041987 A CN201611041987 A CN 201611041987A CN 106650009 B CN106650009 B CN 106650009B
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黄柯衡
张正鸿
陈云飞
王海
万家春
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University of Electronic Science and Technology of China
CETC 29 Research Institute
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Abstract

The invention relates to the field of microprocessors, in particular to a method for estimating the transient heat distribution of a microprocessor, which is used for solving the problems of larger calculation delay and larger temperature estimation error of temperature estimation in the prior art.

Description

Method for estimating rapid transient heat distribution of microprocessor
Technical Field
The invention relates to the field of microprocessors, in particular to a method for estimating the thermal distribution of a microprocessor in a fast transient state.
Background
With increasing integration, the high power density of microprocessors results in ever increasing chip temperatures. Excessive temperatures can have a variety of negative effects on the chip such as reduced transistor slew rate, increased interconnect delay, increased computational error rate, and reduced lifetime. Many dynamic thermal management techniques have been proposed to address the high temperature issues of microprocessors, including dynamic voltage frequency scaling techniques, task scheduling techniques, task migration techniques, clock gating techniques, and the like. Most of these dynamic thermal management techniques rely on-chip physical thermal sensors to provide chip temperature monitoring information. However, because the number of physical thermal sensors on a chip is rare and the distribution on the chip is not optimal, temperature monitoring using only the physical thermal sensors cannot obtain the hot spot temperature and thermal distribution information of the chip. The lack of thermal profile monitoring information for the entire microprocessor has a large impact on the effectiveness of thermal management. Specifically, a physical thermal sensor can only obtain a temperature reading of the location where it is located, which is often not the chip or even the highest temperature surrounding the physical sensor. This will make the corresponding dynamic thermal management technology misjudge the temperature condition of the chip, and then take the wrong thermal management decision, resulting in the reliability of the chip being reduced. Therefore, rapid and accurate microprocessor thermal profile estimation is the key point to ensure that dynamic thermal management techniques can make accurate thermal management decisions efficiently.
Through the search of the prior art documents, Shervin Sharifi and Tajana Simu routing published in IEEE Transactions On Computer-aid Design of Integrated Circuits and systems (IEEE Computer Aided Design collections of Integrated Circuits and systems) in 2010 in an article of Accurate Direct and indirect On-Chip thermal Sensing for Efficient Dynamic thermal management, which proposes that a thermal model-based software thermal sensor is used to acquire the thermal distribution of a Chip in the case of insufficient number of On-Chip physical thermal sensors; the method comprises the steps of firstly establishing a thermal model for a microprocessor chip, using chip power consumption estimation as the input of the thermal model, and calculating and estimating the temperature distribution of the chip; to obtain a more accurate temperature distribution estimate, the method uses physical thermal sensor readings in conjunction with a Kalman filter to correct the temperature distribution estimate. This method has two main drawbacks: first, since the chip thermal model is large in scale, using the thermal model directly will result in large thermal estimation delays; second, although the method employs thermal feedback based on a kalman filter for temperature estimation, the method has a large temperature estimation error at a location far from a physical thermal sensor because the correlation of power consumption between modules of a chip cannot be considered.
Disclosure of Invention
The invention aims to provide a quick and high-precision microprocessor transient heat distribution estimation method aiming at the problems of larger temperature estimation calculation delay and larger temperature estimation error in the prior art.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a method for microprocessor fast transient thermal profile estimation, comprising:
step 1, establishing a thermal model of a microprocessor;
step 2, compressing the thermal model obtained in the step 1 by adopting a structure-preserving model order-reducing method to obtain a compact thermal model of the microprocessor;
step 3, simulating and operating a standard test program on a microprocessor framework through microprocessor power consumption estimation software to obtain power consumption estimation of each functional module of the microprocessor;
step 4, acquiring power consumption error information of each functional module of the microprocessor by simulating and operating a plurality of test programs on the microprocessor, and calculating a correlation matrix among the power consumption errors of the functional modules, thereby constructing a power consumption error relation matrix of the microprocessor;
step 5, calculating transient heat distribution estimation: and (3) according to the compact thermal model obtained in the step (2) and the power consumption estimation of each functional module of the microprocessor obtained in the step (3), carrying out thermal estimation by adopting an Euler method, comparing the thermal estimation with the temperature measured by a thermal sensor, when the comparison difference is larger than a preset threshold value, carrying out feedback compensation on the power consumption estimation by adopting the power consumption error relation matrix of the microprocessor obtained in the step (4), and carrying out thermal estimation on the compensated power consumption estimation and the compact thermal model again to obtain the thermal distribution estimation of the microprocessor.
The invention has the beneficial effects that: the invention can quickly and accurately estimate the transient heat distribution of the microprocessor by utilizing the full-chip heat estimation technology based on the compact thermal model of the microprocessor and the heat estimation correction technology based on the reading feedback of the physical heat sensor.
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FIG. 1 is a flowchart illustrating a method for estimating a fast transient thermal profile of a microprocessor according to the present invention.
FIG. 2 is a diagram of a microprocessor chip architecture.
FIG. 3 is a comparison chart of the feedback compensation effect of the thermal estimation method for power consumption estimation.
FIG. 4 is a graph comparing the effects of the thermal estimation method of the present invention on the estimation of the temperature distribution of the chip.
Detailed Description
The invention provides a method for estimating the rapid transient heat distribution of a microprocessor, which estimates the power consumption of each part of the microprocessor by using a performance counter on the microprocessor, calculates the heat distribution of the microprocessor by a compact thermal model of the microprocessor, and simultaneously carries out feedback correction on the heat estimation by combining the reading of an on-chip physical heat sensor and the power consumption correlation of each functional module of the microprocessor so as to obtain the accurate heat distribution of the microprocessor.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and examples.
The present embodiment provides a method for transient fast heat estimation of a microprocessor, as shown in fig. 1, the method includes the following specific steps:
step 1, establishing a chip thermal model;
specifically, in the embodiment of the invention, the method further comprises the steps of constructing a microprocessor architecture, establishing a basic thermal model of the chip, and adjusting the thermal model structure of the chip according to the distribution positions of the physical thermal sensors.
The structure of the microprocessor in this embodiment is shown in fig. 2, where fig. 2(a) shows the overall architecture of a dual-core microprocessor, and fig. 2(b) shows the specific architecture inside each core in the dual-core processor; a finite difference method is used to build a thermal model represented by the following system of differential equations:
Figure BDA0001160652220000031
setting a total of n thermal nodes, n, of the chippThe function modules are that the C matrix and the G matrix are constant matrixes with the size of n multiplied by n, and the B matrix is constant matrixes with the size of n multiplied by nPA constant matrix of size, U (t) being of length npT (t) is the chip hot node vector of length n that needs to be calculated;
further, the chip thermal model is subjected to row-column transformation according to the distribution positions of the physical thermal sensors to obtain the following formula:
Figure BDA0001160652220000032
wherein, TsThe chip thermal nodes in (T) all contain physical thermal sensors, and Tu(t) none of the chip thermal nodes in (t) contain a physical thermal sensor;
step 2, establishing a compact thermal model of the chip;
specifically, in the embodiment of the invention, the chip thermal model established in the step 1 is compressed by adopting a structure-preserving model order-reducing method to obtain a chip compact thermal model;
further, firstly, a projection matrix V with the size of n multiplied by k (k < < n) is calculated by using a common model order reduction method; the projection matrix can be obtained by two methods: one is based on a Krylov subspace (Krylov subspace) method, which needs to specify a frequency domain expansion point, and the frequency 0 point is expanded in the embodiment; the other method is based on sampling, the sampling rule needs to specify the sampling frequency points, and the sampling frequency points in this embodiment are 0 and 100 Hz.
Converting the projection matrix V calculated by the common model order reduction method into a projection matrix with a structure maintained; according to the structure divided in the heat obtaining model in the step 1, the projection matrix V is also divided as follows:
Figure BDA0001160652220000041
subsequently, the projection matrix is converted into a structurally maintained projection matrix VspThe following were used:
Figure BDA0001160652220000042
wherein orth represents the pair V1And V2Performing orthonormal processing to improve the numerical performance;
using VspThe compact thermal model for structural retention is obtained as follows:
Figure BDA0001160652220000043
its equivalent matrix form is written as:
Figure BDA0001160652220000044
step 3, calculating power consumption data of the chip;
specifically, in the embodiment, the power consumption of the chip running the standard test program is calculated through the microprocessor power consumption estimation software;
according to the microprocessor architecture shown in FIG. 2, a power consumption estimation software Wattch based on SimpleScalar software is used for simulating and running a SPEC2000 standard test program on the microprocessor architecture to obtain transient data of dynamic power consumption and static power consumption; then, mapping the power consumption information to each functional module of the chip to obtain transient power consumption data of each functional module of the chip;
step 4, constructing a power consumption error relation of the chip hot node;
specifically, in this embodiment, a correlation matrix (correlation matrix) between power consumption errors of functional modules is calculated by performing simulation operation on a chip on power consumption error information of each functional module of the chip obtained by running a plurality of test programs, and a power consumption error relationship matrix of the chip is established according to the correlation matrix;
b test programs with stable power consumption are operated on the chip by using power consumption estimation software, and the power consumption of each functional module of the chip when the b test programs are operated is recorded; then, actually running the same b test programs by using a test chip, and recording the steady-state temperature distribution of the chip when the b test programs are run; finally, calculating the power consumption of each functional module of the chip when the b programs are operated by using a reverse power consumption calculation method for calculating the power consumption through the temperature;
further, the results of the steps 1 and 2 are used for calculating power consumption estimation error matrixes of each functional module of the chip, and the power consumption estimation error matrixes are divided into the following parts according to the structure of the heat obtaining model in the step 1:
Figure BDA0001160652220000051
wherein, the ith column Δ uiBy
Figure BDA0001160652220000052
And
Figure BDA0001160652220000053
composition nsIs the number of chip physical thermal sensors, npThe number of functional modules of the chip.
The Δ U is used to construct a correlation matrix between power consumption errors of the functional blocks as follows:
Figure BDA0001160652220000054
wherein, muiIs Δ uiThe equation can be divided as follows:
Figure BDA0001160652220000055
the correlation matrix is a symmetric matrix, in which the values are all between-1 and 1, reflecting the correlation between two variables (specifically, -1 and 1 indicate that two variables are completely correlated, and 0 indicates that two variables are completely independent and uncorrelated);
further, for each function module without a heat sensor, determining which function module with a heat sensor the function module needs to be associated with; due to EusThe value in (A) reflects the correlation of a functional module with a thermal sensor with a functional module without a thermal sensor, and we look at EusThe values of the matrix elements determine which functional module containing a thermal sensor the ith functional module containing a thermal sensor needs to be associated with: to EusThe ith row of (2) finds out the element with the largest value, records the column number as j, and then indicates that the ith functional module without the thermal sensor needs to be associated with the jth functional module with the thermal sensor.
Determining the relation between the power consumption errors of the associated functional modules, and if the ith functional module without the thermal sensor is associated with the jth functional module with the thermal sensor, using the power consumption error information of the previously obtained b programs
Figure BDA0001160652220000061
And
Figure BDA0001160652220000062
the following relationship was obtained by linear regression method: Δ uj＝ajΔui；
For each pair of associated functional modules, the above steps are performed, and then the following relation is established: delta Ua＝DpΔUs；
Wherein,
Figure BDA0001160652220000063
including the power consumption errors of all the functional blocks,
Figure BDA0001160652220000064
a power consumption error of the functional block including the physical thermal sensor is included;
constructing a power consumption error relation of the chip hot node according to the power consumption error relation of the chip functional module of the formula:
Figure BDA00011606522200000613
wherein,
Figure BDA0001160652220000065
a power consumption error relation matrix of the chip thermal node represents the power consumption error relation between the thermal node without the physical thermal sensor and the thermal node with the physical thermal sensor, and belongs touRepresents a thermal node power consumption error, e, without a physical thermal sensorsRepresenting a thermal node power consumption error with a physical thermal sensor; the D matrix is: d ═ MDp(ii) a Wherein, the element in the ith row and the jth column in the M matrix is a non-zero value when the ith hot node without a physical thermal sensor is located in the jth functional module, and the value is calculated by the following formula:
Figure BDA0001160652220000066
wherein,
Figure BDA0001160652220000067
is the ratio of the power consumption of the ith thermal node without the physical thermal sensor to the total power consumption of the functional module in which the thermal node is located,
Figure BDA0001160652220000068
the ratio of the power consumption of a hot node where a physical thermal sensor is located in a functional module which is associated with the functional module and contains the physical thermal sensor to the total power consumption of the functional module where the physical thermal sensor is located;
step 5, calculating transient heat distribution estimation;
specifically, in the present embodiment, the chip is first thermally estimated using the chip compact thermal model obtained in step 2 and the chip power consumption estimation obtained in step 3, and when the temperature at the physical thermal sensor obtained by thermal estimation has a large error with the reading of the physical thermal sensor, the power consumption is feedback-compensated using the power consumption error relationship of the chip thermal node obtained in step 4;
using the chip compact thermal model obtained in step 2 and the chip power consumption estimate obtained in step 3 to perform thermal estimation on the chip using the euler method as follows:
Figure BDA0001160652220000069
comparing the temperature estimate at the physical thermal sensor of the above equation to readings of the physical thermal sensor at certain time intervals; if the comparison difference is larger than the preset threshold, performing power consumption feedback compensation according to the following method:
establishing a power consumption error relationship of the thermal nodes for the compact thermal model as follows:
Figure BDA00011606522200000610
wherein,
Figure BDA00011606522200000611
a thermal node power consumption error relationship matrix which is a compact thermal model;
further, it is calculated using the following formula
Figure BDA00011606522200000612
Figure BDA0001160652220000071
Then again according to
Figure BDA0001160652220000072
Value calculation of
Figure BDA0001160652220000073
Using calculated
Figure BDA0001160652220000074
The power consumption estimate is compensated as follows:
Figure BDA0001160652220000075
wherein i is 1,2, …;
the compensated power consumption estimation and the chip compact thermal model are utilized to carry out continuous thermal estimation to obtain
Figure BDA0001160652220000076
Finally will be
Figure BDA0001160652220000077
Reduction to T (t):
Figure BDA0001160652220000078
and finally obtaining the temperature estimation of the chip.
Fig. 3 is a graph showing the comparison of the feedback compensation effect of power consumption estimation performed by the thermal estimation method according to the present invention, where (a) is the real chip power consumption distribution, (b) is the chip power consumption distribution estimation with significant error estimated by the power consumption estimation software, and (c) is the chip power consumption distribution estimation after the error compensation of the power consumption according to the present invention, it can be seen from the graph that the power consumption distribution (b) estimated by directly using the power consumption estimation software has significant error difference from the real chip power consumption distribution (a), and the new power consumption distribution estimation (c) generated after the error compensation of the power consumption distribution estimation by using the method according to the present invention has no significant difference from the real chip power consumption distribution. Fig. 4 is a graph showing comparison of the effect of the thermal estimation method for estimating the chip temperature distribution according to the present invention, wherein (a) is the result of transient thermal estimation at the monitoring point OP1, and (b) is the result of transient thermal estimation at the monitoring point OP 2; it can be seen from the figure that the method proposed by the present patent has only a small error between the estimated temperature curve (red estimated) and the real temperature curve (actual) of the chip. Compared with the temperature curve (org estimated) estimated by a method without model reduced compact thermal modeling processing, the chip compact thermal model established by model reduced order is very accurate, and has no obvious influence on the temperature estimation accuracy. Compared with the temperature curve (kalman) estimated by the existing thermal distribution estimation method based on the kalman filter, the temperature estimation accuracy of the method provided by the patent is far higher than that of the thermal distribution estimation method based on the kalman filter.
The present invention provides a method for transient fast thermal estimation of a microprocessor, which is described in detail above, and the present invention is described in the following with specific examples to explain the principle and the implementation of the present invention, and the description of the above embodiments is only used to help understanding the solution of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (1)

1. A method for microprocessor fast transient thermal profile estimation, comprising:
step 1, establishing a thermal model of a microprocessor;
step 2, compressing the thermal model obtained in the step 1 by adopting a structure-preserving model order-reducing method to obtain a compact thermal model of the microprocessor;
step 3, simulating and operating a standard test program on a microprocessor framework through microprocessor power consumption estimation software to obtain power consumption estimation of each functional module of the microprocessor;
step 4, acquiring power consumption error information of each functional module of the microprocessor by simulating and operating a plurality of test programs on the microprocessor, and calculating a correlation matrix among the power consumption errors of the functional modules, thereby constructing a power consumption error relation matrix of the microprocessor; the method specifically comprises the following steps: b test programs with stable power consumption are operated on the microprocessor by using power consumption estimation software, and the power consumption of each functional module of the microprocessor when the b test programs are operated is recorded; then, actually running the same b test programs by using a test microprocessor, and recording the steady-state temperature distribution of the microprocessor when the b test programs are run; finally, calculating the power consumption of each functional module of the microprocessor when the b programs are operated by using a reverse power consumption calculation method for calculating the power consumption through temperature;
step 5, calculating transient heat distribution estimation: performing heat estimation by adopting an Euler method according to the compact thermal model obtained in the step 2 and the power consumption estimation of each functional module of the microprocessor obtained in the step 3, comparing the heat estimation with the temperature measured by a heat sensor, performing feedback compensation on the power consumption estimation by adopting the power consumption error relation matrix of the microprocessor obtained in the step 4 when the comparison difference is larger than a preset threshold value, and performing heat estimation on the compensated power consumption estimation and the compact thermal model again to obtain the heat distribution estimation of the microprocessor; the method specifically comprises the following steps:
using the compact thermal model of the microprocessor obtained in step 2 and the power consumption estimate of the microprocessor obtained in step 3 to perform thermal estimation on the chip using the euler method as follows:
Figure FDA0002475289260000011
wherein,
Figure FDA0002475289260000012
for temperature estimation of a compact thermal model of a microprocessor,
Figure FDA0002475289260000013
are a constant matrix of compact thermal models of microprocessors,
Figure FDA0002475289260000014
power consumption estimation for a compact thermal model of a microprocessor;
comparing the temperature estimate at the physical thermal sensor of the above equation to readings of the physical thermal sensor at certain time intervals; if the comparison difference is larger than the preset threshold, performing power consumption feedback compensation according to the following method:
establishing a power consumption error relationship of the thermal nodes for the compact thermal model as follows:
Figure FDA0002475289260000015
wherein,
Figure FDA0002475289260000016
a thermal node power consumption error relationship matrix that is a compact thermal model,
Figure FDA0002475289260000017
thermal node power consumption error free of physical thermal sensors representing a compact thermal model,
Figure FDA0002475289260000018
a thermal node power consumption error of a physical thermal sensor containing representing a compact thermal model;
further, it is calculated using the following formula
Figure FDA0002475289260000021
Figure FDA0002475289260000022
Wherein, Ik×kIs a matrix of the units,
Figure FDA0002475289260000023
a thermal node temperature estimate without a physical thermal sensor representing a compact thermal model of a microprocessor,
Figure FDA0002475289260000024
a thermal node temperature estimate containing a physical thermal sensor representing a compact thermal model of the microprocessor;
then again according to
Figure FDA0002475289260000025
Value calculation of
Figure FDA0002475289260000026
Using calculated
Figure FDA0002475289260000027
The power consumption estimate is compensated as follows:
Figure FDA0002475289260000028
wherein i＝1,2,…；
Using the compensated power consumption estimation and the compact thermal model of the microprocessor to continue thermal estimation
Figure FDA0002475289260000029
Finally will be
Figure FDA00024752892600000210
Reduction to T (t):
Figure FDA00024752892600000211
Vspa projection matrix that is a compact thermal model of the microprocessor; and finally obtaining the temperature estimation of the microprocessor.
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