CN106603434A - System and method to avoid head-of-line blocking in multi-channel data transmission process - Google Patents
System and method to avoid head-of-line blocking in multi-channel data transmission process Download PDFInfo
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- CN106603434A CN106603434A CN201611117785.6A CN201611117785A CN106603434A CN 106603434 A CN106603434 A CN 106603434A CN 201611117785 A CN201611117785 A CN 201611117785A CN 106603434 A CN106603434 A CN 106603434A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/6205—Arrangements for avoiding head of line blocking
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/6245—Modifications to standard FIFO or LIFO
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- Computer Networks & Wireless Communication (AREA)
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- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention provides a system and method to avoid head-of-line blocking in multi-channel data transmission process wherein the method comprises: polling each transmission channel; when data forwarding is monitored in the transmission channels, transferring the data in transmission to an RAM unit; and recording the link address of the data corresponding to the RAM unit; determining whether the data in the RAM unit meet the output conditions or not; if the data meet the output conditions, when the starting address of the current data in the channel link list is determined, updating the link address corresponding to the current data to the output list; and according to the link sequence of the output link list, transmitting the data in the RAW unit to an output port from which the data are outputted; if the data do not meet the output conditions, continuing to monitor whether there are output conditions for the data in the RAM unit and when the data are transferred to the RAM and are transmitted from the RAM unit to the output port, updating all address link lists in the RA unit. With the system and method of the invention, it is possible to avoid the problem that the head-up obstruction occurs in the multi-channel data transmission process, and reduces the size and the cost of the chip.
Description
Technical field
The present invention relates to network communication field, more particularly to a kind of avoid hol blocking during multi-channel data transmission
System and method.
Background technology
In network exchanging chip, when the message of multiple passages needs to export from same port, the port would generally
Set up a FIFO（The abbreviation of English First In First Out）Queue is queued up and processes multichannel message.FIFO be
The data buffer often used in ASIC or FPGA design, the FIFO perform first in first out during data conversion storage
Strategy；Due to the characteristic of FIFO first in first out, if the passage of team's head is unsatisfactory for the condition for exporting, even if passage below meets
Output condition can not be exported, and cause the heavy losses of bandwidth.
As shown in figure 1, message is ranked according to the sequencing for reaching fifo queue, advanced message first goes out, due to
Passage #0 is unsatisfactory for output condition, though passage #1 meet output condition also can be by hol blocking in FIFO.
Traditional solution, is that multiple passages configure multiple FIFO, by the packet storage of different passages different
In fifo queue, and all passages are scheduled to solve the problems, such as hol blocking.But with the raising of bandwidth, passage
Quantity increases, and FIFO quantity is also corresponded to be increased, and causes the complexity of front and back end design to increase, and resource occupation is too many, greatly improves
The area and cost of chip；Meanwhile, the resource that each passage takes is relatively fixed, it is impossible to share to other passages, so as to
Cause the waste of resource.
The content of the invention
To solve above-mentioned technical problem, it is an object of the invention to provide one kind avoids multi-channel data transmission process squadron
The system and method for head of line blocking.
One of for achieving the above object, during what an embodiment of the present invention was provided avoids multi-channel data transmission
The method of hol blocking includes：In transmission chip, the multiple transmission channels of correspondence increase a ram cell, and mono- with the RAM
One RA unit of first depth identical；
The ram cell is used for the data for concentrating each transmission channel transmission of caching；The RA units are used for storage address chained list；
The address link list includes：
The correspondence ram cell is arranged, and for recording the remaining space chained list of the ram cell remaining space；
Corresponding each transmission channel is respectively provided with, and for recording the passage chained list of data output sequence in each transmission channel；
And the output chained list of the transmission order of the data of output condition is met for record；
Poll each transmission channel, when there is data forwarding in transmission channel is monitored, by the data conversion storage of current transmission to institute
State in ram cell, and record the chained address of the data correspondence ram cell；
Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；
If so, current data corresponding chained address is updated in the output chained list；
And according to the link order of the output chained list, the data is activation in the ram cell is exported to output port；
If it is not, whether the data for continuing the passage chained list initial address of corresponding each transmission channel of monitoring meet output condition；
Wherein, the data conversion storage is sent to the output port to the ram cell and from the ram cell, right
In RA units, each address link list is updated.
Used as the further improvement of embodiment of the present invention, methods described also includes：
Before the data of first forwarding are received, to the ram cell and RA units initialization；
The initialization includes：Whole storage address of the ram cell are carried out into link by chained list and forms remaining space chain
Table, and record initial address, end address and the link order of the remaining space chained list；
In data forwarding process, the data of current forwarding keep in rising to the corresponding remaining space chained list of the ram cell
After in beginning address, the remaining space chained list is updated；
If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；
If current residual space chained list is with the chained address of 2 or more than 2, will be with current occupied remaining space chain
Initial address of the adjacent chained address of table initial address as new remaining space chained list.
Used as the further improvement of embodiment of the present invention, methods described also includes：
In data forwarding process, if the data of current transmission are unsatisfactory for output condition, current data place transmission channel is updated
Corresponding passage chained list；
If it is sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is set to the initial address of the corresponding passage chained list of current channel；
If it is not sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence
The chained address of the ram cell is linked as the end address of the corresponding passage chained list of current channel；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；
If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current data correspondence described
The chained address of ram cell links to the output chained list；
If it is not sky currently to meet the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is linked as the end address of the passage chained list.
As the further improvement of embodiment of the present invention,
Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition, if so, will
The corresponding chained address of current data is specifically included in being updated to the output chained list：
In data forwarding process, if the data corresponding to the initial address in passage chained list meet output condition, institute is updated
State output chained list；
If currently output chained list is sky, the chained address of current data correspondence described ram cell is set to into the output chain
The initial address of table；
If presently described output chained list is not sky, the chained address of current data correspondence described ram cell is linked as described
The end address of output chained list；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；
If the corresponding passage chained list of current data only has 1 chained address, the passage chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, rising passage chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new passage chained list.
Used as the further improvement of embodiment of the present invention, methods described also includes：In data forwarding process, if described
Data in ram cell send to output port from the ram cell according to the link order of the output chained list and are exported；
The initial address of the corresponding output chained list of current data is discharged then, to update the output chained list；
If the corresponding output chained list of current data only has 1 chained address, the output chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, by rising for output chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new output chained list；
Meanwhile, the chained address of current data correspondence described ram cell is written back to into the remaining space chained list, and is linked
For the end address of the remaining space chained list.
In order to realize one of foregoing invention purpose, one kind of the present invention avoids hol blocking during multi-channel data transmission
System include：Data memory module, which includes：The ram cell that the multiple transmission channels of correspondence increase, and with the RAM
One RA unit of unit depth identical；
The ram cell is used for the data for concentrating each transmission channel transmission of caching；The RA units are used for storage address chained list；
The address link list includes：
The correspondence ram cell is arranged, and for recording the remaining space chained list of the ram cell remaining space；
Corresponding each transmission channel is respectively provided with, and for recording the passage chained list of data output sequence in each transmission channel；
And the output chained list of the transmission order of the data of output condition is met for record；
Data processing update module, for each transmission channel of poll, when there is data forwarding in transmission channel is monitored, ought
The data conversion storage of front transmission is into the ram cell, and records the chained address of the data correspondence ram cell；
Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；
If so, current data corresponding chained address is updated in the output chained list；
And according to the link order of the output chained list, the data is activation in the ram cell is exported to output port；
If it is not, whether the data for continuing the passage chained list initial address of corresponding each transmission channel of monitoring meet output condition；
Wherein, the data conversion storage is sent to the output port to the ram cell and from the ram cell, right
In RA units, each address link list is updated.
Used as the further improvement of embodiment of the present invention, the system also includes：Initialization module；
The initialization module is used for：Before the data of first forwarding are received, at the beginning of the ram cell and the RA units
Beginningization；
The initialization includes：Whole storage address of the ram cell are carried out into link by chained list and forms remaining space chain
Table, and record initial address, end address and the link order of the remaining space chained list；
The data processing update module specifically for：In data forwarding process, the current data for forwarding are kept in mono- to the RAM
After in the initial address of the corresponding remaining space chained list of unit, the remaining space chained list is updated；
If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；
If current residual space chained list is with the chained address of 2 or more than 2, will be with current occupied remaining space chain
Initial address of the adjacent chained address of table initial address as new remaining space chained list.
Used as the further improvement of embodiment of the present invention, the data processing update module is additionally operable to：Data forwarding mistake
Cheng Zhong, if the data of current transmission are unsatisfactory for output condition, updates the CHN chain corresponding to the transmission channel of current data place
Table；
If it is sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is set to the initial address of the corresponding passage chained list of current channel；
If it is not sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence
The chained address of the ram cell is linked as the end address of the corresponding passage chained list of current channel；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；
If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current data correspondence described
The chained address of ram cell links to the output chained list；
If it is not sky currently to meet the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is linked as the end address of the passage chained list.
Used as the further improvement of embodiment of the present invention, the data processing update module is additionally operable to：Data forwarding mistake
Cheng Zhong, if the data corresponding to the initial address in passage chained list meet output condition, updates the output chained list；
If currently output chained list is sky, the chained address of current data correspondence described ram cell is set to into the output chain
The initial address of table；
If presently described output chained list is not sky, the chained address of current data correspondence described ram cell is linked as described
The end address of output chained list；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；
If the corresponding passage chained list of current data only has 1 chained address, the passage chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, rising passage chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new passage chained list.
Used as the further improvement of embodiment of the present invention, the data processing update module is additionally operable to：Data forwarding mistake
Cheng Zhong, if the data in the ram cell are sent to outfan from the ram cell according to the link order of the output chained list
Mouth is exported；
The initial address of the corresponding output chained list of current data is discharged then, to update the output chained list；
If the corresponding output chained list of current data only has 1 chained address, the output chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, by rising for output chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new output chained list；
Meanwhile, the chained address of current data correspondence described ram cell is written back to into the remaining space chained list, and is linked
For the end address of the remaining space chained list.
Compared with prior art, the of the invention system and method for avoiding hol blocking during multi-channel data transmission,
By increasing ram cell and RA units, the data forwarded in making each transmission channel are temporarily stored in the ram cell, and are being counted
According to meeting after output condition, according to the linking relationship of each address link list in RA units, the very first time is exported from ram cell；
Avoid the problem of hol blocking during multi-channel data transmission from occurring, and under high bandwidth, facilitating chip design reduces core
The area and cost of piece.
Description of the drawings
During Fig. 1 is prior art, the structural representation of fifo buffer；
Fig. 2 is the flow chart that an embodiment of the present invention avoids the method for hol blocking during multi-channel data transmission；
Fig. 3 is the module diagram that an embodiment of the present invention avoids the system of hol blocking during multi-channel data transmission.
Specific embodiment
Describe the present invention below with reference to each embodiment shown in the drawings.But these embodiments are not
Limit the present invention, structure, method or change functionally that one of ordinary skill in the art is made according to these embodiments
Change and be all contained in protection scope of the present invention.
As shown in Fig. 2 the side for avoiding hol blocking during multi-channel data transmission that an embodiment of the present invention is provided
Method, for network chip, it is to avoid when multichannel transmission data is exported by an output port in network chip, cause team's head
The generation of the problem of obstruction；Methods described includes：
S1, in transmission chip, the multiple transmission channels of correspondence increase a ram cell, and with the ram cell depth identical
One RA unit；The ram cell is used for the data for concentrating each transmission channel transmission of caching；The RA units are used for storage
Location chained list；The address link list includes：The correspondence ram cell is arranged, and for recording the surplus of the ram cell remaining space
Complementary space chained list；Correspondence each transmission channel is respectively provided with, and for recording the logical of data output sequence in each transmission channel
Road chained list；And the output chained list of the transmission order of the data of output condition is met for record.
It should be noted that every kind of address link list is respectively provided with its corresponding initial address and end address, when institute's address chain
When only having a chained address in table, it is also end address that the chained address is initial address, and here is not described in detail.
In present embodiment, abbreviation of the ram cell for random access memory, the RA units are
The abbreviation of Register array.
Further, methods described also includes：S2, poll each transmission channel, when there are data in monitoring transmission channel
During forwarding, by the data conversion storage of current transmission to the ram cell, and record the chain of the data correspondence ram cell
Ground connection location.
S3, judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；
If so, current data corresponding chained address is updated in the output chained list；And it is suitable according to the link of the output chained list
Sequence, the data is activation in the ram cell is exported to output port；If it is not, continuing corresponding each transmission channel of monitoring
The data of passage chained list initial address whether meet output condition；Wherein, the data conversion storage to the ram cell and from
The ram cell is sent to the output port, and each address link list in RA units is updated.
In the preferred embodiment for the present invention, step S2 is specifically included：A default clock cycle, each clock cycle
Under, poll each transmission channel, to judge respectively to whether there is data forwarding in each transmission channel.
Under each clock cycle, the chain first address in poll each transmission channel, i.e. each transmission channel are corresponding logical
The initial address of road chained list, judges whether which meets output condition, when output condition is met, the data corresponding chain is grounded
Location is linked on output chained list, and current chained address will be below will be described in detail as the end address of output chained list.
In the preferred embodiment for the present invention, methods described also includes：Before the data of first forwarding are received, to described
Ram cell and RA units initialization；The initialization includes：Whole storage address of the ram cell are passed through into chained list
Carry out link and form remaining space chained list, and it is suitable to record initial address, end address and the link of the remaining space chained list
Sequence.
In present embodiment, it is initialized during, monoblock ram cell is linked by chained list, and its link is suitable
Sequence can be according to user's request set up of character patt ern, such as：Using first address in the ram cell depth as initial address, it
From first address of the ram cell, ascending order is linked to last address successively afterwards；Can also by depth last
Address as initial address, first address being linked to from last address of ram cell successively descending in depth afterwards,
Can also be using any one address in ram cell depth as initial address, here is not described in detail.
Further, in an embodiment of the present invention, step S2 is specifically included：In data forwarding process, work as forward
After the data sent out are kept in into the initial address of the corresponding remaining space chained list of the ram cell, update described remaining empty
Between chained list；If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；If
Current residual space chained list, then will be with current occupied remaining space chained list starting with the chained address of 2 or more than 2
Initial address of the adjacent chained address in address as new remaining space chained list.
It is understood that each transmission channel is corresponded to, and its shared ram cell, when data forwarding is monitored, will the number
According to being transferred to the ram cell, and the initial address of current residual space chained list is sequentially transferred every time be allocated to current turning
Data are sent out, and updates remaining space chained list, by the chained address adjacent with current occupied remaining space chained list initial address
As new remaining space chained list initial address；Meanwhile, when the data is activation in the ram cell to output port is entering line number
According to during output, the corresponding chained address of current data will be written back in remaining space chained list, and as remaining space again
The end address of chained list, also may proceed to description below.
Further, step S2 also includes：In data forwarding process, if the data of current transmission are unsatisfactory for output bars
Part, then update the passage chained list corresponding to the transmission channel of current data place；If the data for being currently unsatisfactory for output condition are located
Passage chained list corresponding to passage is sky, then the chained address of current data correspondence described ram cell is set to current channel
The initial address of corresponding passage chained list；If being currently unsatisfactory for passage chained list corresponding to the data place passage of output condition not
For sky, then the chained address of current data correspondence described ram cell is linked as the end of the corresponding passage chained list of current channel
Address；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current
The chained address of the data correspondence ram cell links to the output chained list；If the data for currently meeting output condition are located
Passage chained list corresponding to passage is not sky, then be linked as the chained address of current data correspondence described ram cell described logical
The end address of road chained list.
In the embodiment, each passage shares the memory space of the ram cell, for the ease of managing each independently
The data transmitted in transmission channel, arrange an independent passage chained list to each transmission channel.Accordingly, each transmission channel
Initial address and the end address of a respective channel chained list are safeguarded equally；Each passage chained list storage is correspondence current channel
The chained address being temporarily unsatisfactory in the transmission data place ram cell of output condition；, wherein it is desired to explanation, current
In the state of the corresponding passage chained list of transmission channel is not sky, no matter whether the data that current transmission channel is received meet output
Condition, which is required to the end address for being linked as current channel chained list, thus, preventing current transmission channel in transmission data
During, there is out of order problem.And in the state of the corresponding passage chained list of current transmission channel is for sky, if current data is full
Sufficient output condition, then need not be linked at the data corresponding chained address in the passage chained list, meanwhile, can directly by which
Chained address is linked as the end address for exporting chained list, waits to be output, thus, economizing on resources, here is not described in detail.
In the specific embodiment of the present invention, the mode of setting up of passage chained list has two kinds, and one of which exists for passage chained list
Data are present with the RA units before starting to transmit, and under this kind of embodiment, under initial state, the passage chained list is
Sky, when current transmission channel only has the data for being unsatisfactory for output condition, directly using chained address as the passage chained list
Initial address；In another way, passage chained list was not present before data start transmission, under this kind of embodiment, currently
When transmission channel only has the data for being unsatisfactory for output condition, new passage chained list is set up, and by the data corresponding link
Initial address of the address as the passage chained list；It is more similar to the remaining space chained list, when rising in the passage chained list
The corresponding data in beginning address from the RAM be forwarded to the output port when, which needs also exist for making its adjacent chained address
For the initial address of the passage chained list；When the passage chained list has chained address, no matter the passage relaying resumes defeated data is
No to meet output condition, the chained address corresponding to new data will be linked as the end address of the passage chained list.
Further, step S2 also includes：In data forwarding process, if the initial address institute in passage chained list is right
The data answered meet output condition, then update the output chained list；If currently output chained list is sky, by current data correspondence
The chained address of the ram cell is set to the initial address of the output chained list；If presently described output chained list is not sky,
The chained address of current data correspondence described ram cell is linked as into the end address of the output chained list；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；If current data pair
The passage chained list answered only has 1 chained address, then the passage chained list after updating is sky；If current channel chained list has 2
The individual or chained address of more than 2, then make the chained address adjacent with the initial address of the corresponding passage chained list of current data
For the initial address of new passage chained list.
In data forwarding process, when the data corresponding to the initial address in passage chained list meet output condition, its
Chained address will be linked in the output chained list；In correspondence output chained list, the data of each chained address can be according to described defeated
Go out the link order of chained list, start to be sequentially output from its current initial address.
Further, step S2 also includes：In data forwarding process, if the data in the ram cell are according to institute
The link order for stating output chained list sends to output port from the ram cell and is exported；Then, discharge current data corresponding
The initial address of output chained list, to update the output chained list；If the corresponding output chained list of current data is only with 1 chain ground connection
Location, then the output chained list after updating are sky；If current channel chained list is with the chained address of 2 or more than 2, will be with
Initial address of the adjacent chained address of the corresponding initial address for exporting chained list of current data as new output chained list；
Meanwhile, the chained address of current data correspondence described ram cell is written back to into the remaining space chained list, and is linked
For the end address of the remaining space chained list.
In a preferred implementation of the invention, under each clock cycle, correspondence will export the corresponding number of chained list initial address
The output port is forwarded to according to from the ram cell, for data forwarding, and the renewal of RA units is completed, here is not done
Continue to repeat.
In an embodiment of the present invention, in order to make it easy to understand, one specific example of description is used to refer to, accordingly, this is concrete
In example：The depth of hypothesis ram cell is 10, and the quantity of transmission channel is 4, respectively transmission channel 0,1,2,3, and which is corresponding
Passage chained list is respectively passage chained list 0,1,2,3；Then after initialization, there are 10 chained addresses in remaining space chained list, will
Its link order is set to 0 → 1 → 2 → 3 → 4 → 5 → 6 → 7 → 8 → 9, thus, the current starting point of the remaining space chained list
Location is 0, and end address is 9；Now, also there is not data transfer, therefore, each passage chained list and output chained list are sky.
Under the first two clock cycle, from each transmission channel of transmission channel 0 successively poll, transmission channel 0, transmission are judged
Passage 1 respectively has the transmission of the data for not meeting output condition under the first two clock cycle；Data are respectively D01, D11；
Now, according to the polling sequence of transmission channel, D01, D11 are sequentially transferred to ram cell, and by 0 point of the chained address of ram cell
Dispensing D01；D11 is distributed in the chained address 1 of ram cell；Now, remaining space chained list is adjusted to 2 → 3 → 4 → 5 → 6 → 7
→8→9；0 corresponding passage chained list 0 of transmission channel has a chained address, and is 0；1 corresponding passage chained list of transmission channel
1 has a chained address, and is 1；Transmission channel 3,4 corresponding passage chained lists are sky.
Under ensuing three clock cycle, each clock cycle repeats from each biography of transmission channel 0 successively poll
Defeated passage, judges that transmission channel 0, transmission channel 1, transmission channel 2 respectively have one under three clock cycle and do not meet output bars
The transmission of the data of part；Data are respectively D02, D12, D21；Data D11 in simultaneous transmission passage 1 meet output condition；This
When, according to the order that transmission data is entered, D02, D12, D21 are transferred to ram cell successively, and by the chained address 2 of ram cell
Distribute to D02；D12 is distributed in the chained address 3 of ram cell；D21 is distributed in the chained address 4 of ram cell；It is same with this
When, as data D11 in transmission channel 1 meet output condition, therefore, the chained address 1 that data D11 take is linked to defeated
Go out chained list；Thus, after the 5th clock cycle, update output chained list to be, with 1 chained address, and is 1, remaining space chain
Table is 5 → 6 → 7 → 8 → 9；0 corresponding passage chained list 0 of transmission channel has 2 chained addresses, and is 0 → 2；Transmission channel 1
Corresponding passage chained list 1 has 1 chained address, and is 3；3 corresponding passage chained list 1 of transmission channel has 1 chained address,
And be 4；4 corresponding passage chained list of transmission channel is still sky.
The 6th clock cycle, each conventional channels does not have new data forwarding, and in transmission channel 0,1,2, each leads to
Data corresponding to the initial address of road chained list, i.e. D01, D12, D21 are unsatisfactory for output condition；But in present clock week
Under phase, transmission chained list is not sky, therefore, the data in initial address in transmission chained list, i.e.,：The data of address 1 are from RAM
Output port is read out to, and is sent, now, output chained list initial address 1 is released, and writes back remaining space chained list；Output chained list
For sky；Remaining space chained list is 5 → 6 → 7 → 8 → 9 → 1；Each passage chained list keeps the state after the 5th clock cycle.
The present invention carries out concentration caching to each passage message using a block RAM unit, as long as there is passage to meet output condition
Can just be scheduled away, solve the problems, such as hol blocking.
With reference to shown in Fig. 3, in an embodiment of the present invention, there is provided avoid hol blocking during multi-channel data transmission
System, the system includes：Initialization module 100, data memory module 200, data processing update module 300；The number
Include according to memory module 200：The ram cell 201 that the multiple transmission channels of correspondence increase, with 201 depth phase of the ram cell
A same RA unit 203, and clock unit 205.
In the specific embodiment of the invention, the ram cell 201 is used for the number for concentrating each transmission channel transmission of caching
According to；The RA units 203 are used for storage address chained list；The address link list includes：The corresponding ram cell 201 is arranged, and is used in combination
In the remaining space chained list for recording 201 remaining space of the ram cell；Corresponding each transmission channel is respectively provided with, and for remembering
Record the passage chained list of data output sequence in each transmission channel；And it is suitable for recording the transmission of the data for meeting output condition
The output chained list of sequence.
It should be noted that every kind of address link list is respectively provided with its corresponding initial address and end address, when institute's address chain
When only having a chained address in table, it is also end address that the chained address is initial address, and here is not described in detail.
Data processing update module 300 is used for：Poll each transmission channel, when there is data forwarding in monitoring transmission channel
When, by the data conversion storage of current transmission to the ram cell 201, and record the data correspondence ram cell 201
Chained address；Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；If
It is that current data corresponding chained address is updated in the output chained list；And according to the link order of the output chained list,
Data is activation in the ram cell 201 is exported to output port；If it is not, continuing corresponding each transmission channel of monitoring
The data of passage chained list initial address whether meet output condition；Wherein, the data conversion storage to the ram cell 201 with
And send to the output port from the ram cell 201, each address link list in RA units 203 is updated.
In the preferred embodiment for the present invention, clock unit 205, for the recording clock cycle；The data processing updates mould
Block 300 specifically for：Under each clock cycle, poll each transmission channel, to judge whether deposit respectively in each transmission channel
In data forwarding.
The data processing update module 300 under each clock cycle, the chain first address in poll each transmission channel,
It is the initial address of the corresponding passage chained list of each transmission channel, judges whether which meets output condition, when meets output condition
When, the data corresponding chained address is linked on output chained list, and using current chained address as the knot for exporting chained list
Beam address, will below will be described in detail.
In the preferred embodiment for the present invention, initialization module 100 is used for：It is before the data of first forwarding are received, right
The ram cell 201 and the RA units 203 are initialized；The initialization includes：By the whole storage of the ram cell 201
Address carries out link by chained list and forms remaining space chained list, and records the initial address of the remaining space chained list, terminates ground
Location and link order.
In present embodiment, it is initialized during, monoblock ram cell 201 is linked by chained list, its link
Order can be according to user's request set up of character patt ern, such as：Using first address in 201 depth of the ram cell as starting point
Location, from first address of the ram cell 201, ascending order is linked to last address successively afterwards；Can also be by depth
Used as initial address, from last address of ram cell 201, descending is linked in depth successively afterwards for last address
First address, it is also possible to which, using any one address in 201 depth of ram cell as initial address, here is not described in detail.
Further, the data processing update module 300 specifically for：In data forwarding process, the number of current forwarding
After keeping in into the initial address of the corresponding remaining space chained list of the ram cell 201, the remaining space chain is updated
Table；If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；If current
Remaining space chained list, then will be with current occupied remaining space chained list initial address with the chained address of 2 or more than 2
Initial address of the adjacent chained address as new remaining space chained list.
It is understood that each transmission channel is corresponded to, and its shared ram cell 201, when data forwarding is monitored, will
The data conversion storage is to the ram cell 201, and sequentially each initial address for transferring current residual space chained list is allocated to work as
Front forwarding data, and remaining space chained list is updated, by the chain adjacent with current occupied remaining space chained list initial address
Ground connection location is used as new remaining space chained list initial address；Meanwhile, when the data is activation in the ram cell 201 is to outfan
To carry out during data output, the corresponding chained address of current data will be written back in remaining space chained list mouth again, and be made
For the end address of remaining space chained list, description is also may proceed to below.
Further, the data processing update module 300 is additionally operable to：In data forwarding process, if the number of current transmission
According to output condition is unsatisfactory for, then the passage chained list corresponding to the transmission channel of current data place is updated；If being currently unsatisfactory for output
Passage chained list corresponding to the data place passage of condition is sky, then by the chain ground connection of current data correspondence described ram cell 201
Location is set to the initial address of the corresponding passage chained list of current channel；If being currently unsatisfactory for the data place passage institute of output condition
Corresponding passage chained list is not sky, then the chained address of current data correspondence described ram cell 201 is linked as current channel pair
The end address of the passage chained list answered；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current
Data correspond to the chained address of the ram cell 201 and link to the output chained list；If currently meeting the data institute of output condition
It is not sky in the passage chained list corresponding to passage, then the chained address of current data correspondence described ram cell 201 is linked as into institute
State the end address of passage chained list.
In the embodiment, each passage shares the memory space of the ram cell 201, for the ease of managing independently
The data transmitted in each transmission channel, arrange an independent passage chained list to each transmission channel.Accordingly, each transmission
Passage equally safeguards initial address and the end address of a respective channel chained list；Each passage chained list storage is that correspondence is current
Passage is temporarily unsatisfactory for the chained address in the transmission data place ram cell 201 of output condition；, wherein it is desired to explanation,
In the state of the corresponding passage chained list of current transmission channel is not sky, no matter whether the data that current transmission channel is received are full
Sufficient output condition, which is required to the end address for being linked as current channel chained list, thus, preventing current transmission channel from passing
During transmission of data, there is out of order problem.And in the state of the corresponding passage chained list of current transmission channel is for sky, if currently
Data meet output condition, then the data corresponding chained address need not be linked in the passage chained list, meanwhile, can be straight
Connect and be linked as exporting the end address of chained list by its chained address, wait to be output, thus, economizing on resources, here is not done superfluous in detail
State.
In the specific embodiment of the present invention, the mode of setting up of passage chained list has two kinds, and one of which exists for passage chained list
Data start transmission before exist with the RA units 203, under this kind of embodiment, under initial state, the passage chained list
For sky, when current transmission channel only has the data for being unsatisfactory for output condition, directly using chained address as the passage chained list
Initial address；In another way, passage chained list was not present before data start transmission, under this kind of embodiment, when
When front transmission channel only has the data for being unsatisfactory for output condition, new passage chained list is set up, and by the data corresponding chain
Initial address of the ground connection location as the passage chained list；It is more similar to the remaining space chained list, when in the passage chained list
The corresponding data of initial address from the RAM be forwarded to the output port when, which is needed also exist for its adjacent chained address
As the initial address of the passage chained list；When the passage chained list has chained address, no matter the passage relaying resumes defeated data
Whether output condition is met, and the chained address corresponding to new data will be linked as the end address of the passage chained list.
Further, the data processing update module 300 is additionally operable to：In data forwarding process, if being in passage chained list
Initial address corresponding to data meet output condition, then update the output chained list；If currently output chained list is sky, will
Current data corresponds to the initial address that the chained address of the ram cell 201 is set to the output chained list；If presently described defeated
It is not sky to go out chained list, then the chained address of current data correspondence described ram cell 201 is linked as the end of the output chained list
Address；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；If current data pair
The passage chained list answered only has 1 chained address, then the passage chained list after updating is sky；If current channel chained list has 2
The individual or chained address of more than 2, then make the chained address adjacent with the initial address of the corresponding passage chained list of current data
For the initial address of new passage chained list.
In data forwarding process, when the data corresponding to the initial address in passage chained list meet output condition, its
Chained address will be linked in the output chained list；In correspondence output chained list, the data of each chained address can be according to described defeated
Go out the link order of chained list, start to be sequentially output from its current initial address.
Further, the data processing update module 300 is additionally operable to：In data forwarding process, if the ram cell
Data in 201 send to output port from the ram cell 201 according to the link order of the output chained list and are exported；
Then, the initial address of the corresponding output chained list of current data is discharged, to update the output chained list；If current data is corresponding defeated
Go out chained list and only there is 1 chained address, then the output chained list after updating is sky；If current channel chained list has 2 or 2
More than chained address, then using the adjacent chained address of initial address of output chained list corresponding with current data as new defeated
Go out the initial address of chained list；
Meanwhile, the chained address of the current data correspondence ram cell 201 is written back to into the remaining space chained list, and by its
It is linked as the end address of the remaining space chained list.
Those skilled in the art can be understood that, for convenience and simplicity of description, the system of foregoing description
The specific work process of middle modules, may be referred to the corresponding process in preceding method embodiment, will not be described here.
In sum, the of the invention system and method for avoiding hol blocking during multi-channel data transmission, by increasing
Plus ram cell and RA units, the data forwarded in making each transmission channel are temporarily stored in the ram cell, and are met in data
After output condition, according to the linking relationship of each address link list in RA units, the very first time is exported from ram cell；Avoid
During multi-channel data transmission, the problem of hol blocking occurs, and under high bandwidth, facilitating chip design reduces the face of chip
Product and cost.
For convenience of description, it is divided into various modules with function when describing apparatus above to describe respectively.Certainly, implementing this
The function of each module can be realized in same or multiple softwares and/or hardware during invention.
Device embodiments described above are only schematic, wherein the module as separating component explanation
Can be or may not be physically separate, as the part that module shows can be or may not be physics mould
Block, you can local to be located at one, or can also be distributed on multiple mixed-media network modules mixed-medias.Which is selected according to the actual needs can
In some or all of module realizing the purpose of present embodiment scheme.Those of ordinary skill in the art are not paying creation
Property work in the case of, you can to understand and implement.
It should be understood that, although this specification is been described by according to embodiment, but not each embodiment only includes one
Individual independent technical scheme, this narrating mode of description is only that those skilled in the art will should say for clarity
Bright book as an entirety, the technical scheme in each embodiment can also Jing it is appropriately combined, forming those skilled in the art can
With the other embodiment for understanding.
The a series of detailed description of those listed above is only for the feasibility embodiment of the present invention specifically
Bright, they simultaneously are not used to limit the scope of the invention, all equivalent implementations made without departing from skill spirit of the present invention
Or change should be included within the scope of the present invention.
Claims (10)
1. a kind of method for avoiding hol blocking during multi-channel data transmission, it is characterised in that methods described includes：
In transmission chip, the multiple transmission channels of correspondence increase a ram cell, and with the ram cell depth identical one
Individual RA units；
The ram cell is used for the data for concentrating each transmission channel transmission of caching；The RA units are used for storage address chained list；
The address link list includes：
The correspondence ram cell is arranged, and for recording the remaining space chained list of the ram cell remaining space；
Corresponding each transmission channel is respectively provided with, and for recording the passage chained list of data output sequence in each transmission channel；
And the output chained list of the transmission order of the data of output condition is met for record；
Poll each transmission channel, when there is data forwarding in transmission channel is monitored, by the data conversion storage of current transmission to institute
State in ram cell, and record the chained address of the data correspondence ram cell；
Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；
If so, current data corresponding chained address is updated in the output chained list；
And according to the link order of the output chained list, the data is activation in the ram cell is exported to output port；
If it is not, whether the data for continuing the passage chained list initial address of corresponding each transmission channel of monitoring meet output condition；
Wherein, the data conversion storage is sent to the output port to the ram cell and from the ram cell, right
In RA units, each address link list is updated.
2. the method for avoiding hol blocking during multi-channel data transmission according to claim 1, it is characterised in that institute
Stating method also includes：
Before the data of first forwarding are received, to the ram cell and RA units initialization；
The initialization includes：Whole storage address of the ram cell are carried out into link by chained list and forms remaining space chain
Table, and record initial address, end address and the link order of the remaining space chained list；
In data forwarding process, the data of current forwarding keep in rising to the corresponding remaining space chained list of the ram cell
After in beginning address, the remaining space chained list is updated；
If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；
If current residual space chained list is with the chained address of 2 or more than 2, will be with current occupied remaining space chain
Initial address of the adjacent chained address of table initial address as new remaining space chained list.
3. the method for avoiding hol blocking during multi-channel data transmission according to claim 1, it is characterised in that institute
Stating method also includes：
In data forwarding process, if the data of current transmission are unsatisfactory for output condition, current data place transmission channel is updated
Corresponding passage chained list；
If it is sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is set to the initial address of the corresponding passage chained list of current channel；
If it is not sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence
The chained address of the ram cell is linked as the end address of the corresponding passage chained list of current channel；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；
If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current data correspondence described
The chained address of ram cell links to the output chained list；
If it is not sky currently to meet the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is linked as the end address of the passage chained list.
4. the method for avoiding hol blocking during multi-channel data transmission according to claim 1, it is characterised in that sentence
Whether the data corresponding to the initial address of the passage chained list of each transmission channel of breaking meet output condition, if so, by current number
It is updated in the output chained list according to corresponding chained address and specifically includes：
In data forwarding process, if the data corresponding to the initial address in passage chained list meet output condition, institute is updated
State output chained list；
If currently output chained list is sky, the chained address of current data correspondence described ram cell is set to into the output chain
The initial address of table；
If presently described output chained list is not sky, the chained address of current data correspondence described ram cell is linked as described
The end address of output chained list；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；
If the corresponding passage chained list of current data only has 1 chained address, the passage chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, rising passage chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new passage chained list.
5. the method for avoiding hol blocking during multi-channel data transmission according to claim 1, it is characterised in that institute
Stating method also includes：
In data forwarding process, if the data in the ram cell are mono- from the RAM according to the link order of the output chained list
Unit sends to output port and is exported；
The initial address of the corresponding output chained list of current data is discharged then, to update the output chained list；
If the corresponding output chained list of current data only has 1 chained address, the output chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, by rising for output chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new output chained list；
Meanwhile, the chained address of current data correspondence described ram cell is written back to into the remaining space chained list, and is linked
For the end address of the remaining space chained list.
6. a kind of system for avoiding hol blocking during multi-channel data transmission, it is characterised in that the system includes：
Data memory module, which includes：The ram cell that the multiple transmission channels of correspondence increase, and with the ram cell depth
One RA unit of identical；
The ram cell is used for the data for concentrating each transmission channel transmission of caching；The RA units are used for storage address chained list；
The address link list includes：
The correspondence ram cell is arranged, and for recording the remaining space chained list of the ram cell remaining space；
Corresponding each transmission channel is respectively provided with, and for recording the passage chained list of data output sequence in each transmission channel；
And the output chained list of the transmission order of the data of output condition is met for record；
Data processing update module, for each transmission channel of poll, when there is data forwarding in transmission channel is monitored, ought
The data conversion storage of front transmission is into the ram cell, and records the chained address of the data correspondence ram cell；
Judge each transmission channel passage chained list initial address corresponding to data whether meet output condition；
If so, current data corresponding chained address is updated in the output chained list；
And according to the link order of the output chained list, the data is activation in the ram cell is exported to output port；
If it is not, whether the data for continuing the passage chained list initial address of corresponding each transmission channel of monitoring meet output condition；
Wherein, the data conversion storage is sent to the output port to the ram cell and from the ram cell, right
In RA units, each address link list is updated.
7. the system for avoiding hol blocking during multi-channel data transmission according to claim 6, it is characterised in that institute
Stating system also includes：Initialization module；
The initialization module is used for：Before the data of first forwarding are received, at the beginning of the ram cell and the RA units
Beginningization；
The initialization includes：Whole storage address of the ram cell are carried out into link by chained list and forms remaining space chain
Table, and record initial address, end address and the link order of the remaining space chained list；
The data processing update module specifically for：In data forwarding process, the current data for forwarding are kept in mono- to the RAM
After in the initial address of the corresponding remaining space chained list of unit, the remaining space chained list is updated；
If current residual space chained list only has 1 chained address, the remaining space chained list after updating is sky；
If current residual space chained list is with the chained address of 2 or more than 2, will be with current occupied remaining space chain
Initial address of the adjacent chained address of table initial address as new remaining space chained list.
8. the system for avoiding hol blocking during multi-channel data transmission according to claim 6, it is characterised in that
The data processing update module is additionally operable to：In data forwarding process, if the data of current transmission are unsatisfactory for output condition,
Passage chained list corresponding to the transmission channel of current data place is updated then；
If it is sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is set to the initial address of the corresponding passage chained list of current channel；
If it is not sky to be currently unsatisfactory for the passage chained list corresponding to the data place passage of output condition, by current data correspondence
The chained address of the ram cell is linked as the end address of the corresponding passage chained list of current channel；
In data forwarding process, if the data of current transmission meet output condition, current data place transmission channel institute is updated
Corresponding passage chained list；
If it is sky currently to meet the passage chained list corresponding to the data place passage of output condition, will be current data correspondence described
The chained address of ram cell links to the output chained list；
If it is not sky currently to meet the passage chained list corresponding to the data place passage of output condition, by current data correspondence institute
The chained address for stating ram cell is linked as the end address of the passage chained list.
9. the system for avoiding hol blocking during multi-channel data transmission according to claim 6, it is characterised in that
The data processing update module is additionally operable to：In data forwarding process, if corresponding to the initial address in passage chained list
Data meet output condition, then update the output chained list；
If currently output chained list is sky, the chained address of current data correspondence described ram cell is set to into the output chain
The initial address of table；
If presently described output chained list is not sky, the chained address of current data correspondence described ram cell is linked as described
The end address of output chained list；
Meanwhile, the initial address of the corresponding passage chained list of current data is discharged, to update the passage chained list；
If the corresponding passage chained list of current data only has 1 chained address, the passage chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, rising passage chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new passage chained list.
10. the system for avoiding hol blocking during multi-channel data transmission according to claim 6, it is characterised in that
The data processing update module is additionally operable to：In data forwarding process, if the data in the ram cell are according to described defeated
The link order for going out chained list sends to output port from the ram cell and is exported；
The initial address of the corresponding output chained list of current data is discharged then, to update the output chained list；
If the corresponding output chained list of current data only has 1 chained address, the output chained list after updating is sky；
If current channel chained list is with the chained address of 2 or more than 2, by rising for output chained list corresponding with current data
Initial address of the adjacent chained address in beginning address as new output chained list；
Meanwhile, the chained address of current data correspondence described ram cell is written back to into the remaining space chained list, and is linked
For the end address of the remaining space chained list.
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| WO2021088466A1 (en) * | 2019-11-04 | 2021-05-14 | 盛科网络（苏州）有限公司 | Method for improving message storage efficiency of network chip, device, and storage medium |
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