CN106601305A - Solid-state disk error correction method combining error detection code with error correction code - Google Patents

Abstract

The invention discloses an error correction method for a solid-state disk using a combination of an error-detecting code and an error-correcting code. The method includes the following steps: (1) before writing data into the solid-state disk, encode the original data of the flash memory page and save the into the storage unit of the solid-state disk; (2) use the error detection code decoding operation to check the error state of the flash memory page in the storage unit, directly read the flash memory page without error, and directly read the flash memory page with error Pages are corrected using LDPC decoding operations. The method of the present invention can first use the error detection code CRC to perform error detection on the flash memory page in the early stage of the use of the solid state disk when the error rate of the flash memory page is very low, and does not need to perform LDPC decoding on the detected error-free pages The process reads directly, and performs LDPC decoding and error correction for the detected pages with errors.

Description

A solid-state disk error correction method using a combination of error detection codes and error correction codes

technical field

The invention belongs to the technical field of solid-state disk error correction, and in particular relates to an error correction method for a solid-state disk using a combination of an error detection code and an error correction code.

Background technique

Solid-state disks have been applied to various fields of people's lives. It is very important to ensure the security of data stored in solid-state disks. Among them, error-correcting codes are one of the most commonly used data security technologies for solid-state disks. As the solid state disk manufacturing process advances, the size of the flash memory unit becomes smaller and smaller, and the corresponding noise also increases. The internal noise of the solid-state disk is determined by many factors, such as the number of times of erasing and writing, data storage time, etc. The erasing and writing operation can destroy the oxide layer around the flash memory unit, and cause the charge coupling effect of the adjacent flash memory unit, causing the internal The amount of charge changes, which causes the threshold voltage value of the flash memory cell to change, thereby causing data errors. The greater the number of times of erasing and writing, the greater the range of noise interference caused, and the higher the error rate of data inside the solid-state disk. In the early use stage of solid-state disks, the number of times of erasing and writing is very small, the data storage time is also very short, the internal data error rate is very low, and most of the flash memory pages are error-free. In the middle and late stages of solid-state disks, due to the increase in the number of erases and writes and the extension of data storage time, the error rate of internal data gradually increases.

Low-Density Parity-Check code (Low-Density Parity-Check code, LDPC) is applied in various fields because of its excellent error correction capability. LDPC is mainly composed of encoder and decoder. The original data needs to be generated by an LDPC encoder to generate a check bit, and the original data and the LDPC check bit together form a codeword. When reading data from a solid-state disk, the codeword needs to be decoded by an LDPC decoder. If the original data is wrong, it can be corrected after the LDPC decoding process. If the original data is error-free, it must go through the LDPC decoding process under normal circumstances, which will increase unnecessary decoding time and affect the read performance of the SSD data.

Patent document CN 104464822A discloses an LDPC error correction coding method based on the error interval of flash memory, which calculates the accurate error interval according to the current error rate of the solid-state hard disk channel, and uses the error interval to locate the possible misalignment position, according to the Bit-Flipping method The decoding criterion flips bits that have been positioned in error positions. This method eliminates the propagation of error codewords in the hard decoding process of the Bit-Flipping method, and improves the error correction capability and algorithm execution efficiency. But there are following deficiencies and defects in this method:

(1) This method does not consider the processing of error-free pages, and error-free pages do not need to be decoded and can be read directly;

(2) This method needs to judge the error interval of the data, and for the early use stage of the solid state disk, the error rate is very low or even close to zero, which will increase the time overhead of judgment processing.

If the original data is wrong, it can be corrected after the LDPC decoding process. If the original data is error-free, it must go through the LDPC decoding process under normal circumstances, which will increase unnecessary decoding time and affect the read performance of the SSD data. If the error state of the flash memory page is detected in advance by using the error detection code CRC, the LDPC decoding process is not required for the error-free page. For pages with errors, they need to go through the LDPC decoding process for error correction.

Contents of the invention

In view of the above defects or improvement needs of the prior art, the present invention provides an error correction method for a solid-state disk using a combination of an error-detecting code and an error-correcting code. The combination of error detection code and error correction code is used to improve the reading performance of solid state disk, reduce the unnecessary LDPC decoding process of error-free pages in the early stage of solid state disk, and reduce the number of error-free pages in the early stage of solid state disk The LDPC decoding process reduces the error correction energy consumption of the LDPC code and improves the read performance of the solid state disk.

In order to achieve the above object, the present invention provides a solid state disk error correction method using an error detection code and an error correction code, characterized in that: the method includes the following steps:

(1) Before the solid-state disk writes data, the original data of the flash memory page is encoded, and stored in the storage unit of the solid-state disk;

(2) Use the error detection code decoding operation to check the error state of the flash page in the storage unit, directly read the flash page without error, and use the low density parity check code to decode the flash page with error Code operation for error correction.

Further, the error detection code decoding operation process includes performing hard decision voltage sensing on each flash memory page of the storage unit, obtaining binary information of stored data, and performing error detection code decoding operation on the flash memory page.

Further, the LDPC decoding operation process includes: performing soft-decision voltage sensing on the storage unit, obtaining logarithmic relief ratio information, and performing LDPC decoding operation on the flash memory page.

Preferably, it also includes the step of judging whether the storage unit is full before performing step (2), and immediately performing step (2) for the storage unit that is not full.

Further, for the full storage unit, it also includes the step of judging whether the internal parallel attribute of the solid-state disk is available, and performing step (2) in advance for the solid-state disk whose parallel attribute is not available, and parallelizing the solid-state disk for the available parallel attribute in advance Execute step (2).

Preferably, the method further includes the step of judging whether the solid-state disk is idle before judging whether the storage unit is full, and executing step (2) immediately when it is not idle.

Preferably, it also includes the step of judging whether the solid-state disk has been detected before judging whether the internal parallel attribute of the solid-state disk is available, and executing step (2) immediately when it is judged that it has been detected, and executing the step (2) when it is not detected. Steps for judging whether the internal parallel attribute of the SSD is available.

Preferably, it also includes the step of judging whether the error page probability in the flash memory page of the storage unit is greater than a set threshold before judging whether the solid state disk is idle, and performing the step of judging whether the solid state disk is idle when it is less than the threshold .

Further, when the value is greater than the threshold value, the error correction of the solid-state disk is performed by using a low-density parity-check code decoding operation.

Further, the specific encoding process is:

(11) the original data of described flash memory page is encoded with error detection code and low density parity check code respectively, produces error detection code check digit and low density parity check code check digit respectively;

(12) The original data, the error detection code check bit and the low density parity check code check bit together form a code word;

(13) Save the codeword in the storage unit of the solid state disk.

Generally speaking, compared with the prior art, the above technical solutions conceived by the present invention can achieve the following beneficial effects:

(1) In the technical solution of the present invention, a CDF-LDPC method in which a solid state disk uses an error detection code and an error correction code is proposed. In the case of an error detection code, CRC is first used to detect errors on the flash memory pages, and the detected error-free pages are directly read without the LDPC decoding process, while the LDPC decoding and error correction is performed on the detected error pages.

(2) Since the error-free page saves the LDPC decoding process, the read performance of the solid-state disk can be improved. At the same time, during the idle time of the solid-state disk, the CDF-LDPC decoding process can be executed in advance for the full-write flash memory block. If the SSD parallelism property is available, the CDF-LDPC decoding process can be executed in parallel in advance.

(3) The above-mentioned execution of the CDF-LDPC decoding process in advance and parallel execution of the CDF-LDPC decoding operation in advance can further improve the read performance of the solid state disk. On the other hand, since the LDPC decoding operation for error-free pages is omitted, the LDPC decoding energy consumption required by the solid state disk is also reduced, and the reliability of the solid state disk is not affected in any way.

Description of drawings

Fig. 1 is a processing flowchart of a solid state disk error correction method using a combination of an error detection code and an error correction code according to an embodiment of the present invention;

2 is a schematic diagram of a CDF-LDPC encoding process involved in a solid state disk error correction method using a combination of an error detection code and an error correction code according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a CDF-LDPC decoding process involved in a solid state disk error correction method using a combination of an error detection code and an error correction code according to an embodiment of the present invention.

detailed description

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

FIG. 1 is a processing flowchart of a solid state disk error correction method using a combination of an error detection code and an error correction code according to an embodiment of the present invention. As shown in Figure 1, the method includes the following steps:

(1) The specific process of the encoding process is as follows:

Before inputting data into the solid-state disk, in order to use the error-correcting code to correct errors, an error-correcting encoding process must be performed. The original data of a flash page is denoted as D;

(1.1) As shown in Figure 2, the original data D of a flash page performs CRC encoding to generate CRC check digit CRC-P, and executes LDPC encoding to generate LDPC check digit LDPC-P;

(1.2) The original data D of a flash memory page, the CRC check bit CRC-P, and the LDPC check bit LDPC-P together form a code word and store it in the solid-state disk. Each codeword adds a 1-bit Error-free-Judgment identifier, which is used to judge whether the page data has an error. The initial value is 0, indicating that the page data is error-free. If there is an error in the page data, the Error-free-Judgment identifier is set to 1.

(2) The specific process of the flow control part is:

(2.1) As shown in Figure 1, when accessing the storage unit of the solid-state disk, judge whether the error page probability P of the block where the flash page is located is greater than the threshold T, if P>T, the flash page uses LDPC decoding to correct errors, otherwise go to step (2.2);

(2.2) Judge whether the solid-state disk is idle, if the solid-state disk has no idle time, go to step (3) and execute immediately, otherwise go to step (2.3);

(2.3) judge whether the block where the flash memory page is located is a full write block, if the block is not a full write block, go to step (3) and execute immediately, otherwise go to step (2.4);

(2.4) judge whether flash memory block has been detected, if this block has been detected, go to step (3), otherwise go to step (2.5);

(2.5) judge whether the parallel attribute of solid-state disk is available, if unavailable, then carry out step (3) ahead of time to the block where flash memory page is located, otherwise step (3) is executed in parallel ahead of time to the block where flash memory page is located;

(3) The decoding process is specifically as follows:

(3.1) As shown in Figure 3, the original data D and the CRC check bit CRC-P of the access flash memory page are jointly formed into a CRC code word, and the code word is subjected to hard decision voltage sensing to obtain specific binary information;

(3.2) carry out CRC decoding operation to CRC code word;

(3.3) Judging whether the flash page has an error, that is, judging whether the Error-free-Judgment is 1, if Error-free-Judgment is 0, indicating that the flash page is error-free, then read it directly, otherwise set Error-free-Judgment to 1 , and go to step (3.4);

(3.4) The original data D and the LDPC parity bit LDPC-P of the access flash memory page are jointly composed of an LDPC codeword, and the codeword is subjected to soft-judgment voltage sensing to obtain log likelihood ratio information;

(3.5) Carry out LDPC decoding operation to LDPC code word, correct the error in the data;

(3.6) If the flash memory block is erased, the Error-free-Judgment of all pages in the flash memory block is set to 0, indicating that the flash memory page is error-free.

The error page probability of the block where the flash memory page is located refers to the ratio of the number of error pages in the flash memory block to the total number of pages in the flash memory.

The present invention proposes a CDF-LDPC method using a combination of error detection codes and error correction codes for solid state disks. This method can first use error detection codes in the early stage of solid state disk use when the error rate of flash memory pages is very low. The code CRC performs error detection on the flash memory pages, and the detected error-free pages are directly read without the LDPC decoding process, while the LDPC decoding error correction is performed on the detected error pages.

Since the error-free page saves the LDPC decoding process, the read performance of the SSD can be improved. At the same time, during the idle time of the solid-state disk, the CDF-LDPC decoding process can be executed in advance for the full-write flash memory block. If the SSD parallelism property is available, the CDF-LDPC decoding process can be executed in parallel in advance.

The foregoing execution of the CDF-LDPC decoding process in advance and parallel execution of the CDF-LDPC decoding operation in advance can further improve the read performance of the solid state disk. On the other hand, since the LDPC decoding operation for error-free pages is omitted, the LDPC decoding energy consumption required by the solid state disk is also reduced, and the reliability of the solid state disk is not affected in any way.

It is easy for those skilled in the art to understand that the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention, All should be included within the protection scope of the present invention.

Claims (10)

1. the solid-state disk error correction method that a kind of use error-detecging code and error correcting code combine, it is characterised in that the method includes as follows Step：

(1) before solid-state disk write data, the initial data of Hash memory pages is encoded, and is saved in the storage list of the solid-state disk In unit；

(2) error condition of Hash memory pages in the memory cell, the sudden strain of a muscle to there is no mistake are checked using error-detecging code decoded operation Deposit page to directly read, the Hash memory pages to there is mistake then carry out error correction using low density parity check code decoded operation.

2. the solid-state disk error correction method that a kind of use error-detecging code according to claim 1 and error correcting code combine, wherein, institute Stating error-detecging code decoded operation process includes carrying out each Hash memory pages of the memory cell hard decision voltage perception, obtains storage The binary message of data, and error-detecging code decoded operation is carried out to the Hash memory pages.

3. the solid-state disk error correction method that a kind of use error-detecging code according to claim 1 and 2 and error correcting code combine, its In, the low density parity check code decoded operation process includes：Soft-decision voltage perception is carried out to the memory cell, is obtained Logarithm is felt relieved than information, and carries out low density parity check code decoded operation to Hash memory pages.

4. the solid-state disk error correction side that a kind of use error-detecging code and error correcting code according to any one of claim 1-3 combines Method, wherein, it is additionally included in before execution step (2) and judges whether the memory cell writes full step, and to not writing full storage Unit is immediately performed step (2).

5. the solid-state disk error correction method that a kind of use error-detecging code according to claim 4 and error correcting code combine, wherein, it is right In full memory cell is write, also including judge solid-state disk inside parallel property whether can with the step of, and for parallel category The disabled solid-state disk of property shifts to an earlier date execution step (2), for the available solid-state disk of parallel property shifts to an earlier date parallel execution of steps (2).

6. the solid-state disk error correction method that a kind of use error-detecging code and error correcting code according to claim 4 or 5 combines, its In, be additionally included in judge the memory cell whether write it is completely front judge the solid-state disk whether idle step, and busy When be immediately performed step (2).

7. the solid-state disk error correction method that a kind of use error-detecging code according to claim 5 and error correcting code combine, wherein, also It is included in and judges to judge before whether solid-state disk inside parallel property is available the solid-state disk whether step being detected, and Step (2) is immediately performed when judging and being detected, is performed when not being detected and described is judged inside solid-state disk whether is parallel property The step of can using.

8. the solid-state disk error correction method that a kind of use error-detecging code according to claim 6 and error correcting code combine, wherein, also It is included in faulty page probability in the Hash memory pages for judging that the memory cell is judged before the solid-state disk is whether idle and whether is more than and sets The step of fixed threshold value, and perform when less than threshold value and judge the solid-state disk whether step of free time.

9. the solid-state disk error correction method that a kind of use error-detecging code according to claim 8 and error correcting code combine, wherein, Error correction is carried out to the solid-state disk using low density parity check code decoded operation more than during threshold value.

10. the solid-state disk error correction that a kind of use error-detecging code and error correcting code according to any one of claim 1-9 combines Method, wherein, the coding detailed process is：

(11) error-detecging code and encoding low density parity check are used respectively to the initial data of the Hash memory pages, produces respectively Error-detecging code check bit sum low density parity check code check bit；

(12) initial data, error-detecging code check bit and low density parity check code check bit collectively constitute code word；

(13) code word is saved in the memory cell of the solid-state disk.