CN106569013A - Power-grid overvoltage monitoring method and system - Google Patents
Power-grid overvoltage monitoring method and system Download PDFInfo
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- CN106569013A CN106569013A CN201610950660.5A CN201610950660A CN106569013A CN 106569013 A CN106569013 A CN 106569013A CN 201610950660 A CN201610950660 A CN 201610950660A CN 106569013 A CN106569013 A CN 106569013A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
- G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16585—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 for individual pulses, ripple or noise and other applications where timing or duration is of importance
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- Engineering & Computer Science (AREA)
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- Supply And Distribution Of Alternating Current (AREA)
Abstract
The invention provides a power-grid overvoltage monitoring method and system. According to the method and system, a real-time response characteristic and a sampling speed characteristic are excellent, the whole process can be recorded for a long time, data of three periods before triggering, data of a triggering period and data of two periods after triggering can be recorded at the same time, and it is ensured that the overvoltage waveform is recorded effectively; and the volume of collected waveform data can be reduced greatly by real-time compression, storage is convenient, contradiction between high sampling speed and recording time is solved, and the overvoltage waveform can be captured accurately and stably.
Description
Technical field
The present invention relates to power network overvoltage fields of measurement, and more particularly, to a kind of monitoring side of power network overvoltage
Method and system.
Background technology
In network system often there is various overvoltage, such as lightning surge, switching overvoltage, linear resonance mistake in Jing
Voltage, ferro-resonance over-voltage, arc grounding over-voltage etc., the waveform of various overvoltage, amplitude and duration differ,
Excursion is also very big.When Overvoltage Amplitude is very high, puncture can insulation, amplitude is smaller but action time is longer,
May puncture, amplitude is less but can also promote insulation ag(e)ing under repeatedly effect.Operating experience and research shows, overvoltage
The immediate cause of power system insulation damage accident, particularly 10KV, 35KV power distribution network are often caused, internal overvoltage is more
Complexity, the duration is longer, and such accident proportion is bigger.It is excessively electric with the rapid construction and development of super, extreme high voltage bulk power grid
Impact of the pressure to electric power netting safe running is increasingly subject to people's attention.
Although being mounted with the overvoltage protections such as a large amount of arresters in actual electric network system, work as and overvoltage thing occur
Therefore when, due to without monitoring device, it is difficult to determine that cause of accident is because Overvoltage Amplitude or steepness bear energy more than equipment
Power, or caused by the dielectric level reduction of equipment, or protection device is problematic, and these cause analysis judgement to become very tired
It is difficult.Therefore the transient voltage waveform of complete accident process is recorded, is the important foundation for analyzing cause of accident.
Over-voltage monitoring requires that test system has good frequency response characteristic and high sampling rate, and being capable of long-time
Record whole process.Current fault wave recording device, essential record is failure wave-recording based on power frequency and its harmonic wave, uncomfortable
Close the over-voltage monitoring to system.
Current existing all kinds of overvoltage recorders, due to the contradiction between high sampling rate and long record time, it is impossible to
The voltage waveform record for meeting Overvoltage fruit requires that high sampling rate record length is just short, and low sampling rate records the time
Can lengthen, but the peak-peak of fast-pulse waveform can be lost, such as lightning wave, it is inaccurate when causing ex-post analysis problem in addition
The conclusion for making mistake.
The content of the invention
Over-voltage monitoring method and system proposed by the present invention is used while realizing non-volatile recording by data compression
Whether higher sample rate completes sampling, and be the triggering cycle by three kinds of determination methods real-time monitoring current periods, and can
The all data for triggering two cycles after first three cycle, triggering cycle and triggering are recorded simultaneously, it is ensured that the integrality of waveform,
Further ensure that the accuracy of ex-post analysis problem.
According to an aspect of the invention, there is provided a kind of monitoring method of power network overvoltage, including：
The basic parameter of setting over-voltage monitoring；
Collection voltages data are simultaneously compressed and are cached, and carried out in quick Fu with predetermined decimation in frequency data to data
Leaf transformation FFT；
Judged by similar waveform, amplitude triggering judges or frequency drift judges that judging the current period of voltage data is
It is no for trigger the cycle；
If current period is the triggering cycle, by the data of current period and the data in first three cycle of current period
In the data Cun Chudao DDR synchronous DRAMs in follow-up two cycles, and it is sent to host computer；And
If current period is not the triggering cycle, using the data of next cycle to DDR synchronous DRAMs
The cycle data for most starting of middle caching is covered.
Preferably, the basic parameter includes：Data sampling rate F, smallest record deviation △ y, maximum storage interval N, most
Low storing frequencies Fk, FFT frequency drift threshold value △ f, FFT fundamental voltage amplitude threshold value △ g and root mean square threshold value △ rms.
Preferably, it is described data are compressed including：By first sampled point X in current periodiIt is recorded as characteristic point,
Then next sampled point X is judgedi+1With XiBetween the absolute value of difference whether be less than △ y, if the difference is more than or equal to
△ y, then cache Xi+1Value and with Xi+1Next second compression is carried out for new characteristic point, until a cycle terminates；If the difference
Value is less than △ y, then the value of quantity a of compression point adds 1, when a is spaced N more than or equal to maximum storage, caches Xi+1Value simultaneously
With Xi+1Next second compression is carried out for new characteristic point, until a cycle terminates.
Preferably, the similar waveform is judged as：When data acquisition is carried out, calculate current period each measuring point with
And the root mean square of the value of the measuring point of corresponding upper a cycle, if the root mean square value is more than root mean square threshold value △ rms,
Then the waveform of current period and upper a cycle is dissimilar, then current period is the triggering cycle, and wherein each cycle has 16
Maximum in measuring point, respectively each cycle, between minimum of a value and maxima and minima uniform collection 14 points.
Preferably, the amplitude triggering is judged as：Data after to carrying out FFT judge, if described carried out after FFT
The fundamental voltage amplitude component of data is more than FFT fundamental voltage amplitude threshold value △ g, then current period is the triggering cycle.
Preferably, the frequency drift is judged as：Data after to carrying out FFT judge, if described carried out after FFT
The frequency departure of data is more than FFT frequency drift threshold value △ f, then current period is the triggering cycle.
Preferably, when monitoring is started, the automatic time service of local clock is carried out by obtaining the pulse per second (PPS) of GPS module, and
Carried out from punctual operation with the clock frequency of 100MHz.
Preferably, before data acquisition is carried out, isolated to measured signal, suppressed even-order harmonics and common-mode noise
Operation.
Preferably, by triggering the cycle data and triggering the cycle first three cycle data and follow-up two cycles
Data is activation to host computer waveform observation processing meanss when, the data volume for sending every time is set, and sent out with multiple circulation pattern
Send.
According to a further aspect in the invention, there is provided a kind of monitoring system of power network overvoltage, including：
Host computer waveform observation processing meanss, look into for carrying out the display of over-voltage waveform, amplification, analysis, historical data
Asking and preserve, and can actively trigger independent acquisition unit carries out data acquisition；
Three road independent acquisition units, for gathering, judging and storing over-voltage waveform signal；And
Mainboard, is three road independent acquisition system power supplies, sends collection signal and external GPS module；
Wherein, include per road independent acquisition system：
Signal condition Acquisition Circuit, for realizing the collection and conversion of overvoltage signal；
FPGA collection plates, the data signal for gathering to signal condition Acquisition Circuit and changing is compressed, synchronous extraction number
Word signal carries out Fast Fourier Transform (FFT), and carries out the judgement in triggering cycle using embedded arm processor；And
DDR synchronous DRAMs, for be compressed rear data signal caching and triggering the cycle data with
And the data and the data storage in follow-up two cycles in first three cycle in triggering cycle.
Preferably, it is described that the system that electrical network carries out over-voltage monitoring is also included：
GPS module, is connected with mainboard, clock alignment for three road independent acquisition systems and from punctual；
SPI interface, for the communication between three road independent acquisition systems and mainboard；And
System control panel, for restarting for parameter setting and FPGA collection plates.
Preferably, it is described also to include per road independent acquisition system：
Network interface, processes software and carries out data transmission for independent acquisition system and host computer waveform observation；And
Serial ports, for reading the calibration data of GPS module transmission.
Preferably, the signal condition Acquisition Circuit includes：
Voltage follower, for isolating measured signal and late-class circuit, wherein the late-class circuit is at single-ended transfer difference
Reason device and A/D Acquisition Circuits；
Single-ended transfer difference processor, for suppressing the even-order harmonics and common-mode noise of measured signal；And
A/D Acquisition Circuits, for the measured signal after process to be acquired and changed, obtain voltage data.
Preferably, when arbitrarily all the way independent acquisition system judges that current collection period is tactile in three road independent acquisition systems
In the cycle of sending out, while data storage is carried out, FPGA collection plates to mainboard sends trigger, and mainboard receives trigger
Afterwards, collection signal is sent to another two-way independent acquisition system, three road independent acquisition systems is entered to the signal of current period simultaneously
Row collection.
Description of the drawings
By reference to the following drawings, the illustrative embodiments of the present invention can be more fully understood by：
Fig. 1 is the flow chart of the voltage over-voltage monitoring method according to the preferred embodiment of the present invention；
Fig. 2 is the method flow diagram being compressed to data according to the preferred embodiment of the present invention；
Fig. 3 is the structure chart of the power network overvoltage monitoring system according to the preferred embodiment of the present invention；And
Fig. 4 is the structure chart of the power network overvoltage monitoring system according to the preferred embodiment of the present invention.
Specific embodiment
With reference now to accompanying drawing, the illustrative embodiments of the present invention are introduced, however, the present invention can be with many different shapes
Formula is not limited to embodiment described herein implementing, there is provided these embodiments are to disclose at large and fully
The present invention, and fully pass on the scope of the present invention to person of ordinary skill in the field.For showing for being illustrated in the accompanying drawings
Term in example property embodiment is not limitation of the invention.In the accompanying drawings, identical cells/elements are attached using identical
Icon is remembered.
Unless otherwise stated, term (including scientific and technical terminology) used herein has to person of ordinary skill in the field
It is common to understand implication.Further it will be understood that the term limited with the dictionary being usually used, is appreciated that and it
The linguistic context of association area has consistent implication, and is not construed as Utopian or excessively formal meaning.
Fig. 1 is the flow chart of the power network overvoltage monitoring method according to the preferred embodiment of the present invention.As shown in figure 1, excessively electric
Pressure monitoring method 100 is from the beginning of step 101.In a step 101, the basic parameter first to monitoring sets, wherein described
Basic parameter includes data sampling rate F, smallest record deviation △ y, maximum storage interval N, minimum storing frequencies Fk, FFT frequency
Drift threshold △ f, FFT fundamental voltage amplitude threshold value △ g and root mean square threshold value △ rms.Meanwhile, when test is proceeded by, pass through
Serial ports obtains the pulse per second (PPS) that GPS module constantly sends, and the local clock in system is awarded automatically by the pulse edge of pulse per second (PPS)
Shi Yici, is subsequently realized from punctual operation inside FPGA with the clock frequency of 100MHz.
In a step 102, the collection of voltage data is carried out, and during collection, the data in each cycle is entered
Row compression is processed, and by the data buffer storage after compression in DDR.Wherein, the compression handling process is as shown in Fig. 2 its process
Can be described in detail in fig. 2.During data acquisition is carried out, while being carried out quickly with predetermined decimation in frequency data
Fourier transformation FFT, generally, the predetermined frequency is 6.4k, and carrying out the data after FFT process can be sentenced by amplitude triggering
Disconnected or frequency drift judges to judge whether current period is the triggering cycle.Preferably, it is a cycle per 20ms.Preferably,
Before data acquisition is carried out, measured signal carries out signal condition operation, main to include isolation measured signal and late-class circuit,
To ensure that some counter productives of measured signal will not be even present in such as measured signal on the voltage data that gathers into impact
Number order harmonicses and common-mode noise etc., and further, by single-ended transfer difference processor to measured signal present in it is even
Number order harmonicses and common-mode noise are suppressed, and reduce interference, make measured signal reach the standard for being available for A/D Acquisition Circuits to gather.
In step 103, judged by similar waveform, amplitude triggering judges or frequency drift judges, judges voltage data
Current period whether be the triggering cycle, if current period be the triggering cycle, carry out step 104；Otherwise carry out step 105.
Wherein, the similar waveform is judged as, during data acquisition is carried out, gathers and mark 16 in each cycle to record
14 points of uniform collection in the middle of maximum and minimum of a value in point, respectively each cycle, and maximum and minimum of a value.Entering
When row similar waveform judges, the value of the measuring point of each measuring point and corresponding upper a cycle of current period is calculated
Root mean square, if the root mean square value is more than root mean square threshold value △ rms set in advance, proves current period for triggering week
Phase, and carry out next step operation.
Preferably, the amplitude triggering is judged as：Data after to carrying out FFT judge, if described carried out after FFT
The fundamental voltage amplitude component of data is more than FFT fundamental voltage amplitudes threshold value △ g set in advance, then current period is the triggering cycle, is gone forward side by side
Row next step is operated.
Preferably, the frequency drift is judged as：Data after to carrying out FFT judge, if described carried out after FFT
The frequency departure of data is more than FFT frequency drifts threshold value △ f set in advance, then current period is the triggering cycle, and is carried out down
Single stepping.It will be appreciated that when carrying out the judgement in triggering cycle, as long as meeting, similar waveform judges, amplitude triggering judges
Any one trigger condition in judging with frequency drift, it is possible to judge current period for the triggering cycle.
At step 104, current period is judged as the triggering cycle, then by the data of current period and current period
In the data Cun Chudao DDR synchronous DRAMs in the data in first three cycle and follow-up two cycles, and transmit
The operation such as preserved, analyzed to host computer.Preferably, the data is activation with host computer waveform observation processing meanss is being carried out
When, a network transmission thread is created in the embedded arm processor of FPGA collection plates, and by arranging the data for sending every time
Amount, with the transmission that multiple circulation pattern carries out data, the process of the network transmission is described in detail in Fig. 3.
In step 105, when current period is not the triggering cycle, then the data using next cycle are synchronously dynamic to DDR
The cycle data for most starting cached in state random access memory is covered.Fig. 2 is the logarithm according to the preferred embodiment of the present invention
According to the method flow diagram being compressed.Because this method needs the overlong time of monitoring, data volume excessive, if to each cycle
Data carry out complete storage, will occupy excessive memory space, while the speed of operation also can decline, so needing to collection
Data carry out Real Time Compression, the data after being compressed can as far as possible represent complete cycle data content, it is possible to
Sampling is completed under non-volatile recording with higher sample rate.It is described data are compressed including：By in current period
One sampled point XiCharacteristic point is recorded as, next sampled point X is then judgedi+1With XiBetween the absolute value of difference whether be less than
△ y, if the difference is more than or equal to △ y, cache Xi+1Value and with Xi+1Next second compression is carried out for new characteristic point, directly
Terminate to a cycle；If the difference is less than △ y, the value of quantity a of compression point adds 1, when a is more than or equal to maximum storage
During the N of interval, X is cachedi+1Value and with Xi+1Next second compression is carried out for new characteristic point, until a cycle terminates.
Fig. 3 is the flow chart of the determination methods of the network transmission thread according to the preferred embodiment of the present invention.Carry out network biography
When defeated, if a transmission quantity is excessive, the stuck phenomenon of network is susceptible to, if sending a low volume data, can affect to pass
Defeated efficiency, therefore the present invention is when network transmission is carried out, and arranges the data volume for sending every time, and with the transmission of multiple circulation pattern,
Realize efficient, stable network transmission.
In transmitting procedure, the transformat of data is command word, byte number, time, packet making, packet sum, data
Bale No., data, real data number.A network transmission thread is created first in arm processor, for carrying out network behaviour
Make.Then setting marks point_num, for indicating that the data of a cycle are counted；Cmd is labeled as command word；Use array
The Wave data of DmaBuf storage collections, BufLen is real data length；Trig_flag_glb is set as same triggering moment
The data markers for being stored, each triggering moment stores the data in 6 cycles；Send out required for the cycle data of total marks one
The total bag number for sending, the actual number-of-packet for sending of packet_num marks；The actual byte for sending of actual_length marks
Number.
In DDR memory, one buffering area is set using empty storage region, it would be desirable to send to host computer waveform observation
The data buffer storage of reason device when carrying out network transmission, first determines whether whether also there are data needs in buffering area into buffering area
Send, if it does not exist, then do not operated, if it is present sending this week to host computer waveform observation processing meanss first
The initial time of issue evidence, triggered time and same triggering moment mark trig_flag_glb, at host computer waveform observation
Reason device judges that hair data are the data that a same trigger is recorded；When the time number that upper computer detection is received
After correct, will return allows data transfer instruction, and arm processor judges to receive after instruction, judges to be deposited in DmaBuf arrays
Whether the data length BufLen of storage is more than 1024, and 1024 bytes, i.e. actual_length are if it is sent per bag data
=1024, then according to form cmd+total+packet_num+DmaBuf+actual_length at host computer waveform observation
Reason device sends data, and the value of DmaBuf here is 1204 bytes, and packet_num adds one, and BufLen length deducts 1024
It is individual；If BufLen length is less than 1024, actual_length=BufLen；Data are sent according to identical instruction format,
Part less than 1024 data 0x00 polishing；Stop sending as packet_num==total, show the number of a cycle
According to being sent completely, beginning cycles through the data in next cycle next time.In the event of switch phenomenon, then arm processor is waited until
After having sent this cycle data, host computer waveform observation processing meanss again beam back the Bale No. of fallen data, and arm processor is again
It is transmitted.
Fig. 4 is the structure chart of the power network overvoltage monitoring system according to the preferred embodiment of the present invention.As shown in figure 4, excessively electric
Pressure monitoring system 400 mainly includes 403 groups of host computer waveform observation processing meanss 401, independent acquisition unit 402 and mainboard
Into.Wherein, host computer waveform observation processing meanss 401 are mainly used in carrying out display, amplification, analysis, the history of over-voltage waveform
Data query and preservation, and can actively trigger independent acquisition unit and carry out data acquisition.
Preferably, independent acquisition unit 402 should have in actual applications 3 same units in systems, in the diagram only
The structure chart of an independent acquisition unit 402 is given, to reach signal effect, in practical application, is with 3 independent acquisition units
It is accurate.In independent acquisition unit 402, mainly include signal condition Acquisition Circuit 4021, for realizing the collection of overvoltage signal,
And changed the voltage signal for collecting, data signal is exported into FPGA collection plates 4022.
Preferably, in FPGA collection plates 4022 after the data signal of the receiving signal reason output of Acquisition Circuit 4021, to this
Data signal is compressed process, and signal after compression is cached into DDR synchronous DRAMs 4023, while with pre-
The decimation in frequency data signal for first setting carries out Fast Fourier Transform (FFT), and is embedded in FPGA collection plates 4022 using utilizing
Arm processor carries out the judgement in triggering cycle, and the judgement includes that similar waveform judges, amplitude triggering judges and frequency drift
Judge.It will be appreciated that in actual applications, arbitrarily all the way independent acquisition system is judged to work as in three road independent acquisition systems
Front collection period is the triggering cycle, and while data storage is carried out, FPGA collection plates 4022 to mainboard 403 sends triggering letter
Number, mainboard is received after trigger, sends collection signal to another two-way independent acquisition system, makes three road independent acquisition systems same
When the signal of current period is acquired.
Preferably, signal condition Acquisition Circuit 4021 mainly includes three parts, respectively voltage follower, single-ended slip
Divide processor and A/D Acquisition Circuits.Preferably due to the negative-feedback in voltage follower is terminated with the resistance of 0 Ω so that electricity
The approximate input voltage amplitude of pressure follower output voltage, and to measured signal end is in high-impedance state, is in low-resistance shape to late-class circuit
State, thus " isolation " effect is played to front stage circuit, wherein, late-class circuit is primarily referred to as single-ended transfer difference processor and A/
D Acquisition Circuits.Preferably, the AD8138 amplifiers that single-ended transfer difference processor is adopted, using its internal feedback characteristic, Ke Yiti
For output gain and phase matched balance, so as to suppress even-order harmonics, while employing the high speed that highest frequency is 20MHz
12 A/D chip AD9224, it is suppressed that the common-mode noise of measured signal, further reduce interference.Preferably, A/D Acquisition Circuits
AD9224 chips are mainly employed, highest sample rate is up to 40MHz, and signal to noise ratio is up to 68.3dB, high-performance in a built-in piece
Sample/hold amplifier and reference voltage source, using differential pipeline framework, built-in output error correction logic, to ensure in whole work
Make not losing code in temperature range, realize the collection of high-speed data.
Preferably, DDR synchronous DRAMs 4023 are used to be compressed the caching of rear data signal and triggering week
The data of phase and the data and the data storage in follow-up two cycles in first three cycle in triggering cycle.With similar waveform judgement
As a example by, DDR synchronous DRAMs 4023 can cache the data in three cycles when being cached, and adopt FPGA is waited
Judged result of the collection plate 4022 to current period, if the waveform of current period is similar waveform with the waveform of upper a cycle,
Then the cycle data of the caching for most starting is removed, for storing the data of current period, if the waveform of current period with it is upper
The waveform of a cycle is dissimilar, then by the data of current period and the data in first three cycle of current period and follow-up two
The data in individual cycle are stored, when next cycle data need to be cached, then from the next one of storage location
Null byte starts caching.
Preferably, independent acquisition unit 402 also includes network interface 4024, for independent acquisition system 402 and host computer
Waveform observation processing meanss 401 carry out data transmission.The network interface 4024 mainly carries out network biography using ICP/IP protocol
It is defeated.
Preferably, independent acquisition unit 402 also includes serial ports 4025, for reading the calibration number of the transmission of GPS module 404
According to.
Preferably, mainboard 403 is powered for independent acquisition system 402, and is being connected to the triggering of the transmission of independent acquisition system 402
Collection signal is sent to another two-way independent acquisition system 402 after signal, and while external GPS module 404, receives GPS module 404
The clock correction data of transmission.
Preferably, the over-voltage monitoring system 400 also includes GPS module 404, is connected with mainboard, for independent acquisition
The clock alignment of system 402 and from punctual；SPI interface 405, for the communication between independent acquisition system 402 and mainboard 403；
And system control panel 406, for restarting for parameter setting and FPGA collection plates 4021.
The present invention is described by reference to a small amount of embodiment.However, it is known in those skilled in the art, as
What subsidiary Patent right requirement was limited, except the present invention other embodiments disclosed above equally fall the present invention's
In the range of.
Normally, all terms for using in the claims are all solved according to them in the usual implication of technical field
Release, unless clearly defined in addition wherein.It is all of to be all opened ground with reference to " one/described/be somebody's turn to do [device, component etc.] "
At least one of described device, component etc. example is construed to, unless otherwise expressly specified.Any method disclosed herein
Step all need not be run with disclosed accurate order, unless explicitly stated otherwise.
Claims (14)
1. a kind of monitoring method of power network overvoltage, including：
The basic parameter of setting over-voltage monitoring；
Collection voltages data are simultaneously compressed and cache, and carry out fast Fourier change with predetermined decimation in frequency data to data
Change FFT；
Judged by similar waveform, amplitude triggering judges or frequency drift judges, whether the current period for judging voltage data is
The triggering cycle；
If current period is the triggering cycle, by the data in the data of current period and first three cycle of current period with after
In continuing the data Cun Chudao DDR synchronous DRAMs in two cycles, and it is sent to host computer；And
If current period is not the triggering cycle, using the data of next cycle to delaying in DDR synchronous DRAMs
The cycle data for most starting deposited is covered.
2. method according to claim 1, it is characterised in that the basic parameter includes：Data sampling rate F, most short biography
Record deviation △ y, maximum storage interval N, minimum storing frequencies Fk, FFT frequency drift threshold value △ f, FFT fundamental voltage amplitude threshold value △ g
And root mean square threshold value △ rms.
3. method according to claim 1, it is characterised in that it is described data are compressed including：By in current period
First sampled point XiCharacteristic point is recorded as, next sampled point X is then judgedi+1With XiBetween difference absolute value it is whether little
In △ y, if the difference is more than or equal to △ y, X is cachedi+1Value and with Xi+1Next second compression is carried out for new characteristic point,
Until a cycle terminates；If the difference is less than △ y, the value of quantity a of compression point adds 1, when a is deposited more than or equal to maximum
During the N of storage interval, X is cachedi+1Value and with Xi+1Next second compression is carried out for new characteristic point, until a cycle terminates.
4. method according to claim 2, it is characterised in that the similar waveform is judged as：When data acquisition is carried out,
The root mean square of the value of the measuring point of each measuring point and corresponding upper a cycle of current period is calculated, if described square
The value of root is more than root mean square threshold value △ rms, then the waveform of current period and upper a cycle is dissimilar, then current period is triggering
There are 16 measuring points in cycle, wherein each cycle, the maximum, minimum of a value and maximum respectively in each cycle with most
14 points of uniform collection between little value.
5. method according to claim 2, it is characterised in that the amplitude triggering is judged as：Data after to carrying out FFT
Judged, if the fundamental voltage amplitude component for carrying out the data after FFT is more than FFT fundamental voltage amplitude threshold value △ g, current period
To trigger the cycle.
6. method according to claim 2, it is characterised in that the frequency drift is judged as：Data after to carrying out FFT
Judged, if the frequency departure for carrying out the data after FFT is more than FFT frequency drift threshold value △ f, current period is tactile
The cycle of sending out.
7. method according to claim 1, it is characterised in that when monitoring is started, by the pulse per second (PPS) for obtaining GPS module
The automatic time service of local clock is carried out, and is carried out from punctual operation with the clock frequency of 100MHz.
8. method according to claim 1, it is characterised in that before signals collecting is carried out, carry out to measured signal every
From, suppress even-order harmonics and common-mode noise operation.
9. method according to claim 1, it is characterised in that by the data in triggering cycle and triggering cycle first three
When the data is activation in the data in individual cycle and follow-up two cycles is to host computer, the data volume for sending every time is set, and with multiple
Circulation pattern sends.
10. a kind of monitoring system of power network overvoltage, including：
Host computer waveform observation processing meanss, for carry out the display of over-voltage waveform, amplification, analysis, the inquiry of historical data with
And preserve, and can actively trigger independent acquisition unit and carry out data acquisition；
Three road independent acquisition units, for gathering, judging and storing over-voltage waveform signal；And
Mainboard, is three road independent acquisition system power supplies, sends collection signal and external GPS module；
Wherein, include per road independent acquisition system：
Signal condition Acquisition Circuit, for realizing the collection and conversion of overvoltage signal；
FPGA collection plates, the data signal for gathering to signal condition Acquisition Circuit and changing is compressed, synchronous to extract numeral letter
Fast Fourier Transform (FFT) number is carried out, and the judgement in triggering cycle is carried out using embedded arm processor；And
DDR synchronous DRAMs, for being compressed the caching and the data in triggering cycle of rear data signal and touching
The data and the data storage in follow-up two cycles in first three cycle in the cycle of sending out.
11. systems according to claim 10, it is characterised in that described that the system that electrical network carries out over-voltage monitoring is also wrapped
Include：
GPS module, is connected with mainboard, clock alignment for three road independent acquisition systems and from punctual；
SPI interface, for the communication between three road independent acquisition systems and mainboard；And
System control panel, for restarting for parameter setting and FPGA collection plates.
12. systems according to claim 10, it is characterised in that described also to include per road independent acquisition system：
Network interface, processes software and carries out data transmission for independent acquisition system and host computer waveform observation；And
Serial ports, for reading the calibration data of GPS module transmission.
13. systems according to claim 10, it is characterised in that the signal condition Acquisition Circuit includes：
Voltage follower, for isolating measured signal and late-class circuit, wherein the late-class circuit is single-ended transfer difference processor
With A/D Acquisition Circuits；
Single-ended transfer difference processor, for suppressing the even-order harmonics and common-mode noise of measured signal；And
A/D Acquisition Circuits, for the measured signal after process to be acquired and changed.
14. systems according to claim 10, it is characterised in that when arbitrarily independently adopting all the way in three road independent acquisition systems
Collecting system judges that current collection period is the triggering cycle, and while data storage is carried out, FPGA collection plates to mainboard sends
Trigger, mainboard is received after trigger, sends collection signal to another two-way independent acquisition system, makes three road independent acquisitions
System is acquired to the signal of current period simultaneously.
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