Disclosure of Invention
The embodiment of the invention aims to provide a wireless charger and a wireless charging control method, and solves the technical problem that the wireless charger is unstable in operation when the load of a receiver in the prior art is disturbed.
In order to solve the above technical problems, embodiments of the present invention provide the following technical solutions:
in a first aspect, embodiments of the present invention provide a wireless charger, the wireless charger comprising a receiver and a transmitter; the receiver modulates a communication signal to a power carrier, and when the receiver resonates with the transmitter, the transmitter demodulates the communication signal from the power carrier carrying load disturbance, and adjusts an alternating magnetic field according to the communication signal, so that the receiver generates a preset voltage. Resonance of
Optionally, the transmitter includes a first capacitor, and the transmitter is further configured to detect a voltage across the first capacitor applied by the power carrier.
Optionally, the transmitter further includes a communication demodulation circuit, configured to demodulate the voltage across the first capacitor to obtain the communication signal.
Optionally, the communication demodulation circuit includes:
the differential circuit comprises a differential input end and a differential output end, the differential input end is loaded with the voltage at two ends of the first capacitor, and the differential circuit is used for converting the voltage at two ends of the first capacitor into a first voltage;
the analog switch circuit comprises an analog input end, an analog output end and an analog control end, wherein the analog input end is connected with the differential output end, and the analog control end is used for receiving a gating signal so as to enable the first voltage to pass through the analog switch circuit;
the filter circuit comprises a filter input end and a filter output end, the filter input end is connected with the analog output end, and the filter circuit is used for filtering high-frequency signals of the first voltage and obtaining a second voltage used for indicating the average value of the first voltage;
the alternating current amplifying circuit comprises an amplifying input end and an amplifying output end, the filtering output end is connected with the amplifying input end, and the alternating current amplifying circuit is used for amplifying the second voltage into a third voltage;
and the shaping circuit comprises a shaping input end and a shaping output end, the shaping input end is connected with the amplifying output end, the shaping circuit is used for shaping the third voltage into a square wave signal, and the communication signal is the square wave signal.
Optionally, the transmitter further comprises:
the transmitting control circuit is used for receiving the communication signal and outputting a first driving signal and a second driving signal according to the communication signal;
the boost chopper circuit is used for receiving a direct-current voltage and the first driving signal and boosting the direct-current voltage into a fourth voltage according to the first driving signal;
the inverter circuit is used for receiving the second driving signal and inverting the fourth voltage into a fifth voltage of a symmetrical square wave according to the second driving signal;
a first resonant circuit for receiving the fifth voltage and regulating the alternating magnetic field in accordance with the fifth voltage.
Optionally, the strobe signal is a pulse width modulated signal of a positive half cycle, and the transmission control circuit continues to output the strobe signal during a positive half cycle of the fifth voltage.
Optionally, the receiver comprises:
the sampling circuit is used for sampling a voltage signal loaded to a load;
the receiving control circuit is connected with the sampling circuit and used for outputting a modulation driving signal according to the voltage signal;
and the communication modulation circuit is connected with the receiving control circuit and is used for modulating the communication signal to a power carrier according to the modulation driving signal.
Optionally, the receiver further comprises:
the second resonant circuit is used for coupling the first resonant circuit and inducing a sixth voltage;
and the rectifying and filtering circuit is connected with the second resonant circuit and is used for rectifying and filtering the sixth voltage and providing power for a load.
In a second aspect, an embodiment of the present invention provides a wireless charging control method, where the method includes: receiving a power carrier carrying load disturbance when forming resonance with a receiver, wherein the receiver modulates a communication signal on the power carrier; and demodulating the communication signal from the power carrier, and adjusting the alternating magnetic field according to the communication signal so as to enable the receiver to generate a preset voltage.
Optionally, demodulating the communication signal from the power carrier carrying the load disturbance when forming resonance with the receiver includes: when the resonance is formed between the power carrier and a receiver, detecting the voltage loaded at two ends of the first capacitor by the power carrier carrying load disturbance; and demodulating the voltage at the two ends of the first capacitor to obtain the communication signal.
In each embodiment of the invention, the receiver modulates the communication signal to the power carrier, and when the receiver forms resonance with the transmitter, the transmitter demodulates the communication signal from the power carrier carrying load disturbance, and adjusts the alternating magnetic field according to the communication signal so as to enable the receiver to generate preset voltage resonance, therefore, when the load of the receiver is disturbed, the disturbance can be coupled to the power carrier, the transmitter decouples and strips the load disturbance quantity to construct a communication signal with the load disturbance factor removed, and demodulates the communication signal to finally restore a correct communication signal, thereby effectively enhancing the load disturbance resistance of the wireless charger communication, and improving the reliability and safety of the wireless charger operation.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Fig. 1 is a schematic block diagram of a wireless charger according to an embodiment of the present invention. As shown in fig. 1, the wireless charger 10 includes a receiver 101 and a transmitter 102. The receiver 101 modulates the communication signal to the power carrier, and when the receiver is resonant with the transmitter 102, the transmitter 102 demodulates the communication signal from the power carrier carrying the load disturbance, and adjusts the alternating magnetic field according to the communication signal, so that the receiver 101 generates a preset voltage.
When the receiver is used for normally charging the load, the external interference factors interfere the normal charging of the load, and the interference phenomenon can be expressed as fluctuation of charging current of the load, so that the communication signal demodulated by the transmitter is distorted, and the working safety and stability of the wireless charger are influenced. The load may be an electronic device supporting a wireless charging function, such as a mobile phone, a computer, a smart wearable device, and so on. The external interference factor can be the state that a background application program of the mobile phone runs in a burst mode when the mobile phone is in wireless charging; may be while wirelessly charging, receiving an incoming call, may be while wirelessly charging, talking, and so on.
In the embodiment, when the load of the receiver is disturbed, the disturbance is coupled to the power carrier, the transmitter decouples and strips the load disturbance amount to construct a communication signal with the load disturbance factors removed, demodulates the communication signal and finally restores a correct communication signal, so that the load disturbance resistance of the wireless charger communication is effectively enhanced, and the reliability and the safety of the wireless charger operation are improved.
Fig. 2 is a schematic circuit diagram of a wireless charger according to an embodiment of the present invention. As shown in fig. 2, the transmitter 102 includes a first capacitance C101. In order to reduce the difficulty of demodulating the communication signal from the power carrier, when the transmitter 102 and the receiver 101 form resonance, the transmitter 102 directly detects the voltage U applied to the first capacitor C101 by the power carrierC101For subsequent voltage U from both ends of the first capacitor C101C101And demodulating the communication signal.
Optionally, as shown in fig. 2, the transmitter 102 further includes a communication demodulation circuit 020, the communication demodulation circuit 020 demodulates the voltage across the first capacitor C101 into a communication signal, and the transmitter 102 adjusts the alternating magnetic field according to the communication signal.
As shown in fig. 3, in some embodiments, the communication demodulation circuit 020 includes a differential circuit 0201, an analog switch circuit 0202, a filter circuit 0203, an ac amplification circuit 0204, and a shaping circuit 0205. The differential circuit 0201 comprises a differential input 051 and a differential output 052, the voltage U at two ends of the first capacitor C101C101The voltage U between two ends of the first capacitor C101 is loaded to a differential input end 051 and is converted into a voltage U between two ends of the first capacitor C101 by a differential circuit 0201C101Is converted into a first voltage UC101_1. The analog switch circuit 0202 includes an analog input terminal 053, an analog output terminal 054 and an analog control terminal 055, the analog input terminal 053 is connected with the differential output terminal 052. When the analog control terminal 055 receives the strobe signal, the analog switch circuit 0202 is closed,first voltage UC101_1Through analog switch circuit 0202. The filter circuit 0203 comprises a filter input end 056 and a filter output end 057, the filter input end 056 is connected with the analog output end 054, and the filter circuit 0203 filters the first voltage UC101_1And deriving a signal indicative of the first voltage UC101_1Second voltage U of average value ofC101_2. The alternating current amplifying circuit 0204 comprises an amplifying input end 058 and an amplifying output end 059, the filtering output end 057 is connected with the amplifying input end 058, and the alternating current amplifying circuit 0204 enables the second voltage UC101_2Amplifying to a third voltage UC101_3. The shaping circuit 0205 comprises a shaping input 060 and a shaping output 061, the shaping input 060 being connected to the amplifying output 059, the shaping circuit 0205 coupling the third voltage UC101_3The square wave signal is formed by shaping, and the communication signal is the square wave signal.
As shown in fig. 2, in some embodiments, the differential circuit 0201 includes a first operational amplifier U101, a first resistor R104, a second resistor R105, a third resistor R106, and a fourth resistor R107, and the differential circuit 0201 matches the bias voltage Vref to apply the voltage U across the first capacitor C101C101Is converted into a first voltage U matched with a post-stage circuitC101_1。
As shown in fig. 2, the filter circuit 0203 includes a fifth resistor R108 and a second capacitor C107, and the filter circuit 0203 filters the first voltage UC101_1And deriving a signal indicative of the first voltage UC101_1Second voltage U of average value ofC101_2。
As shown in fig. 2, the ac amplifying circuit 0204 includes a second operational amplifier U102, a sixth resistor R109, a seventh resistor R110, and a third capacitor C108, and converts the first-stage ac signal, i.e., the second voltage UC101_2Amplified to a third voltage UC101_3。
As shown in fig. 2, the shaping circuit 0205 includes a third operational amplifier U103, an eighth resistor R111, a ninth resistor R112, and a fourth capacitor C109. Shaping circuit 0205 supplies third voltage UC101_3Shaped into square-wave signal UC101_4And the communication signal is a square wave signal UC101_4。
As shown in fig. 2, one end of the first resistor R104 is connected to one end of the first capacitor C101, and the other end of the first resistor R104 is connected to the positive input end of the first operational amplifier U101; one end of a third resistor R106 is connected with the other end of the first capacitor C101, and the other end of the third resistor R106 is connected with the negative input end of the first operational amplifier U101; one end of a second resistor R105 is connected with the bias voltage Vref, and the other end of the second resistor R105 is connected with the positive input end of the first operational amplifier U101; one end of the fourth resistor R107 is connected with the negative input end of the first operational amplifier U101, and the other end of the fourth resistor R107 is connected with the output end of the first operational amplifier U101; an analog input end 053 of the analog switch circuit 0202 is connected with an output end of the first operational amplifier U101; one end of the fifth resistor R108 is connected to the analog output end 054 of the analog switch circuit 0202, and the other end of the fifth resistor R108 is connected to the positive input end of the second operational amplifier U102; one end of the second capacitor C107 is connected to the positive input end of the second operational amplifier U102, and the other end of the second capacitor C107 is connected to ground GND; one end of a sixth resistor R109 is connected with the negative input end of the second operational amplifier U102, the other end of the sixth resistor R109 is connected with one end of a third capacitor C108, and the other end of the third capacitor C108 is connected with the ground GND; one end of the seventh resistor R110 is connected to the negative input end of the second operational amplifier U102, and the other end of the seventh resistor R110 is connected to the output end of the second operational amplifier U102; one end of an eighth resistor R111 is connected with the output end of the second operational amplifier U102, and the other end of the eighth resistor R111 is connected with the positive input end of the third operational amplifier U103; one end of a ninth resistor R112 is connected with the output end of the second operational amplifier U102, and the other end of the eighth resistor R111 is connected with the negative input end of the third operational amplifier U103; one end of the fourth capacitor C109 is connected to the negative input terminal of the third operational amplifier U103, and the other end of the fourth capacitor C109 is connected to ground GND.
In some embodiments, as shown in fig. 2, the transmitter 102 further includes a transmission control circuit 021, a boost chopper circuit 022, an inverter circuit 023, and a first resonant circuit 024. The transmission control circuit 021 receives the communication signal and outputs a first driving signal and a second driving signal according to the communication signal. The boost chopper circuit 022 receives the direct current voltage and the first drive signal, and boosts the direct current voltage to a fourth voltage according to the first drive signalAnd (6) pressing. Inverter circuit 023 receives the second driving signal and inverts the fourth voltage into a fifth voltage U of a symmetrical square wave according to the second driving signalAB. The first resonance circuit 024 receives the fifth voltage UABAnd according to the fifth voltage UABThe alternating magnetic field is adjusted.
Please refer to fig. 2 again. The emission control circuit 021 is a processor comprising a plurality of signal inputs and signal outputs, wherein the shaping circuit 0205 shapes the communication signal UC101_4To the processor. The processor is also connected to the analog control terminal 055 of the analog switch circuit 0202 and sends a first pulse width modulated signal PWM1 to the analog switch circuit 0202 to control the analog switch circuit 0202 to turn on and off. In some embodiments, the positive half-cycle of the first PWM1 is the gating signal that the analog switch circuit 0202 receives to turn on and at the fifth voltage UABDuring the positive half period of (3), the transmission control circuit 021 continuously outputs the strobe signal so that UC101The (theta) signal can only be in UABThe (θ) positive half cycle passes through the analog switch circuit 0202. The processor herein may be comprised of a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Also, the processor herein may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
As shown in fig. 2, the boost chopper circuit 022 includes a dc voltage source Vin, a first inductor L, a fifth capacitor C110, a sixth capacitor C111, a first NMOS transistor Q107, a first diode D105, and a first driving module Dr 107. the dc power Vin is connected in parallel with the fifth capacitor C110, the first inductor L, the first diode D105, and the sixth capacitor C111 are sequentially connected in series and then connected in parallel with the fifth capacitor C110, one end of the first inductor L is connected to the anode of the fifth capacitor C110, the other end of the first inductor L is connected to the anode of the first diode D105, the cathode of the first diode D105 is connected to the anode of the sixth capacitor C111, the cathode of the sixth capacitor C111 is grounded GND, the drain of the first NMOS transistor Q107 is connected between the first inductor L and the first diode D105, the source of the first NMOS transistor Q107 is grounded, the gate of the first NMOS transistor Q107 is connected to the output terminal of the first driving module Dr107, the first NMOS transistor Q107 is connected to the first boost chopper circuit 021, and the first PWM driving module is connected to control the dc voltage source Vin to emit a first boost pulse width drive signal, and the first PWM driving module drv drive module is connected to control the first boost chopper drive module 022 to emit a first PWM signal emitting PWM signal, the first PWM drive module emitting PWM signal emitting diode emitting.
As shown in fig. 2, the inverter circuit 023 is a full-bridge inverter circuit, wherein the inverter circuit 023 includes a second NMOS transistor Q101, a third NMOS transistor Q102, a fourth NMOS transistor Q103, a fifth NMOS transistor Q104, a second driving module Dr101, a third driving module Dr102, a fourth driving module Dr103, and a fifth driving module Dr 104; the drain electrode of the second NMOS tube Q101 is connected with the drain electrode of the fifth NMOS tube Q104 and then is connected with the anode of the sixth capacitor C111; the source electrode of the third NMOS tube Q102 and the source electrode of the fourth NMOS tube Q103 are connected and then connected with the negative electrode of the sixth capacitor C111; the source electrode of the second NMOS tube Q101 is connected with the drain electrode of the third NMOS tube Q102, wherein the connection point is marked as a point A; the source electrode of the fifth NMOS tube Q104 is connected with the drain electrode of the fourth NMOS tube Q103, and the connection point is marked as a point B; the gate of the second NMOS transistor Q101, the gate of the third NMOS transistor Q102, the gate of the fourth NMOS transistor Q103, and the gate of the fifth NMOS transistor Q104 are sequentially connected to the output terminal of the second driving module Dr101, the output terminal of the third driving module Dr102, the output terminal of the fourth driving module Dr103, and the output terminal of the fifth driving module Dr104, and the emission control circuit 021 sequentially transmits the first pulse width modulation signal PWM1, the second pulse width modulation signal PWM2, the fourth pulse width modulation signal PWM4, and the third pulse width modulation signal PWM3 to the input terminal of the second driving module Dr101, the input terminal of the third driving module Dr102, the input terminal of the fourth driving module Dr103, and the input terminal of the fifth driving module Dr 104.
As shown in fig. 2, the first resonance circuit 024 includes a transmitting-side coil L101, one end of a first capacitor C101 is connected to a point a of the inverter circuit 023, the other end of the first capacitor C101 is connected to one end of a transmitting-side coil L101, and the other end of a transmitting-side coil L101 is connected to a point B of the inverter circuit 023.
As shown in fig. 2, in some embodiments, the receiver 101 includes a sampling circuit 030, a reception control circuit 031, a communication modulation circuit 032, a second resonant circuit 033 and a rectifying and filtering circuit 034. The sampling circuit 030 samples a voltage signal applied to a load. The receiving control circuit 031 is connected to the sampling circuit and is configured to output a modulation driving signal according to the voltage signal. The communication modulation circuit 032 is connected to the receiving control circuit 031, and is used for modulating the communication signal to a power carrier according to the modulation driving signal. The second resonant circuit 033 is configured to couple to the first resonant circuit to induce a sixth voltage. The rectifying and filtering circuit 034 is connected to the second resonant circuit 033 for rectifying and filtering the sixth voltage to provide power to the load.
As shown in fig. 2, the sampling circuit 030 includes a tenth resistor R102, an eleventh resistor R103, and a seventh capacitor C106. One end of the tenth resistor R102 is connected to the positive electrode of the eighth capacitor C105 of the rectifying and filtering circuit 034, the other end of the tenth resistor R102 is connected to one end of the eleventh resistor R103, the other end of the eleventh R103 is connected to ground GND, and the seventh capacitor C106 is connected in parallel to the eleventh resistor R103.
As shown in fig. 2, the receiving control circuit 031 is a processor, the communication modulation circuit 032 includes a fifth NMOS transistor Q105, a sixth NMOS transistor Q106, a ninth capacitor C103, and a tenth capacitor C104, the rectifying and filtering circuit 034 includes a second diode D101, a third diode D102, a fourth diode D103, a fifth diode D104, an eighth capacitor C105, and a load resistor R101, the second resonant circuit 033 includes a ninth capacitor C102 and a receiving end coil L102, one end of the ninth capacitor C102 is connected to the positive electrode of the second diode D101, one end of the receiving end coil L102 is connected to the positive electrode of the fifth diode D104, the other end of the ninth capacitor C102 is connected to the other end of the receiving end coil L102, one end of the ninth capacitor C103 is connected to the positive electrode of the second diode D101, the other end of the ninth capacitor C103 is connected to the positive electrode of the fifth NMOS transistor Q105, the source of the fifth gate transistor Q105 is connected to the ground GND, one end of the tenth capacitor C104 is connected to the positive electrode of the sixth diode D102, the negative electrode of the sixth diode D106, the fifth diode D105 is connected to the negative electrode of the fifth diode Q105, the negative electrode of the sixth diode Q105 is connected to the negative electrode of the fifth diode Q105, the drain electrode of the fifth diode Q105, the sixth diode Q105, the fifth diode Q105 is connected to the drain electrode of the sixth diode Q105, the drain electrode of the fifth diode Q105, the fifth diode Q104 is connected to the drain electrode of the sixth diode Q105, the drain electrode of the fifth diode Q105, the fifth diode Q105 is connected to the drain electrode of the sixth diode Q105, and the drain electrode of the fifth diode Q104, and the drain electrode of the fifth diode Q105, the fifth diode Q.
The working principle of the wireless charger is as follows:
the boost chopper circuit 022 boosts the voltage of the dc voltage source Vin to UDCInverter circuit 023 outputs UDCInverting into symmetrical voltage square wave with angular frequency of omega and duty ratio of 50%, i.e. fifth voltage UABThe first resonant circuit 024 is driven to excite an alternating magnetic field, and the second resonant circuit 033 of the receiver 101 induces a corresponding voltage after coupling the magnetic field, and the voltage is rectified and filtered by the rectifier and filter circuit 034 to be a direct-current voltage and supply power to a load. Power is transmitted from the first resonant circuit 024 to the second resonant circuit 033, and the alternating voltage, the alternating current, and the alternating magnetic field on the transmission path are collectively referred to as a power carrier wave, which can not only transmit power but also serve as a carrier for transmitting communication information. The sampling circuit 030 acquires the output voltage of the rectifying and filtering circuit 034, and converts the sampling information into the angular frequency of omegaMModulated drive signal (angular frequency ω)MMuch lower than the power carrier frequency ω) for driving the fifth NMOS Q105 and the sixth NMOS Q106 of the communication modulation circuit 032 to turn on or off the power of the second resonant circuit 033 through the dropping capacitor C103 (i.e. the ninth capacitor) and the capacitor C104 (the tenth capacitor)The carrier wave carries out amplitude modulation, and the power carrier wave carries communication information to transmit to first resonant circuit 024, detects and modulates the back through communication demodulation circuit 020, restores to communication information, and communication information is sent into emission control circuit 021, and emission control circuit 021 controls boost chopper circuit 022 according to communication information, and then through adjusting voltage UDCThe output voltage of the rectifying and filtering circuit 034 is made to conform to a desired value, thereby realizing the resonant wireless charging closed-loop control.
Further, the series resonance angular frequency of the leakage inductance component of the first capacitor C101 and the transmitting side coil L101 is set to ω, and the series resonance angular frequency of the leakage inductance component of the ninth capacitor C102 and the receiving side coil L102 is set to ωDCInverting into symmetrical voltage square waves with angular frequency of omega and duty ratio of 50%, driving the first resonance circuit 024 and the second resonance circuit 033 to resonate, at this time, the series impedance of the leakage inductance component of the first capacitor C101 and the transmitting end coil L101 is zero, and correspondingly, the series impedance of the ninth capacitor C102 and the leakage inductance component of the receiving end coil L102 is zero, omitting the harmonic part of the power carrier, considering only the fundamental wave, and making an equivalent circuit diagram consisting of the first resonance circuit 024, the second resonance circuit 033, the communication modulation circuit 032 and the rectification filter circuit 034 as shown in fig. 4.
As shown in FIG. 4, L104 is the coupling inductance component of the transmitting coil L101, C113 is the equivalent capacitance of the receiving end modulating capacitor C103 and the capacitor C104 connected in series and then refracted to the transmitting end, R114 is the equivalent resistance of the receiving end load resistance refracted to the transmitting end, SW102 is the equivalent communication modulating switch, and U is setAB(theta) is the input square wave of the first resonant circuit 024, IC(θ) is the current through capacitor C113 when SW102 is closed, IR(θ) is the current flowing through resistor R114, IM(θ) is the current through inductor L104, IABAnd (θ) is the input current of the first resonant circuit 024.
Is provided with a UAB(θ) is:
to UAB(θ) fourier-decomposed to obtain the fundamental wave:
UAD1(θ) is a sinusoidal quantity, so FIG. 4 can be analyzed using a phasor method. FIG. 5 is a phasor diagram corresponding to FIG. 4; fig. 6 is a timing chart corresponding to fig. 4.
Is provided with
Are respectively U
AB1Phasors corresponding to (θ), IAB (θ), IR (θ), Im (θ) and IC (θ), and in a steady state:
as can be seen from the above equation, in the SW102 open and closed state,
there is an amplitude difference, which means that the communication signal is modulated to
The above. When the load is disturbed, that is, the resistance value of the resistor R114 jumps,
will vary accordingly.
Is provided with
Hysteresis
Has a phase angle of
Is provided with
The component on the imaginary axis being
Is provided with
Respectively has an effective value of I
AB_rms、I
AB_N_rms. Then there is
IAB_N_rms=IAB_rms·|sinα|
As can be seen,
the communication information can be reflected, and the resistor R114 is irrelevant, namely, the influence of load disturbance is avoided.
Effective value of (I)
AB_N_rmsActually reflecting the reactive power of the wireless charger, with I
AB_N_rmsAs the demodulated signal source, the load disturbance factors can be eliminated.
The following description IAB_N_rmsThe signal extraction method comprises the following steps:
the voltage phasor at the two ends of the capacitor C101 is as follows:
because:
thus, there are:
at UAB(theta) ofPositive half period, UC101Average value U of (theta)AB_AVG_PComprises the following steps:
thus, UAB_AVG_PAnd IAB_N_rmsCorresponding, due to UAB_AVG_PIs easier to measure, so can collect in UAB(theta) average value U of the voltage across the capacitor C101 during the positive half cycleAB_AVG_PAs the source of the demodulated signal.
FIG. 7 is a timing diagram of a communication modem signal according to an embodiment of the present invention; please refer to fig. 2, fig. 3 and fig. 7 together. Differential circuit 0201 converts the voltage U across the first capacitor C101C101Is converted into a first voltage UC101_1. Positive half cycle and U of PWM1AB(theta) corresponding to the positive half cycle, PWM1 is used as the gating signal for the analog switch circuit 0202, so that UC101(theta) signal at UABThe (θ) positive half cycle passes through the analog switch circuit 0202. Filter circuit 0203 is used for filtering out electric U in the on-state of analog switch circuit 0202C101_1The high frequency component of the above, and the functions of averaging and signal holding are used for obtaining the reflection UAB_AVG_PSignal U ofC101_2. AC amplifying circuit 0204 uses preceding-stage AC signal UC101_2Amplified to a signal UC101_3(ii) a The shaping circuit 0205 converts the alternating current signal into a communication square wave read by the emission control circuit 021. At this point, the communication demodulation circuit 020 decouples and strips the load disturbance quantity to construct a communication signal source with the load disturbance factors removed, amplifies and shapes the communication signal source, and restores communication information.
In summary, the communication demodulation circuit is used for processing the power carrier of the wireless charger and decoupling and stripping the load disturbance quantity, so that a communication signal source with the load disturbance factors removed is constructed, the communication signal source is demodulated, and finally, a communication signal is restored, so that the load disturbance resistance of the communication of the resonant wireless charger is effectively enhanced, and the reliability and the safety of the operation of the resonant wireless charger are improved.
As another aspect of the embodiment of the present invention, an embodiment of the present invention further provides a wireless charging control method. As shown in fig. 8, the wireless charging control method includes:
0100, when resonance is formed between the receiver and the receiver, demodulating a communication signal from a power carrier carrying load disturbance, wherein the receiver modulates the communication signal on the power carrier;
0102, the alternating magnetic field is adjusted according to the communication signal, so that the receiver generates a preset voltage.
Method embodiments are based on the same idea of product embodiments, and description of product embodiments may be referred to by method embodiments without conflicting contents.
When the load of the receiver is disturbed, the disturbance is coupled to the power carrier, the transmitter decouples and peels off the load disturbance quantity to construct a communication signal with the load disturbance factors eliminated, demodulates the communication signal and finally restores a correct communication signal, so that the load disturbance resisting capability of the wireless charger communication is effectively enhanced, and the reliability and the safety of the wireless charger operation are improved.
In some embodiments, as shown in fig. 9, step 0102 comprises:
step 01021, detecting the voltage applied to the two ends of the first capacitor by the power carrier when the power carrier resonates with the receiver;
01022, the voltage at the two ends of the first capacitor is demodulated to obtain a communication signal.
Method embodiments are based on the same idea of product embodiments, and description of product embodiments may be referred to by method embodiments without conflicting contents.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.