CN106528484A - Serial communication method - Google Patents
Serial communication method Download PDFInfo
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- CN106528484A CN106528484A CN201610962542.6A CN201610962542A CN106528484A CN 106528484 A CN106528484 A CN 106528484A CN 201610962542 A CN201610962542 A CN 201610962542A CN 106528484 A CN106528484 A CN 106528484A
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- equipment
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
Abstract
The invention relates to a serial communication method. Only a data signal line is arranged between a master device and a slave device; the master device sends out a detection signal; the slave device replies a confirmation signal; after receiving the confirmation signal, the master device preferentially determines whether a bus ownership is obtained or not and sends data to the slave device; and when the master device does not obtain the bus ownership, the slave device obtains the bus ownership and sends the data to the master device. According to the method, two-way transmission can be finished on one signal line.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of serial communication method.
Background technology
Serial communication refers to that using a data line transmit one ground of data successively, each data occupies one
Individual regular time length.Which only needs to several lines and just information can be exchanged between system, is particularly well-suited to smart machine
Communication between smart machine, smart machine and peripheral hardware.
Conventional serial communication technology has SPI, I2C, UART etc..
SPI is the abbreviation of Serial Peripheral Interface (SPI) (Serial Peripheral Interface).SPI is a kind of full duplex
Synchronous communication bus.SPI is worked with master slave system, and this pattern generally has a main equipment with one or more from equipment, needs
Want 3 or 4 lines.SPI interface includes SDI (data input), SDO (data output), SCLK (clock), CS (piece choosing).One
To during a job, it is not necessary to chip selection signal.
I2C buses (I2C bus, Inter-IC bus) are a two-way continuous buses of two lines, there is provided integrated circuit
(ICs) communication line between.I2C buses adopt a data line (SDA), plus a clock lines (SCL) to complete data
Transmission and the extension of peripheral components；Addressing to each node is soft addressing system, saves chip select line, the addressing byte of standard
SLAM is 7, can address 127 units.
UART is the contracting of UART Universal Asynchronous Receiver Transmitter (Universal Asynchronous Receiver Transmitter)
Write.UART buses are asynchronous serial ports, typically by baud rate generator 16 times of Transmission bit rate (baud rate of generation be equal to),
UART receptors, UART transmitters composition.By both threads on hardware, one is used to send, and one is used to receive.
Above-mentioned various conventional serial communication technology interfaces by two or more than two signal line groups into, in real world applications, certain
A little application scenarios holding wire resource-constraineds, therefore above-mentioned conventional serial communication technology interface cannot meet real world applications.
The content of the invention
The technical problem to be solved is to provide a kind of serial communication method, can complete double on a holding wire
To transmission.
The technical solution adopted for the present invention to solve the technical problems is：A kind of serial communication method is provided, main equipment and
From there was only a single data holding wire between equipment, main equipment sends detectable signal, and from device replied confirmation signal, main equipment is being received
To after confirmation signal, preferentially decide whether to obtain bus mastership to described from equipment sending data；When main equipment is not obtained
During bus mastership, bus mastership is obtained from equipment and send data to main equipment.
Above-mentioned serial communication method also includes main equipment and the clock synchronizing step from equipment, specially：Select with phase
With the main equipment of the clock generator of baud rate and from equipment；If main equipment and the clock frequency from equipment are f1, the clock cycle
For tBaud, and the time shared by per bit transfer is made to be UI；Integers of the time UI for clock cycle tBaud shared by per bit transfer
Times；Master-slave equipment when every time transmission starts all by detectable signal as synchronous main equipment and the clock from equipment, realize that master sets
The standby and clock synchronization from equipment.
When data are sent, in units of byte, data transfer often compares data transfer above-mentioned serial communication method using 1/4
The pulse of time shared by special transmission starts mark as data transfer, an additional bit check position per byte data, in multibyte
During transmission, between byte, the pulse of time shared by per bit transfer of insertion 1/4 makes a distinction.
The transmission of byte adopts highest significant position mode, and before highest significant position is transmitted, first transmission 1/4 is per bit transfer
The pulse of shared time；Wherein, an additional bit check position is parity check bit, using even parity check；In an additional bit
Insertion 1/4 between the next byte highest significant position of check bit sum distinguishes byte per the pulse of time shared by bit transfer.
When highest significant position is 0, transmission 1/4 transmits highest after the high level pulse of time shared by per bit transfer again to be had
Effect position；When highest significant position is 1, after high level pulse of the transmission 1/4 per the time shared by bit transfer, then transmit 1/4 and often compare
Shared by special transmission, the low level of time, finally transmits highest significant position again.
When the data transfer ends, data sender sends end pulse and represents DTD, wherein, terminate pulse
Duration it is unequal per the time shared by bit transfer with 1/4.
In data transfer, recipient sends data validation pulse according to the even-odd check for receiving data；When this transmission
When the parity check bit of all bytes of middle reception is correct, recipient sends data validation pulse subsequently by bus driver
To low level and keep the first preset duration；When the parity check bit of any one byte received in this transmission is incorrect
Wait, then recipient does not send data validation pulse, and by bus driver to low level, and the second preset duration is kept, wherein, the
Two preset durations are equal to the first preset duration and send duration sum needed for data validation pulse.
When main equipment does not receive confirmation signal, a reset pulse is sent come the link that resets, wherein, reset pulse institute
The duration for accounting for is far longer than the duration of detectable signal and confirmation signal.
Beneficial effect
As a result of above-mentioned technical scheme, the present invention compared with prior art, has the following advantages that and actively imitates
Really：
The present invention sends out detectable signal using main equipment, returns confirmation signal from equipment, and main equipment preferentially decides whether to obtain total
Line proprietary rightss, can obtain bus mastership in the case where main equipment does not obtain bus mastership from equipment, by the party
Formula determines the data direction on single holding wire, so as to complete transmitted in both directions on a holding wire.
Present invention can apply to USB interface-based quick charging system.According to USB related protocols, usb terminal equipment root
The ability detected to confirm the charging adapter for connecting to D+/D- holding wire level when connecting is set up according to USB interface.The present invention
The extended capability detection after USB label detections are completed is can be additionally used in, i.e., after testing process, is set up on D- holding wires
Two-way communications capabilities.The foundation of two-way communications capabilities can realize more complicated function between terminal and charging adapter.
Description of the drawings
Fig. 1 is main equipment and the sequential chart from equipment when bus mastership is obtained in the present invention；
Schematic diagram when Fig. 2 is data transfer in the present invention, wherein, situation when Fig. 2A is 0 for highest significant position, Fig. 2 B
Situation when being 1 for highest significant position；
The schematic diagram distinguished between two bytes when Fig. 3 is data transfer in the present invention；
Fig. 4 is the sequential chart of recipient's receiving data in the present invention.
Specific embodiment
With reference to specific embodiment, the present invention is expanded on further.It should be understood that these embodiments are merely to illustrate the present invention
Rather than limit the scope of the present invention.In addition, it is to be understood that after the content for having read instruction of the present invention, people in the art
Member can be made various changes or modifications to the present invention, and these equivalent form of values equally fall within the application appended claims and limited
Scope.
For the serial communication technology on a holding wire, three parts can be divided into.First bus mastership.Which two
It is clock synchronization.Which three is data transfer format.The system of the present invention includes main equipment and from equipment.Generally, main equipment is tool
There is the smart machine of processor, be the equipment only with simple logical function and depositor from equipment.Can also be tool from equipment
There is the smart machine of processor.Main equipment is to communication with control ability.
Embodiments of the present invention are related to a kind of serial communication method, main equipment and from there was only a radical between equipment it is believed that
Number line, main equipment sends detectable signal, from device replied confirmation signal, main equipment after confirmation signal is received, it is preferential determine be
No acquisition bus mastership is to described from equipment sending data；When main equipment does not obtain bus mastership, obtain from equipment
Bus mastership sends data to main equipment.
Its sequential is as shown in figure 1, the detectable signal that communication process always sends out t1 durations with main equipment starts.The signal is simultaneously
For synchronous main equipment and the clock from equipment.After detectable signal, main equipment is by bus driver to low level t2 duration.
After t2 durations, the detection confirmation signal of t3 durations is sent out from equipment.After the detection confirmation signal for receiving t3 durations, main equipment
By bus driver to low level t4 duration.After t4 durations, if main equipment needs to obtain bus, main equipment starts to send number
According to.If detecting from equipment have in bus data in transmission, start receiving data from equipment.If from equipment in t4 durations
Data transmission is not detected by afterwards, then can start to send data after t5 durations from equipment.
For main equipment and the clock synchronization from equipment, the present invention has identical baud with adopting from equipment using main equipment
The clock generator of rate.Main equipment and certain deviation is allowed from equipment clock frequency.If both clock frequencies are f1, clock week
Phase is tBaud.Time shared by per bit transfer is UI (Unit Interval).Integral multiples of the UI for tBaud, generally can use UI
=16tBaud.Above-mentioned duration t1, t2, t3, t4, t5 and the pulse duration for defining later are all the integral multiple of tBaud, generally may be used
Take t1=4UI, t2=1UI, t3=2UI, t4=1UI, t5=2UI.Above-mentioned unit of time is both greater than tBaud, and main equipment and
By detectable signal as synchronous main equipment and clock from equipment synchronization is re-started all when transmission starts every time from equipment, therefore
Main equipment and the time synchronization implementation from equipment room are simple.
For data transmission format, the present invention defines data transfer in units of byte, and data transfer adopts 1/4UI pulses
Start mark as data transfer, the check bit of an additional bit, inserts between byte when multibyte is transmitted per byte data
1/4UI pulse separations.It is specific as follows：
The transmission of byte adopts MSB (Most Significant Bit, highest significant position) mode, i.e., first transmit byte
Highest order.Before MSB is transmitted, 1/4UI pulses are first transmitted.There are following two situations for 0 and 1 for MSB.When MSB is 0, pass
MSB is transmitted after defeated 1/4UI high level pulses, as shown in Figure 2 a.When MSB is 1, after transmission 1/4UI high level pulses, 1/4UI is transmitted
Low level transmits MSB again, as shown in Figure 2 b.
An additional bit check position is parity check bit, adopts even parity check, i.e., when in 8 bit datas in present embodiment
When 1 number is odd number, check bit is 1, and when in 8 bit datas 1 number is even number, check bit is 0.In parity check bit and
Insert 1/4UI pulses to distinguish byte between next byte MSB.At least three hopping edges between parity check bit and MSB, such as
Shown in Fig. 3.
When the data transfer ends, data sender sends the end pulse of t6 durations and represents DTD, and with
Afterwards by bus driver to low level t7 duration.T6 is not equal to 1/4UI, if following which after the parity check bit of data sends
Afterwards be 1/4UI pulses then represent transmission also continue.That is, when parity check bit is 0, after parity check bit
Followed by terminate pulse.When parity check bit is 1, between parity check bit and end pulse, 1/4UI low levels are inserted.
After the parity check bit of data sends if it is followed by be to represent the end of transmission if t6 durations terminate pulse.
Recipient sends data validation pulse according to the even-odd check for receiving data.When all words received in this transmission
When the parity check bit of section is correct, recipient sends t8 duration data validation pulses subsequently by bus driver to low level
T9 durations.When the parity check bit of any one byte received in this transmission is incorrect, then recipient does not send number
According to confirming pulse, and by bus driver to low level t8+t9 duration, as shown in Figure 4.Main equipment can confirm end-of-pulsing it
Direct impulse is resend afterwards initiates new data transfer.
When main equipment equally could not be received as expected from the response of equipment, main equipment can send a t10 duration
Reset pulse is come the link that resets.Generally t10 can be far longer than aforementioned definitions pulse signal width.
It is seen that, it is of the invention that detectable signal is sent out using main equipment, confirmation signal is returned from equipment, preferentially decision is main equipment
No acquisition bus mastership, can obtain bus mastership in the case where main equipment does not obtain bus mastership from equipment,
The data direction on single holding wire is determined by this way, so as to complete transmitted in both directions on a holding wire.
Present invention can apply to USB interface-based quick charging system.According to USB related protocols, usb terminal equipment root
The ability detected to confirm the charging adapter for connecting to D+/D- holding wire level when connecting is set up according to USB interface.The present invention
The extended capability detection after USB label detections are completed is can be additionally used in, i.e., after testing process, is set up on D- holding wires
Two-way communications capabilities.The foundation of two-way communications capabilities can realize more complicated function between terminal and charging adapter.
Claims (8)
1. a kind of serial communication method, it is characterised in that main equipment and from there was only a single data holding wire, main equipment between equipment
Detectable signal is sent, from device replied confirmation signal, main equipment decides whether to obtain bus institute after confirmation signal is received, preferentially
Have the right to described from equipment sending data；When main equipment does not obtain bus mastership, from equipment obtain bus mastership to
Main equipment sends data.
2. serial communication method according to claim 1, it is characterised in that also same including main equipment and the clock from equipment
It is step by step rapid, specially：Select the main equipment of the clock generator with identical baud rate and from equipment；If main equipment and from equipment
Clock frequency be f1, the clock cycle is tBaud, and to make per the time shared by bit transfer be UI；Time shared by per bit transfer
Integral multiples of the UI for clock cycle tBaud；Master-slave equipment is when transmission starts every time all by detectable signal as synchronous main equipment
With the clock from equipment, main equipment and the clock synchronization from equipment are realized.
3. serial communication method according to claim 1, it is characterised in that when sending data, data transfer with byte is
Unit, data transfer start mark as data transfer using the pulse of time shared by 1/4 every bit transfer, attached per byte data
Plus a bit check position, when multibyte is transmitted, between byte, the pulse of time shared by per bit transfer of insertion 1/4 makes a distinction.
4. serial communication method according to claim 3, it is characterised in that the transmission of byte adopts highest significant position side
Formula, before highest significant position is transmitted, the pulse of first transmission 1/4 time shared by per bit transfer；Wherein, an additional bit school
It is parity check bit to test position, using even parity check；Insert between an additional bit check position and next byte highest significant position
1/4 distinguishes byte per the pulse of time shared by bit transfer.
5. serial communication method according to claim 4, it is characterised in that when highest significant position is 0, transmission 1/4 is every
Transmit highest significant position after the high level pulse of time shared by bit transfer again；When highest significant position is 1, transmission 1/4 is often compared
After the high level pulse of time shared by special transmission, then the low level of 1/4 time shared by per bit transfer is transmitted, finally transmitted again most
High significance bit.
6. serial communication method according to claim 1, it is characterised in that when the data transfer ends, data sender
Send and terminate pulse and represent DTD, wherein, terminate the duration of pulse and time shared by 1/4 often bit transfer not phase
Deng.
7. serial communication method according to claim 1, it is characterised in that in data transfer, recipient is according to receiving
The even-odd check of data sends data validation pulse；When the parity check bit of all bytes received in this transmission it is correct
When, recipient sends data validation pulse subsequently by bus driver is to low level and keeps the first preset duration；When this biography
When the parity check bit of any one byte of defeated middle reception is incorrect, then recipient does not send data validation pulse, and will
Bus driver is to low level, and keeps the second preset duration, wherein, the second preset duration is equal to the first preset duration and sends number
According to duration sum needed for confirmation pulse.
8. serial communication method according to claim 1, it is characterised in that when main equipment does not receive confirmation signal,
A reset pulse is sent come the link that resets, wherein, the duration shared by reset pulse is far longer than detectable signal and confirmation signal
Duration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610962542.6A CN106528484A (en) | 2016-10-28 | 2016-10-28 | Serial communication method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610962542.6A CN106528484A (en) | 2016-10-28 | 2016-10-28 | Serial communication method |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108183705A (en) * | 2018-01-11 | 2018-06-19 | 郑州云海信息技术有限公司 | A kind of server system one-way bus transmission method |
| CN109062850A (en) * | 2018-08-09 | 2018-12-21 | 广州麦芮声电子有限公司 | A kind of data transmission and reception method of single-chip microcontroller |
| CN109902046A (en) * | 2019-02-01 | 2019-06-18 | 福瑞泰克智能系统有限公司 | A kind of communication means, relevant device and system for Serial Peripheral bus system |
| CN110389924A (en) * | 2018-04-19 | 2019-10-29 | 大唐移动通信设备有限公司 | A kind of serial bus device and setting method |
| CN111134530A (en) * | 2018-11-06 | 2020-05-12 | 佛山市顺德区美的电热电器制造有限公司 | Communication control method and device for liquid heating device and liquid heating device |
| CN111490920A (en) * | 2019-01-29 | 2020-08-04 | 杭州海康汽车技术有限公司 | SPI-based data transmission method, system and device |
| CN111510509A (en) * | 2020-06-15 | 2020-08-07 | 佛山市睿宝智能科技有限公司 | Data communication method of needle selector of knitting machine, storage medium and knitting machine |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111490920A (en) * | 2019-01-29 | 2020-08-04 | 杭州海康汽车技术有限公司 | SPI-based data transmission method, system and device |
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| CN111510509A (en) * | 2020-06-15 | 2020-08-07 | 佛山市睿宝智能科技有限公司 | Data communication method of needle selector of knitting machine, storage medium and knitting machine |
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Application publication date: 20170322 |