CN106528286A - Method and device for realizing timer - Google Patents
Method and device for realizing timer Download PDFInfo
- Publication number
- CN106528286A CN106528286A CN201611048438.2A CN201611048438A CN106528286A CN 106528286 A CN106528286 A CN 106528286A CN 201611048438 A CN201611048438 A CN 201611048438A CN 106528286 A CN106528286 A CN 106528286A
- Authority
- CN
- China
- Prior art keywords
- timer
- linked list
- timing
- array linked
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Predetermined Time Intervals (AREA)
Abstract
The invention relates to a method and a device for realizing a timer. By allocating a memory of an array linked list for the timer in advance and inserting the timer into the array linked list according to the timing cycle of the timer, the function of the timer is achieved through the array linked list, the operation of applying for the memory every time the timer is inserted is omitted, application for the memory and release waste are avoided, flexibility in insertion and deletion of the linked list is achieved, and operation complexity is lowered.
Description
Technical field
The present invention relates to Computer Applied Technology field, more particularly to a kind of method and apparatus for realizing timer.
Background technology
The exploitation of embedded system, typically can all use timer, and with the complexity of system, the quantity of timer is needed
Ask also increasing.But, general central processing unit (English：Central Processing Unit, abbreviation：CPU) can
The timer number of offer is limited, and the timer number of general low side single-chip microcomputer is less than 5.If system requirements is determined
When device quantity more than the hardware timer quantity that CPU is provided, then need by software scenario to provide more timers.
For the timer that software provider case is provided, its timer number supported, and the dispatching algorithm of timer
Time complexity and space complexity are the leading indicators for determining that its performance is good and bad.With the increasing of the complexity of modern software
Plus, it is more and more urgent to a kind of demand of efficient massive timer implementation.
Now in the art, there is the scheme that timer is realized using the data structure of chained list, but chained list node need into
The application and release of row internal memory, operation complexity are high.
The information for being disclosed in the background section is merely intended to increase the understanding of the general background to the present invention, and should not
When the prior art for being considered to recognize or imply the information structure in any form well known to persons skilled in the art.
The content of the invention
Technical problem
In view of this, embodiment of the present invention technical problem to be solved is how to provide a kind of method for realizing timer
Operation complexity can be reduced with device.
Solution
To solve above technical problem, the embodiment of the present invention provides a kind of method for realizing timer on the one hand, including：
The internal memory of distribution array linked list；
The timer that is inserted into is inserted the array linked list by the timing cycle according to timer is inserted into.
In a kind of possible implementation, the basis is inserted into the timing cycle of timer and is inserted into timing by described
Device inserts the array linked list to be included：
According to the timing week for inserting timer in the timing cycle for being inserted into timer and the array linked list
Phase, judge the insertion position for being inserted into timer whether positioned at the gauge outfit of the array linked list；And
When the insertion position for being inserted into timer is located at the gauge outfit of the array linked list, in the array linked list
In, the timing cycle for being inserted into timer is recorded as into the timing time for being inserted into timer.
In a kind of possible implementation, whether the number is located in the insertion position that timer is inserted into described in judgement
After the gauge outfit of group chained list, also include：
When the insertion position for being inserted into timer is not located at the gauge outfit of the array linked list, inserted described in calculating
Be located in timer it is described be inserted into timer before timer timing time cumulative and；And
In the array linked list, the timing time for being inserted into timer is recorded as described being inserted into timer
Timing cycle and it is described cumulative and between difference.
In a kind of possible implementation, the timing cycle for being inserted into timer is recorded as it is described to be inserted
After entering the timing time of timer, also include：
Next timer will be updated to positioned at the timing time for being inserted into the next timer after timer
Timing time and the difference being inserted between the timing time of timer.
In a kind of possible implementation, according in the timing cycle for being inserted into timer and the array linked list
The timing cycle for inserting timer, judge the insertion position for being inserted into timer whether positioned at the array linked list
Gauge outfit, including：
The timing week for inserting timer in the timing cycle for being inserted into timer is less than the array linked list
During the phase, it is judged as that the insertion position for being inserted into timer is located at the gauge outfit of the array linked list.
To solve above technical problem, the embodiment of the present invention provides a kind of device for realizing timer on the other hand, wraps
Include：
Distribute module, for distributing the internal memory of array linked list；
Processing module, for the timer that is inserted into is inserted the array according to the timing cycle for being inserted into timer
Chained list.
In a kind of possible implementation, the processing module is used for：According to the timing week for being inserted into timer
The timing cycle for inserting timer in phase and the array linked list, judge described in whether be inserted into the insertion position of timer
Positioned at the gauge outfit of the array linked list；And described ought be inserted into the gauge outfit that the insertion position of timer is located at the array linked list
When, in the array linked list, the timing cycle for being inserted into timer is recorded as into the timing for being inserted into timer
Time.
In a kind of possible implementation, the processing module is additionally operable to：When the insertion position for being inserted into timer
Put not positioned at the gauge outfit of the array linked list when, calculate it is described inserted in timer positioned at it is described be inserted into timer before
The timing time of timer cumulative and；And in the array linked list, by the timing time note for being inserted into timer
Record for the timing cycle for being inserted into timer and it is described cumulative and between difference.
In a kind of possible implementation, described device also includes：Update module, for described being inserted into is being determined
When device timing cycle be recorded as it is described be inserted into the timing time of timer after, will positioned at it is described be inserted into timer after
The timing time of next timer be updated to the timing time of next timer and the timing for being inserted into timer
Difference between time.
In a kind of possible implementation, the processing module is used for：When the timing cycle for being inserted into timer
In less than the array linked list insert timer timing cycle when, be judged as the insertion position for being inserted into timer
Positioned at the gauge outfit of the array linked list.
Beneficial effect
A kind of method and apparatus for realizing timer provided in an embodiment of the present invention, by distributing array for timer in advance
The internal memory of chained list, and timer is inserted by array linked list according to the timing cycle of timer, it is fixed to realize from there through array linked list
When device function, apply for the operation of internal memory when saving every time insertion timer, it is to avoid the application and release of internal memory is wasted, and
The flexibility of the insertion and deletion of chained list is provided with, operation complexity is reduced.
A kind of method and apparatus for realizing timer provided in an embodiment of the present invention, is inserted into timing by calculating and recording
Difference between the timing cycle of the timing cycle of device and previous timer realizing timing function, hereby it is achieved that timer work(
The optimization of energy.
A kind of method and apparatus for realizing timer provided in an embodiment of the present invention, using in timer application/beginning
When array linked list be sequentially inserted into, timer moving process afterwards does not do any scanning and evaluation work, makes timer
Scanning algorithm time complexity be optimized for O (1).
According to below with reference to the accompanying drawings, to detailed description of illustrative embodiments, the further feature and aspect of the present invention will become
It is clear.
Description of the drawings
One or more embodiments are illustrative by the picture in corresponding accompanying drawing, these exemplary theorys
Bright not constitute the restriction to embodiment, in accompanying drawing, the element with same reference numbers label is expressed as similar element, removes
Non- to have especially statement, composition is not limited the figure in accompanying drawing.
The flow chart that Fig. 1 illustrates a kind of method for realizing timer that one embodiment of the invention is provided；
The flow chart that Fig. 2 illustrates a kind of method for realizing timer that another embodiment of the present invention is provided；
Fig. 3 a illustrate the schematic diagram of the timing time of the timer that one embodiment of the invention is provided；
Fig. 3 b illustrate the schematic diagram of the timing time of the timer that one embodiment of the invention is provided；
Fig. 4 illustrates a kind of structural representation of device for realizing timer that one embodiment of the invention is provided；
Fig. 5 illustrates a kind of structural representation of device for realizing timer that another embodiment of the present invention is provided.
Specific embodiment
Below in conjunction with the accompanying drawings, the specific embodiment of the present invention is described in detail, it is to be understood that the guarantor of the present invention
Shield scope is not limited by specific embodiment.
To make purpose, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
The a part of embodiment of the present invention, rather than the embodiment of whole.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.Unless
Separately have other to explicitly indicate that, otherwise in entire disclosure and claims, term " including " or its conversion such as "comprising" or
" including " etc. will be understood to comprise stated element or part, and not exclude other elements or other compositions
Part.
Special word " exemplary " means " being used as example, embodiment or illustrative " here.Here as " exemplary "
Illustrated any embodiment is should not necessarily be construed as preferred or advantageous over other embodiments.
In addition, in order to better illustrate the present invention, numerous details are given in specific embodiment below.
It will be appreciated by those skilled in the art that not having some details, the present invention can equally be implemented.In some instances, for
Method well known to those skilled in the art, means, element are not described in detail, in order to highlight the purport of the present invention.
Embodiment 1
The flow chart that Fig. 1 illustrates a kind of method for realizing timer provided in an embodiment of the present invention, as illustrated, the method
Including：
S1, the internal memory for distributing array linked list for timer.
Wherein, the management structure definition of array linked list is as shown in table 1.
Table 1
The structure definition of timer array linked list node is as shown in table 2.
Table 2
S2, basis are inserted into the timing cycle of timer and will be inserted into timer insertion array linked list.
The embodiment of the present invention distributes the internal memory of array linked list according to demand in advance for timer, and according to the timing of timer
Timer is inserted array linked list by the cycle, realizes the function of timer from there through array linked list, saves insertion timing every time
Apply for the operation of internal memory during device, it is to avoid the application and release of internal memory is wasted, be provided with again chained list insertion and deletion it is flexible
Property, reduce operation complexity.
Embodiment 2
The flow chart that Fig. 2 illustrates a kind of method for realizing timer provided in an embodiment of the present invention, as illustrated, the method
Including：
S1, the internal memory for distributing array linked list for timer.
The timing cycle of the timer that S21, basis have been inserted in being inserted into the timing cycle and array linked list of timer, sentences
Whether the disconnected insertion position for being inserted into timer is located at the gauge outfit of array linked list.
First timer in a kind of possible implementation, in the timer being inserted into is the array linked list
When, in other words, when there are no other timers in the array linked list, it is judged as that this is inserted into the insertion position of timer and is located at number
The gauge outfit of value chained list.
In a kind of possible implementation, when there are other timers in the array linked list, when being inserted into timer
Timing cycle less than in array linked list insert timer timing cycle when, be judged as being inserted into the insertion position of timer
Setting in the gauge outfit of array linked list.
S22, when be inserted into timer insertion position be located at array linked list gauge outfit when, in array linked list, will be to be inserted
The timing cycle for entering timer is recorded as the timing time for being inserted into timer.
For example, the timing cycle of the timer 1 for having been inserted in array linked list is 10 seconds, the timing of the timer 2 being inserted into
Cycle is 5 seconds, then be judged as that the insertion position of the timer 2 is located at the gauge outfit of the numerical value chained list in the step s 21.And
And, in this step, in array linked list, the timing cycle of timer 2 is recorded as into the meter of the timer 2 being inserted into for 5 seconds
When the time.
S25, will be updated to positioned at the timing time for being inserted into the next timer after timer it is described lower certain
When device timing time and the difference being inserted between the timing time of timer.
For example, the timing time of timer 2 is 5 seconds, by the timing time of the next timer 1 after timer 2
Difference between the timing time (5 seconds) of the former timing time (10 seconds) and timer 2 that are updated to timer 1, will timer 1
Timing time be updated to 5 seconds.
S23, when be inserted into the insertion position of timer positioned at the gauge outfit of the array linked list when, timing has been inserted in calculating
The timing time of the timer being located in device before being inserted into timer cumulative and.
Illustrate, Fig. 3 a and Fig. 3 b illustrate the schematic diagram of the timing time of timer, in this example, in array linked list
The timer for having inserted is timer 11, and its timing cycle is 5 seconds.When the timer being now inserted into is its timing of timer 13
Between be 20 seconds.In this step, it is timer 11 that the timer before being inserted into timer is located in having inserted timer, because
This, it is described to add up and for 5 seconds.
S24, in array linked list, the timing time for being inserted into timer is recorded as into the timing for being inserted into timer
Cycle and it is described cumulative and between difference.
As shown in Figure 3 a, for example, in array linked list, the timing time of timer 13 is recorded as into the timing of timer 13
Cycle (20 seconds) and described cumulative and between (5 seconds) differences (15 seconds).I.e., after timer 13 being inserted in timer 11,
And its timing time is recorded for 15 seconds.
After this step, as shown in Figure 3 b, the timer for having been inserted in the array linked list includes timer 11 and 13, if
Now, the timer 12 that timing cycle is 10 seconds is inserted into, then repeats step S23～S24, by during the timing of timer 12
Between be recorded as 5 seconds.
Also, perform S25, institute will be updated to positioned at the timing time for being inserted into the next timer after timer
State the timing time of next timer and the difference being inserted between the timing time of timer.
For example, the timing time of the next timer 13 after the timer 12 is updated to the meter of timer 13
When the time (15 seconds) and the timing time (5 seconds) of timer 12 between difference, will the timing time of timer 13 be updated to
10 seconds.
S3, according to the timing time of timer, judge whether timer overtime.
By the timing time recorded in step S21-S24, judge whether timer is overtime, and in timer expiry
When, triggering default process and operate, the default process operation can include time-out notification or call back function.
The timer that the timer has been inserted in including array linked list.
The absolute timing cycle of the embodiment of the present invention not recording timer, but calculate and record and be inserted into determining for timer
When difference between cycle and the timing cycle of previous timer realizing timing function, hereby it is achieved that timer function is excellent
Change.
The embodiment of the present invention using being sequentially inserted in the array linked list of timer application/at first, determining afterwards
When device moving process do not do any scanning and evaluation work, make the scanning algorithm time complexity of timer be optimized for O (1).
Embodiment 3
Fig. 4 illustrates a kind of structural representation of device 10 for realizing timer provided in an embodiment of the present invention, as illustrated,
The device 10 includes：Distribute module 110 and processing module 120.
Distribute module 110, for distributing the internal memory of array linked list.
Processing module 120, for the timer that is inserted into is inserted described according to the timing cycle for being inserted into timer
Array linked list.
The embodiment of the present invention distributes the internal memory of array linked list according to demand in advance for timer, and according to the timing of timer
Timer is inserted array linked list by the cycle, realizes the function of timer from there through array linked list, saves insertion timing every time
Apply for the operation of internal memory during device, it is to avoid the application and release of internal memory is wasted, be provided with again chained list insertion and deletion it is flexible
Property, reduce operation complexity.
In a kind of possible implementation, processing module 120 is used for：According to the timing cycle for being inserted into timer
With the timing cycle for inserting timer in the array linked list, judge described in be inserted into the insertion position of timer whether position
In the gauge outfit of the array linked list；And described ought be inserted into the gauge outfit that the insertion position of timer is located at the array linked list
When, in the array linked list, the timing cycle for being inserted into timer is recorded as into the timing for being inserted into timer
Time.
In a kind of possible implementation, processing module 120 is used for：When the timing cycle for being inserted into timer it is little
In the array linked list insert timer timing cycle when, be judged as the insertion position position for being inserted into timer
In the gauge outfit of the array linked list.
In a kind of possible implementation, processing module 120 is additionally operable to：When the insertion position for being inserted into timer
Positioned at the gauge outfit of the array linked list when, calculate it is described inserted in timer positioned at it is described be inserted into timer before determine
When device timing time cumulative and；And in the array linked list, by the timing time record for being inserted into timer
For the timing cycle for being inserted into timer and it is described cumulative and between difference.
In a kind of possible implementation, as shown in figure 5, the device 10 also includes：Update module 130.
Update module 130 is for the timing cycle for being inserted into timer to be recorded as described being inserted into timer
After timing time, will be updated to positioned at the timing time for being inserted into the next timer after timer described lower certain
When device timing time and the difference being inserted between the timing time of timer.
The absolute timing cycle of the embodiment of the present invention not recording timer, but calculate and record and be inserted into determining for timer
When difference between cycle and the timing cycle of previous timer realizing timing function, hereby it is achieved that timer function is excellent
Change.
The embodiment of the present invention using being sequentially inserted in the array linked list of timer application/at first, determining afterwards
When device moving process do not do any scanning and evaluation work, make the scanning algorithm time complexity of timer be optimized for O (1).
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can
By software plus general hardware platform mode realizing, naturally it is also possible to by hardware.Based on such understanding, above-mentioned technology
The part that scheme is substantially contributed to correlation technique in other words can be embodied in the form of software product, the computer
Software product can be stored in a computer-readable storage medium, such as ROM/RAM, magnetic disc, CD etc., including some instructions to
So that computer equipment (can be personal computer, server, or network equipment etc.) perform each embodiment or
Method described in some parts of embodiment.
Finally it should be noted that：Above example only to illustrate technical scheme, rather than a limitation；Although
With reference to the foregoing embodiments the present invention has been described in detail, it will be understood by those within the art that：Which still may be used
To modify to the technical scheme described in foregoing embodiments, or equivalent is carried out to which part technical characteristic；
And these modification or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and
Scope.
Claims (10)
1. a kind of method for realizing timer, it is characterised in that include：
The internal memory of distribution array linked list；
The timer that is inserted into is inserted the array linked list by the timing cycle according to timer is inserted into.
2. method according to claim 1, it is characterised in that the basis is inserted into the timing cycle of timer will be described
Being inserted into the timer insertion array linked list includes：
According to the timing cycle for being inserted into timer and the timing cycle for inserting timer in the array linked list, sentence
Whether the disconnected insertion position for being inserted into timer is located at the gauge outfit of the array linked list；And
When the insertion position for being inserted into timer is located at the gauge outfit of the array linked list, in the array linked list, will
The timing cycle for being inserted into timer is recorded as the timing time for being inserted into timer.
3. method according to claim 2, it is characterised in that the insertion position of timer is inserted into described in judge whether
After the gauge outfit of the array linked list, also include：
When the insertion position for being inserted into timer is not located at the gauge outfit of the array linked list, described in calculating, timing has been inserted
Be located in device it is described be inserted into timer before timer timing time cumulative and；And
In the array linked list, the timing time for being inserted into timer is recorded as into the timing for being inserted into timer
Cycle and it is described cumulative and between difference.
4. method according to claim 2, it is characterised in that the timing cycle for being inserted into timer is being recorded as
It is described be inserted into the timing time of timer after, also include：
The meter of next timer will be updated to positioned at the timing time for being inserted into the next timer after timer
When time and difference being inserted between the timing time of timer.
5. method according to claim 3, it is characterised in that according to the timing cycle for being inserted into timer and described
Whether the timing cycle for inserting timer in array linked list, judge the insertion position for being inserted into timer positioned at described
The gauge outfit of array linked list, including：
When the timing cycle for being inserted into timer less than in the array linked list insert timer timing cycle when,
It is judged as that the insertion position for being inserted into timer is located at the gauge outfit of the array linked list.
6. a kind of device for realizing timer, it is characterised in that include：
Distribute module, for distributing the internal memory of array linked list；
Processing module, for the timer that is inserted into is inserted the array chain according to the timing cycle for being inserted into timer
Table.
7. device according to claim 6, it is characterised in that the processing module is used for：
According to the timing cycle for being inserted into timer and the timing cycle for inserting timer in the array linked list, sentence
Whether the disconnected insertion position for being inserted into timer is located at the gauge outfit of the array linked list；And described ought be inserted into timer
Insertion position be located at the array linked list gauge outfit when, in the array linked list, by the timing for being inserted into timer
Periodic recording is the timing time for being inserted into timer.
8. device according to claim 7, it is characterised in that the processing module is additionally operable to：Timing is inserted into when described
When the insertion position of device is not located at the gauge outfit of the array linked list, described being inserted into is located at during timer has been inserted described in calculating and is determined
When device before timer timing time cumulative and；And in the array linked list, by the timer that is inserted into
Timing time be recorded as the timing cycle for being inserted into timer and it is described cumulative and between difference.
9. device according to claim 7, it is characterised in that also include：Update module, for described being inserted into is being determined
When device timing cycle be recorded as it is described be inserted into the timing time of timer after, will positioned at it is described be inserted into timer after
The timing time of next timer be updated to the timing time of next timer and the timing for being inserted into timer
Difference between time.
10. device according to claim 8, it is characterised in that the processing module is used for：Timer is inserted into when described
Timing cycle less than in the array linked list insert timer timing cycle when, be judged as described being inserted into timer
Insertion position be located at the array linked list gauge outfit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611048438.2A CN106528286A (en) | 2016-11-22 | 2016-11-22 | Method and device for realizing timer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611048438.2A CN106528286A (en) | 2016-11-22 | 2016-11-22 | Method and device for realizing timer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106528286A true CN106528286A (en) | 2017-03-22 |
Family
ID=58356858
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611048438.2A Pending CN106528286A (en) | 2016-11-22 | 2016-11-22 | Method and device for realizing timer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106528286A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109451020A (en) * | 2018-11-06 | 2019-03-08 | 深圳前海微众银行股份有限公司 | Overtime management method, equipment and computer readable storage medium |
| CN110908429A (en) * | 2018-09-18 | 2020-03-24 | 阿里巴巴集团控股有限公司 | Timer operation method and device |
| CN110928652A (en) * | 2019-10-18 | 2020-03-27 | 蓝箭航天空间科技股份有限公司 | Real-time task delay management method for operating system, storage medium and server |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0586768A1 (en) * | 1992-09-11 | 1994-03-16 | International Business Machines Corporation | Efficient multi-users timer |
| CN1936765A (en) * | 2005-09-30 | 2007-03-28 | 康佳集团股份有限公司 | Scheduling method of timer chain meter |
| CN101799774A (en) * | 2010-02-02 | 2010-08-11 | 杭州电子科技大学 | Method for improving time performance of periodic timers in real-time operating system |
| CN101840353A (en) * | 2010-05-14 | 2010-09-22 | 陈冬岩 | Dynamic timing method for real-time embedded operating system |
| CN101859260A (en) * | 2010-05-14 | 2010-10-13 | 中国科学院计算技术研究所 | Timer management device and management method for operating system |
| CN101957779A (en) * | 2010-09-16 | 2011-01-26 | 深圳天源迪科信息技术股份有限公司 | Management method of timer |
| CN103106222A (en) * | 2011-11-15 | 2013-05-15 | 阿里巴巴集团控股有限公司 | Processing method and processing device of timer |
| CN103901941A (en) * | 2012-12-28 | 2014-07-02 | 北京大唐高鸿软件技术有限公司 | Method for improving timer execution efficiency through memory overheads |
-
2016
- 2016-11-22 CN CN201611048438.2A patent/CN106528286A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0586768A1 (en) * | 1992-09-11 | 1994-03-16 | International Business Machines Corporation | Efficient multi-users timer |
| CN1936765A (en) * | 2005-09-30 | 2007-03-28 | 康佳集团股份有限公司 | Scheduling method of timer chain meter |
| CN101799774A (en) * | 2010-02-02 | 2010-08-11 | 杭州电子科技大学 | Method for improving time performance of periodic timers in real-time operating system |
| CN101840353A (en) * | 2010-05-14 | 2010-09-22 | 陈冬岩 | Dynamic timing method for real-time embedded operating system |
| CN101859260A (en) * | 2010-05-14 | 2010-10-13 | 中国科学院计算技术研究所 | Timer management device and management method for operating system |
| CN101957779A (en) * | 2010-09-16 | 2011-01-26 | 深圳天源迪科信息技术股份有限公司 | Management method of timer |
| CN103106222A (en) * | 2011-11-15 | 2013-05-15 | 阿里巴巴集团控股有限公司 | Processing method and processing device of timer |
| CN103901941A (en) * | 2012-12-28 | 2014-07-02 | 北京大唐高鸿软件技术有限公司 | Method for improving timer execution efficiency through memory overheads |
Non-Patent Citations (1)
| Title |
|---|
| 冯岩: ""实时嵌入式系统中常用定时器算法比较"", 《交通科技与经济》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110908429A (en) * | 2018-09-18 | 2020-03-24 | 阿里巴巴集团控股有限公司 | Timer operation method and device |
| CN110908429B (en) * | 2018-09-18 | 2023-12-05 | 阿里巴巴集团控股有限公司 | Timer operation method and device |
| CN109451020A (en) * | 2018-11-06 | 2019-03-08 | 深圳前海微众银行股份有限公司 | Overtime management method, equipment and computer readable storage medium |
| CN109451020B (en) * | 2018-11-06 | 2021-07-06 | 深圳前海微众银行股份有限公司 | Timeout management method, timeout management device, and computer-readable storage medium |
| CN110928652A (en) * | 2019-10-18 | 2020-03-27 | 蓝箭航天空间科技股份有限公司 | Real-time task delay management method for operating system, storage medium and server |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8495592B2 (en) | Presenting completion progress status of an installer via join points | |
| CN105187464B (en) | Method of data synchronization, apparatus and system in a kind of distributed memory system | |
| CN106528286A (en) | Method and device for realizing timer | |
| CN103353860B (en) | EMS memory management process and device | |
| CN110138688A (en) | Dynamic adjusts method, apparatus, equipment and the readable storage medium storing program for executing of business interface | |
| WO2014040260A1 (en) | Method, system and apparatus for load shaving of a power grid and a tangible computer readable medium | |
| CN109493043A (en) | The blocking method, apparatus of transaction record, electronic equipment and storage medium | |
| CN107566910A (en) | Live resource self-defined distribution monitoring method, storage medium, electronic equipment and system | |
| CN108540568A (en) | Computing capability sharing method and smart machine | |
| CN107483981A (en) | Live Resource Calculation monitoring distribution method, storage medium, electronic equipment and system | |
| CN106125891A (en) | Terminal power optimization method, device and terminal | |
| CN106569917A (en) | Data backup method and mobile terminal | |
| CN107729178A (en) | A kind of Metadata Service process takes over method and device | |
| CN109165712A (en) | Distributed generation method, device and computer storage medium by stages number | |
| CN104378239A (en) | Rapid reliability index statistical system and method based on cluster frame | |
| CN103019819A (en) | Dynamic link library uniform scheduling method based on plug-in mechanism | |
| CN108256311A (en) | A kind of authorization and authentication method and device | |
| CN112506698A (en) | Small file data reconstruction recovery method, system, terminal and storage medium | |
| CN107102799A (en) | A kind of method and its intelligent terminal for adjusting the screen time of going out | |
| US20140215035A1 (en) | Distribution of application components among devices | |
| JP2005182787A (en) | Key cache management through multiple localities | |
| CN103577246A (en) | Method and device for preventing virtual machine from escaping | |
| US20110283131A1 (en) | Computer-readable recording medium, method, and apparatus for calculating power consumption information | |
| CN110007943A (en) | A kind of application program update management method and system based on android system | |
| CN106371809A (en) | Thread processor and thread processing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170322 |