CN106528082A - FPGA (Field Programmable Gate Array)-based graphical configuration method and device - Google Patents
FPGA (Field Programmable Gate Array)-based graphical configuration method and device Download PDFInfo
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- CN106528082A CN106528082A CN201610855250.2A CN201610855250A CN106528082A CN 106528082 A CN106528082 A CN 106528082A CN 201610855250 A CN201610855250 A CN 201610855250A CN 106528082 A CN106528082 A CN 106528082A
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- interface
- configuration
- data input
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
- G06F8/34—Graphical or visual programming
Abstract
The invention belongs to the technical field of algorithm configurations of control station equipment in a nuclear power plant, and provides a FPGA (Field Programmable Gate Array)-based graphical configuration method and a FPGA-based graphical configuration device. The method comprises the steps of: selectively configuring a data input interface and/or a data output interface so that only a graphical interface diagram corresponding to the selected data input interface and/or data output interface is displayed; and drawing a configuration algorithm through a displayed graphical interface so that the FPGA can carry out a logical operation according to the drawn configuration algorithm. Thus an external variable interface can be changed into a parameter configuration; through setting of a configuration file, the interfaces are selectively opened or closed, only the opened interfaces are displayed by the graphical interface diagram, thus the method is convenient to use.
Description
Technical field
The present invention relates in a kind of nuclear power station control station device algorithm configuration technical field, more particularly to one kind is based on
The graphical configuration method of FPGA and device.
Background technology
With the fast development of PLD, field programmable gate array (Field Programmable Gate
Array, abbreviation FPGA) have been widely used for the fields such as industry, military project, nuclear power and space flight.And for only enterprising in FPGA
The non-FPGA developer of line algorithm configuration, can complete predetermined logical operationss function by way of graphical Interface, by
In the input method using this graphical configuration, algorithm configuration personnel are not required to it is to be understood that HDL, and (hardware description language, English are complete
Claim Hardware Description Language) language relevant knowledge, it is also possible to by the input method of graphical configuration
Engineering development work is carried out rapidly；So the input method of graphical configuration carries out work in non-FPGA developer using FPGA
Main flow parameter configuration mode is had become in journey development.
The existing graphical configuration method based on FPGA technology is exactly that all modules are graphical, wherein due to interface mould
Block will possess versatility (suitable for various configuration situations), so the total interface of interface module needs all to enumerate graphical
On interface, the interface for so resulting in configuration algorithm part and external variable is very more, occupies substantial amounts of resource, running software
Slowly, increased additional workload.
The content of the invention
In order to solve prior art, to taking, resource is big, software fortune being patterned present in the input method of configuration
Row is slow, increase the technical problem of workload, and the present invention provides a kind of graphical configuration method and device based on FPGA, can be by
External variable interface becomes parameter and can match somebody with somebody, and by the setting of configuration file, selects to open which interface or closes which interface, allow
Graphical interface figure only shows the interface of opening, is easy to use.
To achieve these goals, the technical scheme that the present invention is provided includes：
A kind of graphical configuration method based on FPGA, it is characterised in that methods described includes：
Selectively configuration data input interface and/or data output interface so that only selected data
Input interface and/or the corresponding graphical interface figure of data output interface are shown；
By the graphical interface being revealed, the drafting of configuration algorithm is carried out so that the FPGA can be according to institute
Stating the configuration algorithm after drawing carries out logical operationss.
Preferably, selectively the mode of configuration data input interface is：When predetermined Data Input Interface needs to make
For selected Data Input Interface when, selected Data Input Interface is constant by defining originally；When other data inputs
Interface need not as selected Data Input Interface when, non-selected Data Input Interface increases on the basis of original justice
Symbol is annotated.
Preferably, selectively the mode of configuration data output interface is：When predetermined data output interface needs to make
For selected data output interface when, selected data output interface is constant by defining originally；When other data outputs
Interface need not as selected data output interface when, non-selected data output interface increases on the basis of original justice
Symbol is annotated.
Preferably, configure |input paramete interface Verilog language to realize, and adopt macrodefined mode, to needing
Data Input Interface port to be selected carries out macrodefined configuration.
On the other hand, the present invention also provides a kind of graphical configuration equipment based on FPGA, it is characterised in that described device
Including：
Data-interface dispensing unit, is arranged to configure predetermined Data Input Interface and/or data output interface,
So that only selected Data Input Interface and/or the corresponding graphical interface figure of data output interface are shown；
Configuration algorithm edit cell, by the graphical interface being revealed, carries out configuration algorithm according to self-defined
Drafting so that the FPGA can carry out logical operationss according to the configuration algorithm after the drafting.
Preferably, the Data Input Interface dispensing unit to the configuration mode of Data Input Interface is：When predetermined number
When needing as selected Data Input Interface according to input interface, selected Data Input Interface is constant by defining originally；
When other Data Input Interfaces need not as selected Data Input Interface when, non-selected Data Input Interface exists
Increase symbol annotation on the basis of original justice.
Preferably, the data output interface dispensing unit to the configuration mode of data output interface is：When predetermined number
When needing as selected data output interface according to output interface, selected data output interface is constant by defining originally；
When other data output interfaces need not as selected data output interface when, non-selected data output interface exists
Increase symbol annotation on the basis of original justice.
Preferably, |input paramete interface described in the Data Input Interface configuration of described dispensing unit is realized with Verilog language,
And macrodefined mode is adopted, the Data Input Interface port to needing selection carries out macrodefined configuration.
The above-mentioned embodiment provided using the present invention, can at least obtain the one kind in following beneficial effect：
1st, Data Input Interface and/or data output interface can be configured by parameter, which connects to select opening
Mouthful or close which interface, allow graphical interface only to show the interface of opening, make that interface schema is simple, clear, take less money
Source, reduction extra work amount etc..
2nd, configuration mode is carried out by parameter to Data Input Interface and/or data output interface, is distinguished by annotating,
Non- FPGA developer can be allowed quickly to grasp and understand.
The further feature of invention and advantage will be illustrated in the following description, also, partly become aobvious from description
And be clear to, or understood by implementing technical scheme.The purpose of the present invention and other advantages can be by explanations
In book, claims and accompanying drawing, specifically noted structure and/or flow process are realizing and obtain.
Description of the drawings
Fig. 1 is a kind of flow chart of graphical configuration method based on FPGA that the embodiment of the present invention one is provided；
Fig. 2 is a kind of structured flowchart of graphical configuration equipment based on FPGA that the embodiment of the present invention one is provided；
Fig. 3 is a kind of flow chart of graphical configuration method based on FPGA that the embodiment of the present invention two is provided；
Fig. 4 is a kind of structured flowchart of graphical configuration equipment based on FPGA that the embodiment of the present invention two is provided；
Fig. 5 is structured flowchart of the another kind of the offer of the embodiment of the present invention two based on the graphical configuration equipment of FPGA；
Fig. 6 is a kind of schematic diagram of inputoutput data interface configuration that the embodiment of the present invention two is provided；
Fig. 7 is the schematic diagram of another kind of inputoutput data interface configuration that the embodiment of the present invention two is provided.
Specific embodiment
Describe embodiments of the present invention below with reference to drawings and Examples in detail, whereby how the present invention is applied
Technological means solving technical problem, and reach technique effect realize that process can fully understand and implement according to this.Need explanation
, these specific descriptions are to allow those of ordinary skill in the art to be more prone to, clearly understand the present invention, rather than to this
Bright limited explanation；As long as and not constituting conflict, each embodiment in the present invention and each spy in each embodiment
Levy and can be combined with each other, the technical scheme for being formed is within protection scope of the present invention.
In addition, can be in the control system of a such as group controller executable instruction the step of flow process of accompanying drawing is illustrated
Middle execution, and, although show logical order in flow charts, but in some cases, can be with different from herein
Order performs shown or described step.
Below by the drawings and specific embodiments, technical scheme is described in detail：
Embodiment one
As shown in figure 1, the present invention provides a kind of graphical configuration method based on FPGA, the method includes：
S101, configuration need the Data Input Interface opened：Selectively configuration data input interface so that only
The corresponding graphical interface figure of the selected Data Input Interfaces of Jing is shown, i.e., user can decide in advance needs which kind connects
Mouthful figure, then configuring needs the corresponding passage of interface schema to open with estimated, and the mode of opening is exactly by will need to open passage
Parameter configuration into from need not open the parameter configuration of passage into different, so only before decide the algorithm pair for needing to use
The interface schema answered is shown；
S102, by the corresponding display interface of input interface, carry out the drafting of configuration algorithm：By the figure being revealed
Shape interface, carries out the drafting of configuration algorithm so that FPGA can carry out logical operationss according to the configuration algorithm after drafting；Need
What is illustrated is that the algorithm in the present embodiment can be software, can also, by hardware, can also be part software, part
Realized with hardware, and in many algorithms, there can also be identical algorithm to occur；Configuration in the present embodiment
(Configure) " it is meant that " configuration ", " setting ", " setting " etc. are looked like, refers to user by the simple of similar " playing with building blocks "
Mode completing the software function required for oneself, without writing computer program, that is, so-called " configuration ", so
It is sometimes referred to as " secondary development ", and configuration software is known as " secondary developing platform "；
S103, by predetermined output interface output configuration arithmetic result：The good passage of predetermined design can be passed through will
As a result export.The output interface of the graphical configuration method based on FPGA during certainly the present embodiment is provided can be not limited to time,
Can also be arranged to also allow user to be custom-configured.
As shown in Fig. 2 the present embodiment also provides a kind of graphical configuration equipment based on FPGA, the device includes：
Data Input Interface dispensing unit 210, is arranged to configure predetermined Data Input Interface 220 so that only
There is the corresponding graphical interface figure of selected Data Input Interface to be shown；For example shown in Fig. 2, can be by input interface
1st, 3,6,8,9 open, can thus edit corresponding with input interface 1,3,6,8,9 corresponding algorithm configurations；
Configuration algorithm edit cell 230, by the graphical interface being revealed, according to the self-defined configuration algorithm that carries out
Draw so that FPGA can carry out logical operationss according to the configuration algorithm after drafting；By different input interfaces enter data into
Then these algoritic modules are carried out algorithm combination according to self-defining method by self-defining algoritic module；Such as algorithm 1
(231) correspond to figure and carry out in-line editor with algorithm 2 (232)；Algorithm 3 (233) and the correspondence figure of algorithm 4 (234) are entered
The in-line editor of row；Then four after connect two carry out editor in parallel, and the four kinds of algorithms enumerated here can
To be software, can also, by hardware, can also be part software, part using hardware be realizing, and many algorithms
In can also have identical algorithm occur；
Data output interface 240, system are pre-configured with the interface of predetermined quantity and edit as configuration algorithm edit cell 230
Good algorithm, and enter data into interface 220 input data according to algorithm after editor carry out computing result output.
It should be noted that the alternative function of configuring that Fig. 1 and Fig. 2 are provided to Data Input Interface 220, may be used also
So that data output interface 240 is arranged to alternative configuration, it is also possible to which the two to be arranged to optionally configure.
The above-mentioned embodiment provided using the present embodiment, can at least obtain following beneficial effect：
Data Input Interface and/or data output interface can be configured by parameter, select which interface opened
Or which interface is closed, allow graphical interface only to show the interface of opening, make that interface schema is simple, clear, take less resource,
Reduce extra work amount etc..Conditional compilation order i.e. in data input/output interface module and module graphic software platform
Effectively combine, make FPGA possess the User Interface of more application.
Embodiment two
Embodiment two further optimizes the graphical configuration method based on FPGA and test dress on the basis of embodiment one
Put, wherein for step identical in method, identical modular unit in device, although reference is different, but substantive phase
Together, it is not repeated to illustrate in embodiment two.
As shown in figure 3, in a kind of graphical configuration method based on FPGA of the present embodiment offer：
S301, except can be with configuration data input interface, can be with：Selectively configuration data output interface so that
The result of the configuration algorithm computing after drafting, from selected data output interface output；
S302, by the corresponding display interface of input interface, carry out the drafting of configuration algorithm；
S303, the data output interface by configuring：The result that the configuration algorithm of step S302 is calculated is by step
The data output interface output that rapid S301 is selected.
Preferably, in step S301, selectively the mode of configuration data input interface is：When predetermined data input
When interface is needed as selected Data Input Interface, selected Data Input Interface is constant by defining originally；When other
Data Input Interface need not as selected Data Input Interface when, non-selected Data Input Interface is in original justice
On the basis of increase symbol annotation.
Preferably, in step S301, selectively the mode of configuration data output interface is also：When predetermined data it is defeated
When outgoing interface is needed as selected data output interface, selected data output interface is constant by defining originally；When which
His data output interface need not as selected data output interface when, non-selected data output interface is original
Increase symbol annotation on the basis of justice.
Preferably, in step S301, with Verilog language, (the design original intention of Verilog is into configuration |input paramete interface
For a kind of basic syntax and the close hardware description language of C language.This is because C language is at the beginning of Verilog design, exist
Many fields are used widely, and many language elements of C language are accustomed to by many people.It is a kind of similar to C language hard
Part description language, can allow circuit designer easily to learn and receive.But, still there is many with C language in Verilog
Difference.In addition, used as a kind of hardware description language different from common computer programming language, it also has some unique languages
Speech key element, the gauze and depositor of such as vector form, during non-obstruction assignment etc.) realize, and adopt macrodefined side
Formula, the Data Input Interface port to needing selection carry out macrodefined configuration；Certainly in step S301, configuration parameter output connects
Mouth can also be in the same way.
As shown in Figure 4, Figure 5, data input is provided with the graphical configuration equipment based on FPGA that the present embodiment is provided
Output interface unit (also referred to as data interface unit) 410/510, data input/output interface unit can not only as embodiment one that
Sample configuration data input interface, can also configure to data output interface, that is, also constitute data output interface configuration single
Unit, the data output interface dispensing unit are arranged to configure predetermined data output interface so that the configuration after drafting
The result of algorithm computing, from selected data output interface output.
As shown in figure 4, Data Input Interface 1,3,6,8,9 can be selected to open；And data output interface 2,3,5,7,8 dozens
Open；User can be selected other data input/output interfaces, for example, configured according to Fig. 5 with the demand according to oneself：Choosing
The opening of Data Input Interface 2,3,6,7,10 is selected, and data output interface 4,6,7,10,12 is opened.
Preferably, Data Input Interface dispensing unit to the configuration mode of Data Input Interface is：When predetermined data it is defeated
When incoming interface is needed as selected Data Input Interface, selected Data Input Interface is constant by defining originally；When which
His Data Input Interface need not as selected Data Input Interface when, non-selected Data Input Interface is original
Increase symbol annotation on the basis of justice.
Preferably, data output interface dispensing unit to the configuration mode of data output interface is：When predetermined data it is defeated
When outgoing interface is needed as selected data output interface, selected data output interface is constant by defining originally；When which
His data output interface need not as selected data output interface when, non-selected data output interface is original
Increase symbol annotation on the basis of justice.
More specifically：FPGA exploitations belong to hardware development, and the picture that the user interface of data input/output interface will not be done is soft
The such hommization of part, but be a need for a data input/output interface and make parameter matching somebody with somebody, it is easy to use.Parameter can be matched somebody with somebody
Method of the realization of data input/output interface using external configuration file, algorithm configuration personnel pass through to change configuration file, really
Stationary interface module needs the number and sequence number in graphical interfaces display interface；Although configuration file is realized with Verilog language,
It is to pertain only to some definition statements, is not related to other complicated sentences, non-FPGA developer can be allowed quickly to grasp and understand.Parameter
The realization that interface (including Data Input Interface 420,520 and data output interface 440,540) can be matched somebody with somebody adopts external configuration file
Method, configuration file with Verilog realize, inside Verilog adopt macrodefinition grammer.Syntax format is " `define
Xxx ", the syntactic representation defines " xxx ", and this is grand.All FPDPs of input/output interface will be defined in configuration file,
And give algorithm configuration personnel, algorithm configuration personnel select which uses according to the configuration algorithm figure of oneself the configuration file opening
FPDP, the port for using are constant by original justice, and the port not used comments out original justice symbol " // ".
Corresponding data input/output interface code will be write using the conditional compilation order of verilog.Grammer lattice
Formula is " `ifdef xxx ", and the syntactic representation then performs following code, if do not gone out if there is " xxx " this grand name
It is existing, then do not perform following code.Directly add the grammer at port definition, directly FPDP can be configured.
After being realized using said method, algorithm configuration personnel are by external configuration file, direct control data input/output
Interface, can only show the data-interface of the needs being configured in graphical algorithm configuration, do not configure not in graphic interface
Show, be easier to operate to data-interface
Preferably, the configuration of data input/output interface dispensing unit 410,510 |input paramete interface Verilog language realities
It is existing, and macrodefined mode is adopted, the Data Input Interface port to needing selection carries out macrodefined configuration.
More specifically, a kind of as shown in fig. 6, FPGA developing instrument Libero soc (the configuration exploitations that use of the present embodiment
Instrument) in smartdesign (functional module of graphics edition) be patterned algorithm configuration work.By external configuration text
Part, determines the quantity of the input/output data interface of graphic software platform, the input data interface di001-di010 of opening, output
Data-interface do011-do020.Also, after user can change external configuration file, input/output data interface can be carried out
Update, as shown in fig. 7, input data interface di001-di010, di041-di050 for opening, output data interface do011-
do020、do031-do040。
Using the further preferred technical scheme of the present embodiment, following beneficial effect can be at least obtained：
Configuration mode is carried out by parameter to Data Input Interface and/or data output interface, is distinguished by annotating, energy
Non- FPGA developer is allowed quickly to grasp and understand.
One of ordinary skill in the art will appreciate that：Realize that all or part of step of above-mentioned each method embodiment can be led to
Cross the related hardware of programmed instruction to complete.Aforesaid program can be stored in a computer read/write memory medium.The journey
Sequence upon execution, performs the step of including above-mentioned each method embodiment；And aforesaid storage medium includes：ROM, RAM, magnetic disc or
Person's CD etc. is various can be with the medium of store program codes.
Finally it should be noted that described above is only highly preferred embodiment of the present invention, not the present invention is appointed
What pro forma restriction.Any those of ordinary skill in the art, it is in the range of without departing from technical solution of the present invention, all available
The way of the disclosure above and technology contents make many possible variations and simple replacement etc. to technical solution of the present invention, these
Belong to the scope of technical solution of the present invention protection.
Claims (8)
1. a kind of graphical configuration method based on FPGA, it is characterised in that methods described includes：
Selectively configuration data input interface and/or data output interface so that only selected data input
Interface and/or the corresponding graphical interface figure of data output interface are shown；
By the graphical interface being revealed, the drafting of configuration algorithm is carried out so that the FPGA can be painted according to described
Configuration algorithm after system carries out logical operationss.
2. method according to claim 1, it is characterised in that selectively the mode of configuration data input interface is：
When predetermined Data Input Interface is needed as selected Data Input Interface, selected Data Input Interface is by original
Define constant；When other Data Input Interfaces need not as selected Data Input Interface when, non-selected data
Input interface increases symbol annotation on the basis of original justice.
3. method according to claim 1, it is characterised in that selectively the mode of configuration data output interface is：
When predetermined data output interface is needed as selected data output interface, selected data output interface is by original
Define constant；When other data output interfaces need not as selected data output interface when, non-selected data
Output interface increases symbol annotation on the basis of original justice.
4. the method according to any one in claims 1 to 3, it is characterised in that the configuration |input paramete interface is used
Verilog language is realized, and adopts macrodefined mode, and the Data Input Interface port to needing selection carries out macrodefined matching somebody with somebody
Put.
5. a kind of graphical configuration equipment based on FPGA, it is characterised in that described device includes：
Data-interface dispensing unit, is arranged to configure predetermined Data Input Interface and/or data output interface so that
Only selected Data Input Interface and/or the corresponding graphical interface figure of data output interface are shown；
Configuration algorithm edit cell, by the graphical interface being revealed, carries out painting for configuration algorithm according to self-defined
System so that the FPGA can carry out logical operationss according to the configuration algorithm after the drafting.
6. device according to claim 5, it is characterised in that the Data Input Interface dispensing unit is connect to data input
Mouthful configuration mode be：When predetermined Data Input Interface is needed as selected Data Input Interface, selected number
It is constant by defining originally according to input interface；When other Data Input Interfaces need not be used as selected Data Input Interface
When, non-selected Data Input Interface increases symbol annotation on the basis of original justice.
7. device according to claim 5, it is characterised in that the data output interface dispensing unit is connect to data output
Mouthful configuration mode be：When predetermined data output interface is needed as selected data output interface, selected number
It is constant by defining originally according to output interface；When other data output interfaces need not be used as selected data output interface
When, non-selected data output interface increases symbol annotation on the basis of original justice.
8. the device according to any one in claim 5 to 7, it is characterised in that the Data Input Interface configuration is single
Unit's configuration |input paramete interface is realized with Verilog language, and adopts macrodefined mode, and the data to needing selection are defeated
Incoming interface port carries out macrodefined configuration.
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| CN109492301A (en) * | 2018-11-08 | 2019-03-19 | 北京世冠金洋科技发展有限公司 | Software and hardware switching method and system |
| CN112363975A (en) * | 2020-10-27 | 2021-02-12 | 国核自仪系统工程有限公司 | Interaction method and interaction system for configuration software and FPGA |
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