CN106508093B - Incremental encoder jitter suppression circuit - Google Patents

Abstract

The invention belongs to technical field of industrial control, disclose a kind of incremental encoder jitter suppression circuit, logical combination of the circuit using d type flip flop, reverser and door, OR gate and XOR gate, the bursts of error that incremental encoder is formed is solved due to shake, and incremental encoder commutate every time operation when the phenomenon of a pulse error that can be formed, eliminating both factors affects on the precision of detection counter, improve accuracy of detection, and the circuit structure is simple, it is possible to generally adopt in engineering.

Description

Incremental encoder jitter suppression circuit

Technical field

The invention belongs to technical field of industrial control, it is related to a kind of incremental encoder jitter suppression circuit.

Background technology

Incremental encoder is a kind of rotating detector that swing offset is converted to series of digital pulses signal, frame of reference Foundation is rotated to be with the radial direction index dial (code-disc) that is made up of alternate optical transmission window and impermeable light window, while by one Infrared light supply vertical irradiation, light projects the image of code-disc on receiver surface.Receiver is covered with one layer of diffraction grating, It has and code-disc identical window width.The work of receiver is to experience the change produced by CD is rotated, and then becomes light Change is converted into corresponding Electrical change.Low level signal is risen to higher level again, and be produced without the square arteries and veins of any interference Punching, this must just be handled with electronic circuit.Frame of reference generally uses differential mode, will two waveforms are the same but phase Difference is compared for 180 ° of unlike signal, to improve the quality and stability of output signal.Reading is again two signals Difference on the basis of formed, so as to eliminate interference.

Incremental encoder provides two-phase square wave, 90 ° of their phase difference, commonly referred to as A channel and channel B.Wherein one Individual passage provides the information related to rotating speed, at the same time, by two channel signal carry out order contrasts, obtains rotation side To information.Also one distinctive signal is referred to as Z or zero passage, and the passage provides the absolute zero position of encoder, and this signal is One square wave is overlapped with the center line of A channel square wave.

Photoelectricity incremental encoder is widely used in the measurement of general digit position and speed detection system, and operation is required many Frequently, the high occasion of accuracy of detection, due to the error influence produced in incremental encoder shake and commutation process, frequently past The multiple occasion for moving accuracy of detection Gao Qiugao simultaneously, can only be detected using absolute value encoder as position, constrain increment volume The use of code device.The stabilization that current existing incremental encoder anti-fluttering method has stabilization based on FPGA and passes through pulse decoding The encoder preventing jittering circuit realized etc. method, but foregoing circuit or complex structure, or the mistake in commutation process can not be solved Difference-product tires out, and exists with the counter interface of the product such as conventional PLC and mismatch phenomenon, thus does not form effective market production Product.

The content of the invention

It is an object of the invention to provide a kind of incremental encoder jitter suppression circuit, solve what incremental encoder was formed due to shake Bursts of error, and incremental encoder commutate every time operation when the phenomenon of a pulse error that can be formed, improve accuracy of detection.

To achieve the above object, the incremental encoder jitter suppression circuit structure that the present invention is provided is as follows：

The B1 phase signals of incremental encoder are used as counting pulse signal, B1 pulses as direction pulse signal, the pulse of A1 phases It is connected with two d type flip flops U2-1 and U2-2 D inputs 5,9, A1 pulses are anti-by being formed after reverser U1-1 To pulse signal, A1 pulses and its reverse impulse signal triggering end 11 respectively with two d type flip flops U2-2 and U2-1, 3 are connected, and two triggers U2-1 and U2-2 output end 1,13 are connected with XOR gate U3 input 1,2 respectively, A1 pulses are connected with the input 12,13 with door U4-4, XOR gate output terminal 3 and 11 points of the output end with door U4-4 It is not connected with the input 1,2 with door U4-1, B1 phase signals are connected with reverser U1-2 input 7, with door U1-2 The signal definition of output end 6 be B**, the input of B1 phase signals respectively with reverser U1-3 input 5 and with door U4-2 End 6 is connected, with the input 5 of door U4-1 output end 3 respectively with reverser U1-4 input 7 and with door U4-2 Connection, reverser U1-3 output end 4 and reverser U1-4 output end 6 respectively with the input 8,9 with door U4-3 Connection, is connected with OR gate U5 input 1,2 respectively with door U4-2 output ends 4 with the output end 10 with door U4-3, The signal definition of OR gate U5 output ends 3 is A**.

It is preferred that, photoelectric coupled circuit U6, U7 is added as auxiliary circuit before the incremental encoder jitter suppression circuit；Its In, for TTL signal, the B phase signals of incremental encoder are defeated by resistance R1 and light emitting diode G1 and optocoupler U6 Enter end (2) to be connected, another input of reverse signal/B and optocoupler U6 (3) of B signal is connected；The A of incremental encoder Signal is connected by resistance R2 and light emitting diode G2 with optocoupler U7 inputs (2), reverse signal/A of a-signal with Another inputs of optocoupler U6 (3) are connected, and R3-R4 completes signal conversion as pull down resistor；For HTL signals or Other forms, optocoupler U6, U7 input 3 is grounded, the same TTL of other connected modes of circuit.

It is preferred that, output driving circuit, suppression circuit output signal B** are added after the incremental encoder jitter suppression circuit Pass sequentially through after phase inverter U1-3, resistance R7, light emitting diode G4, be connected to triode G6 base stage, control three poles The break-make of pipe, completes driving output；Suppression circuit output signal A** passes sequentially through phase inverter U1-2, resistance R8, lighted After diode G3, triode G5 base stage is connected to, the break-make of triode is controlled, output driving output is completed.

Relative to existing incremental encoder Anti-shaking circuit, the present invention solves the wrong arteries and veins that incremental encoder is formed due to shake Punching, and incremental encoder commutate every time operation when the phenomenon of a pulse error that can be formed；Both factors are eliminated to detection The precision influence of counter, improves accuracy of detection, and the circuit structure is simple, it is possible to generally used in engineering.In addition, By in the forward and backward increase auxiliary circuit of incremental encoder jitter suppression circuit, improve incremental encoder its to counter interface Applicability.

Brief description of the drawings

Fig. 1 is circuit theory diagrams of the invention.

Fig. 2-Figure 13 is the issuable dither signal of incremental encoder and one embodiment of the present invention to above-mentioned signal Result.

Embodiment

The present invention is further detailed explanation with reference to the accompanying drawings and detailed description.

Incremental encoder jitter suppression circuit of the present invention is connected with incremental encoder and measurement equipment to be checked respectively, and one is preferred The circuit structure of embodiment is as shown in Fig. 1 dotted portions, and the B1 phase signals of incremental encoder are used as direction pulse signal, A1 Phase pulse is connected as counting pulse signal, B1 pulses with two d type flip flops U2-1 and U2-2 D inputs 5,9, A1 pulses by forming reverse impulse signal after reverser U1-1, A1 pulses and its reverse impulse signal respectively with two D Trigger U2-2 is connected with U2-1 triggering end 11,3, and two triggers U2-1 and U2-2 output end 1,13 are distinguished It is connected with XOR gate U3 input 1,2, A1 pulses are connected with the input 12,13 with door U4-4, and XOR gate is defeated Go out end 3 with the output end 11 with door U4-4 respectively with the input 1,2 with door U4-1 to be connected, B1 signals are triggered with D Device U8-1 input 5 is connected, and d type flip flop U8-1 input 1 is connected with reverser U1-2 input 7, with The door U1-2 signal definition of output end 6 is B**, B1 phase signals respectively with reverser U1-3 input 5 and with door U4-2 Input 6 connect, with door U4-1 output end 3 respectively with reverser U1-4 input 7 and defeated with door U4-2 Enter end 5 to connect, reverser U1-3 output end 4 and reverser U1-4 output end 6 respectively with the input with door U4-3 End 8,9 is connected, the input 1,2 with door U4-2 output ends 4 with the output end 10 with door U4-3 respectively with OR gate U5 Connection, the signal definition of OR gate U5 output ends 3 is A**.

Under normal circumstances, count pulse A each two pulse along interval, pulse B in direction must have a hopping edge；Circuit In, two d type flip flops alternately latch the state of B pulses, at two of A pulses according to count pulse A hopping edge Continuous edge of jumping is interval, and saltus step such as occurs for B pulses, then trigger U2-1, U2-2 output end 1,13 latch for two Individual opposite levels signal, now XOR gate output terminal U3 output end 3 is high level, allows A phases to count with door U4-1 Pulse forms normal count pulse A* by being exported with door U4-1.Conversely, in the continuous saltus step interval of A pulses (i.e. Incremental encoder is shaken), B pulses are not changed, then trigger U2-1, U2-2 output end 1,13 is latched For two identical level signals, XOR gate output terminal U3-3 output ends 3 are low level, are counted with door U4-1 blocks A phases Pulse with door U4-1 by exporting, and electric capacity C1 delay A phase PMs edge is controlled by after U3 output end steady change, So as to reach the purpose for suppressing Vibrating pulse.

In encoder commutation process, the position on last count pulse edge, it is necessary to ensure that during inverted running, in the arteries and veins Rush along counting in reverse is carried out, realize the positions such as commutation counting.In Fig. 1, before commutation, B* is as being high level, with door U4-3 Block output, exports identical with A* signals with door U5；After commutation, B* is low level, locks and exports with door U4-2, with door U5 is output as the reverse signal of A* signals, it is ensured that edge is counted with the counting before commutation along consistent after commutation, so as to eliminate Error in encoder commutation process.

In Practical Project, the output signal of encoder is divided into TTL, HTL and other varying level signals, in order to adapt to coding The multi-signal output form of device, while improving the antijamming capability of circuit, the present embodiment is in incremental encoder jitter suppression electricity Photoelectric coupled circuit U6, U7 is added before road as auxiliary circuit, level conversion is completed.Wherein, for TTL signal (A, / A, B ,/B), the B phase signals of incremental encoder are by resistance R1 and light emitting diode G1 and optocoupler U6 inputs 2 It is connected, another input of reverse signal/B and optocoupler U6 3 of B signal is connected；The a-signal of incremental encoder passes through resistance R2 and light emitting diode G2 is connected with optocoupler U7 inputs 2, another input of reverse signal/A and optocoupler U6 of a-signal End 3 is connected, and R3-R4 completes signal conversion as pull down resistor.For HTL signals (or other forms, A, B), Optocoupler U6, U7 input 3 are grounded, the same TTL of other connected modes of circuit.

Engineering is in use, be increase signal driving force and the different detection signal levels requirements of adaptation, in incremental encoder shake Add output driving circuit after suppression circuit, suppression circuit output signal B** pass sequentially through phase inverter U1-3, resistance R7, After light emitting diode G4, triode G6 base stage is connected to, the break-make of triode is controlled, driving output is completed；Suppress electricity Road output signal A** is passed sequentially through after phase inverter U1-2, resistance R8, light emitting diode G3, is connected to triode G5's Base stage, controls the break-make of triode, completes output driving output.

Fig. 2-Figure 13 lists 12 kinds of dither signals that incremental encoder is likely to occur, and this circuit is to these dither signals Result.Wherein, the counting A* pulses that can not be filtered completely for Fig. 7, Figure 10, Figure 11, Figure 13, at one In oscillation cycle, its direction impulse level of two count pulses of its generation by forward-backward counter on the contrary, effectively balanced out , this circuit effectively inhibits due to the error accumulation that is caused to counter of pulse that shake is produced, surveyed by experimental analysis Amount, circuit is fully effective.

Although the foregoing describing the embodiment of the present invention, those of skill in the art in the art should be appreciated that These are merely illustrative of, and can make various changes or modifications to these embodiments, without departing from the present invention principle and Essence.The scope of the present invention is only limited by the claims that follow.

Claims (2)

1. a kind of incremental encoder jitter suppression circuit, it is characterised in that：The B1 pulses of incremental encoder are used as direction pulse Signal, A1 pulses as counting pulse signal, B1 pulses and two d type flip flops U2-1 and U2-2 D inputs (5, 9) it is connected, A1 pulses are by forming reverse impulse signal, A1 pulses and its reverse impulse signal difference after reverser U1-1 It is connected with two d type flip flops U2-2 and U2-1 triggering end (11,3), two triggers U2-1 and U2-2 output End (1,13) is connected with XOR gate U3 input (1,2) respectively, A1 pulses and with door U4-4 input (12, 13) be connected, XOR gate U3 output end (3) with door U4-4 output end (11) respectively with the input with door U4-1 (1,2) are held to be connected, B1 pulses are connected with d type flip flop U8-1 input (5), d type flip flop U8-1 output end (1) it is connected with reverser U1-2 input (7), reverser U1-2 output end (6) signal definition is B**, B1 pulses are connected with reverser U1-3 input (5) and with door U4-2 input (6) respectively, with door U4-1's Output end (3) is connected with reverser U1-4 input (7) and with door U4-2 another input (5) respectively, instead To device U1-3 output end (4) and reverser U1-4 output end (6) respectively with the input (8,9) with door U4-3 Connection, the input (1,2) with door U4-2 output ends (4) with the output end (10) with door U4-3 respectively with OR gate U5 Connection, OR gate U5 output ends (3) signal definition is A**.

2. incremental encoder jitter suppression circuit as claimed in claim 1, it is characterised in that：The incremental encoder is trembled Photoelectric coupled circuit U6, U7 is added as auxiliary circuit before dynamic suppression circuit；Wherein, for TTL signal, incremental encoder B signal be connected by resistance R1 and light emitting diode G1 with optocoupler U6 inputs (2), the reverse signal of B signal / B is connected with another inputs of optocoupler U6 (3)；The a-signal of incremental encoder passes through resistance R2 and light emitting diode G2 It is connected with optocoupler U7 inputs (2), another input of reverse signal/A and optocoupler U7 (3) of a-signal is connected, R3-R4 As pull down resistor, signal conversion is completed；For HTL signals, optocoupler U6, U7 another input (3) are grounded, The same TTL of other connected modes of circuit.