CN106505620A - A kind of transient state reconfiguration system for improving double-fed fan trouble ride-through capability and control method - Google Patents
A kind of transient state reconfiguration system for improving double-fed fan trouble ride-through capability and control method Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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Abstract
The present invention relates to a kind of transient state reconfiguration system for improving double-fed fan trouble ride-through capability and control method.First based on traditional DFIG, accumulation energy type DFIG fault traversings transient state reconstruct topological structure is built, the switching with accumulation energy type DFIG structures under line voltage malfunction under normal operating condition is realized；When then analyzing line voltage rapid drawdown and rising sharply, accumulation energy type DFIG reconstructs stator voltage compensatory michanism and its flow of power under topological structure in transient state；The transient state reconstruct topology merging method of accumulation energy type DFIG is finally obtained, the fault traversing control of DFIG under line voltage failure is realized.The present invention can not only realize the smooth control of Power Output for Wind Power Field under electrical network normal operation, simultaneously can also be under line voltage rapid drawdown or the failure condition for rising sharply, auxiliary realizes the fault traversing control of DFIG, improves using value and economic benefit of the energy storage device in dual feedback wind power generation system.
Description
Technical Field
The invention relates to the field of operation, analysis and scheduling of an electric power system, in particular to a transient reconstruction system and a control method for improving the fault ride-through capability of a double-fed fan.
Background
With the rapid development of wind power in recent years, the permeability of the wind power in a power grid is continuously increased, and the power balance of a part of a power system is born, but because a wind power unit does not have fault ride-through capability, a plurality of large-area grid disconnection accidents happen to each wind power plant, and great threat is caused to the stable operation of the power system. The double-fed wind turbine generator system (DFIG) which is one of the mainstream machine types is particularly sensitive to grid voltage faults because the stator side of the DFIG is directly connected with a power grid, off-grid accidents caused by grid voltage drop or sudden rise are easy to happen, and grid-connected operation of the DFIG is severely restricted.
In order to ensure that a doubly-fed wind turbine generator can continuously operate without being disconnected from a grid under the condition of grid faults and meet the requirements of power grid companies of various countries on wind power grid connection, a great deal of research is carried out on the fault ride-through technology of DFIG by many scholars at home and abroad. At present, the solutions for fault ride-through are mainly divided into two categories: one is a double-fed converter improved control strategy provided on the basis of research of DFIG operation characteristics and a traditional control strategy; another is to add hardware assistance and corresponding control strategy design. The control strategies such as field suppression control, introduction of a PI-R controller as a supplement of the PI controller and the like are improved, the fault ride-through capability of the DFIG can be improved, and the increasingly strict grid access requirement of the grid-connected guide rule on the wind turbine generator is still difficult to meet. Hardware auxiliary methods are added, such as a Dynamic Voltage Restorer (DVR) and a series coupling compensation device (SCC) are additionally arranged on the stator side, so that the terminal voltage of the stator can be effectively compensated to a normal level, the fault ride-through capability of the DFIG is improved, and obviously, the hardware cost of the system can be greatly increased.
The energy storage device has the capability of dynamically absorbing redundant energy and timely releasing the redundant energy, so that the defects of intermittence, fluctuation and the like of wind power can be well overcome. Based on the energy storage type DFIG structure, the fault ride-through technology of the DFIG is researched, so that the fault ride-through capability of the DFIG can be improved, and the economic benefit of the energy storage type DFIG can be improved.
Disclosure of Invention
The invention provides a transient reconstruction scheme and a control method for improving fault ride-through capability of a DFIG (doubly fed induction generator) based on an energy storage type DFIG (doubly fed induction generator), which are characterized by comprising the following steps of:
a transient reconstruction system for improving fault ride-through capability of a DFIG is characterized in that an energy storage device is connected in parallel to a direct current side of a DFIG double-fed converter through a bidirectional DC/DC converter by adopting a distributed configuration mode on the basis of a traditional DFIG to form an energy storage type DFIG; the method comprises the following steps of performing transient reconstruction on the GSC, and adding a series interface circuit (l2) connected with a power grid for the GSC, wherein the series interface circuit consists of a series transformer, a brake resistor, an LC filter and two power electronic switches, wherein the series transformer, the brake resistor, the LC filter and the two power electronic switches are connected between the end of a DFIG (doubly Fed induction generator) and a point of connection (PCC) in series, the filter is used for eliminating harmonic waves generated by a GSC switch tube, and the brake resistor is used for consuming overload power on the; in order to filter the switching harmonic wave, an LC filter and a power electronic switch for controlling the branch circuit to be switched off are also connected in series on the parallel interface circuit (l 1).
In the transient reconstruction system for improving the fault ride-through capability of the DFIG, under a normal operation state, the energy storage type DFIG operates under a steady-state topological structure and a steady-state control strategy; the GSC is connected with the power grid through a parallel connection interface circuit l1, the serial connection interface circuit is bypassed, at the moment, the GSC is responsible for maintaining the constant voltage of a direct current bus, and ESD regulates the exchange power between the GSC and the power grid, so that the smooth control of the output power of the DFIG can be realized;
under the state of grid voltage fault, the energy storage type DFIG operates under a transient reconstruction topological structure and a transient control strategy; the GSC is connected with a power grid through a serial interface circuit l1, at the moment, an Energy Storage Device (ESD), the GSC and the serial interface circuit form an energy storage type serial dynamic voltage restorer (ESD-DVR), under a transient control strategy, the ESD-DVR compensates the stator voltage, the influence of sudden changes of the power grid voltage on the DFIG is blocked, and meanwhile, the ESD replaces the GSC and is responsible for maintaining the constant of the DC bus voltage, so that the low voltage ride through capability of the energy storage type DFIG is improved; and when the grid voltage returns to be normal, the energy storage type DFIG is switched from the transient operation mode to the steady operation mode.
A control method of a transient reconstruction system based on DFIG fault ride-through capability improvement is characterized by comprising the following steps:
step 1, constructing an energy storage type DFIG fault ride-through transient reconstruction topological structure based on a traditional DFIG, and realizing switching of the energy storage type DFIG structure under a normal operation state and a grid voltage fault state;
step 2, analyzing a stator voltage compensation mechanism and power flow of the energy storage type DFIG under a transient reconstruction topological structure when the voltage of the power grid suddenly drops and rises;
and 3, based on the energy storage type DFIG fault ride-through transient reconstruction topological structure obtained in the step 1, obtaining a transient reconstruction topological structure control method of the energy storage type DFIG according to the stator voltage compensation mechanism obtained by analyzing in the step 2, and realizing fault ride-through control of the DFIG under the grid voltage fault.
In the above control method of the transient reconstruction system based on improving the fault ride-through capability of the DFIG, in step 2, under the grid voltage fault, the specific analysis of the stator voltage compensation mechanism and the power flow of the energy storage DFIG is as follows:
when the positive sequence component of the grid voltage is detected to be lower than 0.9p.u or higher than 1.1p.u, the energy storage type DFIG realizes fault ride-through transient reconstruction through the control of the power electronic switch, namely, the steady-state topological structure is switched to the transient reconstruction topological structure; at the moment, the ESD-DVR compensates the stator voltage through the serial interface circuit, and the stator voltage is lifted and maintained to the grid voltage before the fault, so that the influence of sudden drop or sudden rise of the grid voltage on the DFIG can be blocked; accordingly, the ESD-DVR needs to provide the compensation voltage of
Ucom＝Ug_pre-Ug＝ΔUg1+ΔUg2Is like
In the formula of Ug_preFor pre-fault grid voltage, at synchronous speed omegasRotation, falling to U when power grid failuregThen, it is known that UgInvolving the use of a synchronous speed omegasPositive sequence voltage component sum of rotation at- ωsNegative sequence voltage component of rotation (in asymmetric fault), i.e. Ug＝Ug1+Ug2，ΔUg1＝Ug_pre-Ug1For positive sequence voltage sag, Δ Ug2＝-Ug2(ii) a Therefore, Δ Ug1、ΔUg2The compensation voltage positive sequence component and the compensation voltage negative sequence component are required to be provided by the ESD-DVR;
in the fault process, the ESD-DVR compensates the stator voltage of the DFIG in real time, the stator voltage of the DFIG is kept unchanged, and the DFIG can adjust active power and reactive power according to a conventional control strategy;
setting DFIG to operate in unity power factor state (i.e., #)10), the stator positive sequence voltage drop depth at the time of the fault is d, the loss of the series transformer is ignored, and the active power output or absorbed by the ESD-DVR during the fault can be expressed as:
according to the formula, the active power absorbed or output by the ESD-DVR is mainly determined by the positive sequence voltage drop depth and the output power of the DFIG stator before the fault;
when the DFIG operates in a super-synchronous operation state, the power of the rotor side flows to the direct-current side capacitor from the generator; when the voltage of the power grid drops, the ESD-DVR absorbs power from the power grid and flows to a direct current side capacitor; at the moment, the ESD connected in parallel with the capacitor on the direct current side of the DFIG absorbs the rotor power and the DVR power to maintain the constant voltage of the capacitor on the direct current side, so that the phenomenon that the voltage of the capacitor on the direct current side is pumped up due to the inflow power on two sides is avoided, and the safe operation of the capacitor is threatened; because the rated power of the GSC is usually 30-35% of the rated power of the wind turbine generator, under the condition of severe grid voltage drop, the power absorbed by the ESD-DVR is greater than the rated power of the GSC, and at the moment, the brake resistor is triggered to automatically input the power absorbed by the DVR, so that the operation safety of the GSC is ensured;
when the DFIG operates in a sub-synchronous operation state, the power of the rotor side flows to the generator from the direct-current side capacitor; when the grid voltage is subjected to transient sudden rise, the ESD-DVR outputs power to the grid; at the moment, the ESD releases power to meet the power requirements of the rotor side and the ESD-DVR, and the power balance of the direct current side is maintained, so that the voltage of the direct current side is maintained to be constant, and the phenomenon that the RSC or GSC overmodulation cannot be realized due to the fact that the voltage of the direct current side is sharply reduced caused by outflow power of two sides is avoided.
In the above control method based on the transient reconstruction system for improving the fault ride-through capability of the DFIG, the specific control method in step 3 is:
step 3.1, in order to accurately identify the power grid fault and facilitate the compensation of the stator voltage, when the power grid has a short-circuit fault, the positive sequence component U of the power grid voltage needs to be accurately extractedg1And a negative sequence component Ug2(under asymmetric fault); the real-time voltage of the power grid under the condition of a fault is set as U under a three-phase static ABC coordinate systemga、Ugb、UgcAccording to the formula, the grid voltage under the αβ coordinate system can be converted into a two-phase static αβ coordinate system, and the grid voltage under the αβ coordinate system is as follows:
wherein,respectively at the time when t is equal to 0, and the positive sequence component U of the network voltageg1And a negative sequence component Ug2Initial angle to α axis (axis A);
according to the formula, after the time delay of T/4, the voltage of the power grid becomes
Combining the fourth expression and the fifth expression, the positive and negative sequence components of the grid voltage can be respectively expressed as follows under an alpha beta coordinate system:
to more simply represent the above relationship, the formula and the matrix form can be represented:
an included angle between the d axis and the α axis at the time when t is 0 can be extracted and obtained through a phase-locked loop (PLL), and then the positive sequence component and the negative sequence component of the grid voltage under an α β coordinate system can be respectively converted into a positive sequence dq coordinate system and a negative sequence dq coordinate system in the formula, as shown in the following formula:
in the same way, the real-time value U of the positive and negative sequence components of the stator voltage can be extracteds1dqAnd Us2dq；
3.2, designing a control method for switching the operation modes of the system according to the positive and negative sequence components of the grid voltage extracted in the step 3.1; the magnitude of the positive sequence component of the grid voltage can be obtained by the formula nine, namely
When the positive sequence component U of the network voltageg1When the voltage drops below 0.9p.u. or rises to above 1.1p.u., the energy storage type DFIG carries out fault ride-through transient reconstruction, the GSC controller is switched to a transient voltage compensation mode, and after the fault is removed, when the voltage is recovered to an interval (0.9p.u.,1.1p.u.), the energy storage type DFIG is recovered to a steady-state operation mode, so that a corresponding logic judgment module can be established to realize switching control between the GSC parallel steady-state operation mode and the transient series voltage compensation mode, namely the switching control is realized
And 3.3, under the transient reconstruction topological structure, designing the fault ride-through control method of the energy storage type DFIG, so that the fault ride-through control method can provide stator voltage compensation for the energy storage type DFIG through the serial connection interface circuit l2, and the fault ride-through control is realized.
In the above control method based on the transient reconstruction system for improving the fault ride-through capability of the DFIG, the specific control method in step 3.3 is: 3.3.1, according to the formula I, the compensation voltage required to be provided by the ESD-DVR comprises a positive sequence component and a negative sequence component; under the positive sequence synchronous rotation dq coordinate system, positive and negative sequence components of the compensation voltage are respectively direct current quantity and alternating current quantity with the frequency of 100Hz, and under the negative sequence synchronous rotation dq coordinate system, the positive sequence component of the compensation voltage is alternating current quantity, and the negative sequence component is direct current quantity; because the PI controller can only adjust the direct current, the PI controller cannot simultaneously control the positive sequence component and the negative sequence component of the compensation voltage under the positive sequence synchronous rotation dq coordinate system; therefore, the PI controller is respectively adopted to realize the independent control of the positive sequence component and the negative sequence component of the compensation voltage under the positive sequence synchronous rotating coordinate system and the negative sequence synchronous rotating coordinate system, and a direct voltage control strategy is adopted for the positive sequence voltage and the negative sequence voltage output by the ESD-DVR;
according to the positive and negative sequence voltage extraction method of the step 3.1, the real-time values of the positive and negative sequence components of the stator voltage which can be extracted are respectively Us1dqAnd Us2dqThen, under the double-sequence dq coordinate system, the instruction value and the real-time value of the positive and negative sequence components of the compensation voltage are respectively
In (dq)+Coordinate system sum (dq)-In coordinates, the positive and negative components (U) of the ESD-DVR output voltagecom1dq) And a negative sequence component (U)com2dq) Respectively corresponding to positive sequence voltage reference values (U)* com1dq) And a negative sequence voltage reference value (U)* com2dq) Comparing, and respectively obtaining positive and negative sequence modulation voltage (U) of ESD-DVR after regulation by PI controllerf1dq，Uf2dq) Then the space vector of the synthesized voltage is projected to the lower part of a three-phase static coordinate shaft system through coordinate transformation, and the space vector of the synthesized voltage is used as a control signal of GSC transmission voltage after amplitude limiting to generate a trigger pulse of the converter;
step 3.3.2, the energy storage device based on the double-layer capacitor (EDLC) is adopted, and is connected with the direct current capacitor of the DFIG in parallel through the bidirectional DC/DC converter; during a fault period, the ESD mainly aims at maintaining the voltage of a direct current bus to be constant, and controls the EDLC to absorb or output active power to maintain the power balance of a direct current side through the DC/DC converter so as to adjust the voltage of a direct current capacitor to be constant;
when the power of the RSC and the GSC to the direct current side is increased to cause the voltage of the direct current bus to rise, the DC/DC converter works in a voltage reduction mode, and the direct current side power is stored in the EDLC; when the direct current bus voltage is reduced due to the fact that the power output by the direct current side RSC and the direct current side GSC is increased, the DC/DC converter works in a boosting mode, and the EDLC releases energy to compensate the direct current bus voltage;
the control strategy of the DC/DC converter is specifically as follows: the DC/DC adopts a voltage and current double closed loop control structure, the outer loop is a DC bus voltage controller, and the DC bus voltage measured value U is obtaineddcAnd a DC bus voltage reference value UdcrefComparing, and generating an EDLC current reference value by the deviation of the two through a PI voltage regulator; the inner loop EDLC current controller compares the EDLC current measured value with the EDLC current measured value, the deviation of the two values passes through a PI current regulator, gate control signals are generated for IGBT switches of the DC/DC converter, and the gate control signals of the switching devices g1 and g2 are complementary; energy storage and energy release of the EDLC are achieved through conducting control of g1 and g2, namely when g1 is conducted and g2 is closed, the DC/DC converter works in a boosting operation state; when g1 is closed and g2 is conducted, the DC/DC converter works in a voltage reduction operation state; the DC/DC converter controls the energy stored and released by the EDLC by adjusting the duty cycle of the conduction of the two switches, thereby maintaining the DC bus voltage constant.
Compared with the prior art, the invention has the following advantages: 1. the technical advantage that the energy storage device can quickly absorb and release power is fully exerted, so that the output power of the wind power plant can be smoothly controlled under the normal operation condition of a power grid, meanwhile, the fault ride-through control of the DFIG can be realized in an auxiliary manner under the fault condition of sudden drop or sudden rise of the voltage of the power grid, and the application value and the economic benefit of the energy storage device in a double-fed wind power generation system are improved. 2. Under the transient topological structure and the control method thereof, the low-voltage and high-voltage ride-through control of the DFIG can be automatically realized, and a better effect is obtained.
Drawings
Fig. 1 shows a fault-ride-through transient reconstruction topology of an energy-storage DFIG.
FIG. 2 is a diagram of an ESD-DVR topology.
Fig. 3a is a vector diagram of the compensation voltage of the sudden drop of the power grid voltage.
Fig. 3b is a vector diagram of the compensation voltage under the sudden rise of the power grid voltage.
Fig. 4a is a fault-ride-through transient topology power flow diagram (super-synchronous operation state) of the energy storage type DFIG.
Fig. 4b is a power flow diagram (sub-synchronous operation state) of the fault-ride-through transient topology of the energy-storage DFIG.
Fig. 5 shows a control strategy for switching the operation modes of the system.
FIG. 6 shows the ESD-DVR positive and negative sequence voltage compensation control strategy.
Fig. 7 is a topology diagram of ESD and a DC/DC converter control strategy.
Fig. 8a is a voltage waveform under a transient reconstruction control scheme (stator voltage under a conventional control scheme during a fault).
Fig. 8b is a voltage waveform under the transient reconstruction control scheme (ESD-DVR compensation voltage).
Fig. 8c is a voltage waveform (stator voltage) under the transient reconstruction control scheme.
Fig. 9a is a comparison of the transient characteristics (rotor currents) for the transient reconstruction control scheme and the conventional control scheme.
Fig. 9b is a comparison of transient characteristics (dc bus voltage (kV)) for the transient reconfiguration control scheme and the conventional control scheme.
Fig. 9c is a comparison of transient characteristics (stator active power) between the transient reconstruction control scheme and the conventional control scheme.
Fig. 9d is a comparison of transient characteristics (rotor speed) for the transient reconstruction control scheme and the conventional control scheme.
Fig. 10a shows the system power flow (active power injected into the grid) under the transient reconfiguration scheme during a fault.
Fig. 10b shows the system power flow (active power absorbed by DVR) under the transient reconstruction scheme during the fault.
Fig. 10c is the system power flow (active power flowing into the GSC) under the transient reconfiguration scheme during a fault.
Fig. 10d is the system power flow (rotor active power) under the transient reconstruction scheme during a fault.
Fig. 10e is the system power flow (active power absorbed by the ESD) under the transient reconfiguration scheme during a fault.
Fig. 11a shows the voltage waveforms (grid voltage) at the time of a three-phase voltage surge.
Fig. 11b shows the voltage waveform (DVR offset voltage) at the time of the three-phase voltage surge.
FIG. 11c is a voltage comparison.
Fig. 11d shows the voltage waveforms (stator voltages) at the time of the three-phase voltage surge.
Fig. 12a is a comparison of simulation results (active power injected into the grid) of the transient reconstruction control scheme and the conventional control scheme during three-phase voltage surge.
Fig. 12b is a comparison of simulation results (dc bus voltage) of the three-phase voltage-ramp transient reconstruction control scheme and the conventional control scheme.
Fig. 12c is a comparison of simulation results (rotor currents) for the three-phase voltage-ramp transient reconstruction control scheme and the conventional control scheme.
Fig. 12d is a comparison of simulation results (rotor speed) of the three-phase voltage-ramp transient reconstruction control scheme and the conventional control scheme.
FIG. 13 shows DFIG-ESD power flow at three phase voltage surge.
Detailed Description
The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings.
Example (b):
the effectiveness of the control method in the aspect of improving the fault ride-through capability of the DFIG is verified under the following two fault conditions respectively: 1) two phases are grounded, and voltage drop faults occur; 2) and the sudden rise of the three-phase voltage. The traditional DFIG control method without an additional scheme is selected as a comparison scheme to verify the superiority of the strategy. The specific situation is as follows:
1) simulation example for low voltage ride through control
The system operates in a super-synchronous operation state before the fault, and the slip ratio s is-0.2. And the power grid has AB two-phase ground fault at t-5 s, the fault phase voltage of the PCC point falls by 85%, and the fault duration is 300 ms. Since the fault duration is short, the wind speed variation is small, so the wind speed is assumed to be constant.
Fig. 8(a) shows the grid voltage waveform during a fault, and when a grid fault is detected, the DFIG switches from the steady-state mode of operation to the transient mode of operation, and the ESD-DVR output voltage compensates for the drop in the grid voltage (see fig. 8(b)), so that the DFIG stator voltage is maintained at the pre-fault level, as shown in fig. 8 (c).
Under the traditional control scheme, in the process of starting to drop and recover the voltage of the power grid, the high transient current of the rotor can be induced by the violent change of the voltage of the stator. As shown in fig. 9(a), when a fault occurs, the rotor current increases to 4p.u., and exceeds the upper current limit of RSC, which causes serious damage to the converter. Meanwhile, the induced rotor current has large fluctuation, and the normal operation of the DFIG is not utilized. As shown in fig. 9(b), the rotor transient current flows into the dc side through RSC, and then the voltage on the dc side is raised to 1.4 p.u. With the transient reconstruction scheme proposed herein, the transient rotor current in the rotor circuit is effectively controlled, the rotor current is only 1.7p.u. at the highest (see fig. 9(a)), and the current oscillation is small, and is completely within the current tolerance range of RSC. Accordingly, the dc side voltage does not exceed its upper voltage limit, as shown in fig. 9 (b).
Fig. 9(c) shows the DFIG active output waveform under two control schemes. As can be seen from fig. 9(c), in the conventional control scheme, the active output of the stator is reduced to 0.52p.u., which causes a serious imbalance between the mechanical torque and the electromagnetic torque and a rise in the rotational speed of the unit. After the DVR compensation is adopted, the DFIG is basically not influenced by the fault of the power grid during the fault period, and the active output can be recovered after short fluctuation, so that the flexibility of the power control of the DFIG during the fault period is greatly increased. Accordingly, as shown in fig. 9(d), the imbalance torque of the unit disappears and the rotation speed of the DFIG unit does not change due to the rapid recovery of the active power output.
Fig. 10 shows the use of an ESD-DVR to compensate for active power flow variations during a controlled post-fault. As can be seen from fig. 10(a) and (b), during a fault, the active power injected into the grid by the DFIG is reduced, and the remaining wind power is transmitted to the grid-side converter via the DVR. As can be seen from fig. 10(c), the power absorbed by the DVR exceeds the rated capacity of the GSC, but due to the presence of the braking resistor, the power flowing through the GSC will drop to 0.35p.u. after absorbing part of the power through the braking resistor.
2) Simulation example for high voltage ride through control
When a large load is cut off and a large-capacity capacitor is incorporated, the voltage of the power grid can be increased, and the problem of the voltage increase of the power grid can be solved by the control method provided by the patent. In simulation, when t is set to be 5s, the grid voltage rises to 1.25p.u., and lasts for 300ms, and the wind speed is 9.2m/s and remains unchanged in the fault process.
Under normal conditions, the GSC is used as a network side converter and is coordinated with the energy storage device to control the active output of the DFIG. When the grid voltage is detected to rise to 1.1p.u., the energy storage type DFIG system is switched to a transient operation mode, the ESD-DVR compensates the stator voltage of the DFIG, the voltage compensated by the ESD-DVR is a negative value, and the ESD-DVR outputs power to the grid. The DFIG stator voltage can be maintained substantially constant through ESD-DVR compensation. Fig. 11 shows the effective values of the grid voltage, the ESD-DVR compensation voltage and the stator voltage.
As can be seen from fig. 12(d), in the conventional control scheme, when the grid voltage rises and the stator side of the DFIG receives a real impact, the DFIG rotation speed is reduced from 0.94p.u. to 0.91p.u. to compensate for the power imbalance. After the energy storage type DFIG compensation control provided by the patent is adopted, due to the voltage compensation of the ESD-DVR, the power of the stator side can be quickly recovered to the normal working range, the power imbalance cannot be caused, and therefore the DFIG cannot be influenced by the fault after the fault disappears, and the normal grid-connected operation can be continued. After the stator voltage compensation is adopted, the rotating speed of the DFIG is effectively controlled, and can be maintained in a normal range in the fault process.
In a traditional control scheme, PI control is generally adopted, in order to compensate stator voltage, GSC increases the modulation coefficient of GSC, and controls redundant active power on a network side to flow to a direct current side so as to keep the voltage on the direct current side constant. However, with this compensation, the antiparallel diodes that make up the GSC will be caused to conduct forward, causing some of the power to flow back to the GSC, i.e., the dc side will absorb energy from the grid. As shown in fig. 12(b), when the conventional control scheme is adopted, the dc side voltage will eventually rise to 1.36p.u., and during the fault, the dc side overvoltage will always exist, so as to protect the dc side capacitor, which may eventually cause the DFIG to run off-line. However, after the energy storage type DVR is adopted for control, the GSC injects reverse voltage into a power grid to keep the voltage of a stator constant, so that the voltage of a direct current side is maintained in a safe range in the fault process, and finally, the overvoltage of the direct current side in the traditional control can be avoided. In addition, as shown in fig. 12(c), compared with the conventional control scheme, the oscillation degree of the transient current of the rotor is effectively suppressed and can be quickly restored to a stable level after the energy storage type DVR control is adopted. Therefore, the fault ride-through control strategy provided by the invention can also effectively improve the DFIG high voltage ride-through capability.
Figure 13 shows the active output waveform in the event of a voltage rise fault. Before a fault occurs, the DFIG operates in an over-synchronization state, and rotor excitation current flows to a rotor loop from a direct current side. When a fault occurs, the GSC acts as a DVR, injecting a reverse voltage into the grid to maintain the stator voltage constant, as shown in fig. 13. The energy storage system provides 0.13p.u. active power to the rotor circuit and the GSC while the GSC compensates the grid voltage to the grid, wherein the GSC injects about 0.1p.u. active power to the grid. Due to the injection power of the GSC, the final active output of the DFIG-ESD system is increased from 0.4p.u. to 0.5p.u. During a fault, rotor power is provided by the energy storage system.
According to the simulation calculation results, the system mode switching, the low voltage ride through control and the high voltage ride through control of the energy storage type DFIG can be realized under the condition that the voltage of a power grid suddenly drops or rises, and the transient characteristics of a rotor and a direct current side of the DFIG can be maintained in a normal range. Meanwhile, the energy storage device is fully utilized in the transient control of the DFIG, the economic benefit of the energy storage device is improved, and the method has important practical significance and good application prospect.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.
Claims (6)
1. A transient reconstruction system for improving fault ride-through capability of a DFIG is characterized in that an energy storage device is connected in parallel to a direct current side of a DFIG double-fed converter through a bidirectional DC/DC converter by adopting a distributed configuration mode on the basis of a traditional DFIG to form an energy storage type DFIG; the method comprises the following steps of performing transient reconstruction on the GSC, and adding a series interface circuit (l2) connected with a power grid for the GSC, wherein the series interface circuit consists of a series transformer, a brake resistor, an LC filter and two power electronic switches, wherein the series transformer, the brake resistor, the LC filter and the two power electronic switches are connected between the end of a DFIG (doubly Fed induction generator) and a point of connection (PCC) in series, the filter is used for eliminating harmonic waves generated by a GSC switch tube, and the brake resistor is used for consuming overload power on the; in order to filter the switching harmonic wave, an LC filter and a power electronic switch for controlling the branch circuit to be switched off are also connected in series on the parallel interface circuit (l 1).
2. The transient reconstruction system for improving the fault ride-through capability of the DFIG as claimed in claim 1, wherein in a normal operation state, the energy storage type DFIG operates under a steady-state topology and a steady-state control strategy; the GSC is connected with the power grid through a parallel connection interface circuit l1, the serial connection interface circuit is bypassed, at the moment, the GSC is responsible for maintaining the constant voltage of a direct current bus, and ESD regulates the exchange power between the GSC and the power grid, so that the smooth control of the output power of the DFIG can be realized;
under the state of grid voltage fault, the energy storage type DFIG operates under a transient reconstruction topological structure and a transient control strategy; the GSC is connected with a power grid through a serial interface circuit l1, at the moment, an Energy Storage Device (ESD), the GSC and the serial interface circuit form an energy storage type serial dynamic voltage restorer (ESD-DVR), under a transient control strategy, the ESD-DVR compensates the stator voltage, the influence of sudden changes of the power grid voltage on the DFIG is blocked, and meanwhile, the ESD replaces the GSC and is responsible for maintaining the constant of the DC bus voltage, so that the low voltage ride through capability of the energy storage type DFIG is improved; and when the grid voltage returns to be normal, the energy storage type DFIG is switched from the transient operation mode to the steady operation mode.
3. A control method of a transient reconstruction system based on DFIG fault ride-through capability improvement is characterized by comprising the following steps:
step 1, constructing an energy storage type DFIG fault ride-through transient reconstruction topological structure based on a traditional DFIG, and realizing switching of the energy storage type DFIG structure under a normal operation state and a grid voltage fault state;
step 2, analyzing a stator voltage compensation mechanism and power flow of the energy storage type DFIG under a transient reconstruction topological structure when the voltage of the power grid suddenly drops and rises;
and 3, based on the energy storage type DFIG fault ride-through transient reconstruction topological structure obtained in the step 1, obtaining a transient reconstruction topological structure control method of the energy storage type DFIG according to the stator voltage compensation mechanism obtained by analyzing in the step 2, and realizing fault ride-through control of the DFIG under the grid voltage fault.
4. The method for controlling the transient reconstruction system based on improving the fault ride-through capability of the DFIG according to claim 1, wherein in the step 2, under the grid voltage fault, the specific analysis of the stator voltage compensation mechanism and the power flow of the energy storage DFIG is as follows:
when the positive sequence component of the grid voltage is detected to be lower than 0.9p.u or higher than 1.1p.u, the energy storage type DFIG realizes fault ride-through transient reconstruction through the control of the power electronic switch, namely, the steady-state topological structure is switched to the transient reconstruction topological structure; at the moment, the ESD-DVR compensates the stator voltage through the serial interface circuit, and the stator voltage is lifted and maintained to the grid voltage before the fault, so that the influence of sudden drop or sudden rise of the grid voltage on the DFIG can be blocked; accordingly, the ESD-DVR needs to provide the compensation voltage of
Ucom＝Ug_pre-Ug＝ΔUg1+ΔUg2Is like
In the formula of Ug_preFor pre-fault grid voltage, at synchronous speed omegasRotation, falling to U when power grid failuregThen, it is known that UgInvolving the use of a synchronous speed omegasPositive sequence voltage component sum of rotation at- ωsNegative sequence voltage component of rotation (in asymmetric fault), i.e. Ug＝Ug1+Ug2，ΔUg1＝Ug_pre-Ug1For positive sequence voltage sag, Δ Ug2＝-Ug2(ii) a Therefore, Δ Ug1、ΔUg2The compensation voltage positive sequence component and the compensation voltage negative sequence component are required to be provided by the ESD-DVR;
in the fault process, the ESD-DVR compensates the stator voltage of the DFIG in real time, the stator voltage of the DFIG is kept unchanged, and the DFIG can adjust active power and reactive power according to a conventional control strategy;
setting DFIG to operate in unity power factor state (i.e., #)10), the stator positive sequence voltage drop is set to be deep when the fault occursDegree d, neglecting the losses of the series transformer, the active power output or absorbed by the ESD-DVR during a fault can be expressed as:
according to the formula, the active power absorbed or output by the ESD-DVR is mainly determined by the positive sequence voltage drop depth and the output power of the DFIG stator before the fault;
when the DFIG operates in a super-synchronous operation state, the power of the rotor side flows to the direct-current side capacitor from the generator; when the voltage of the power grid drops, the ESD-DVR absorbs power from the power grid and flows to a direct current side capacitor; at the moment, the ESD connected in parallel with the capacitor on the direct current side of the DFIG absorbs the rotor power and the DVR power to maintain the constant voltage of the capacitor on the direct current side, so that the phenomenon that the voltage of the capacitor on the direct current side is pumped up due to the inflow power on two sides is avoided, and the safe operation of the capacitor is threatened; because the rated power of the GSC is usually 30-35% of the rated power of the wind turbine generator, under the condition of severe grid voltage drop, the power absorbed by the ESD-DVR is greater than the rated power of the GSC, and at the moment, the brake resistor is triggered to automatically input the power absorbed by the DVR, so that the operation safety of the GSC is ensured;
when the DFIG operates in a sub-synchronous operation state, the power of the rotor side flows to the generator from the direct-current side capacitor; when the grid voltage is subjected to transient sudden rise, the ESD-DVR outputs power to the grid; at the moment, the ESD releases power to meet the power requirements of the rotor side and the ESD-DVR, and the power balance of the direct current side is maintained, so that the voltage of the direct current side is maintained to be constant, and the phenomenon that the RSC or GSC overmodulation cannot be realized due to the fact that the voltage of the direct current side is sharply reduced caused by outflow power of two sides is avoided.
5. The control method of the transient reconstruction system for improving fault ride-through capability of the DFIG according to claim 1, wherein the specific control method in step 3 is as follows:
step 3.1, in order to accurately identify grid faults and facilitate the compensation of stator voltages, the gridWhen short-circuit fault occurs, the positive sequence component U of the power grid voltage needs to be accurately extractedg1And a negative sequence component Ug2(under asymmetric fault); the real-time voltage of the power grid under the condition of a fault is set as U under a three-phase static ABC coordinate systemga、Ugb、UgcAccording to the formula, the grid voltage under the αβ coordinate system can be converted into a two-phase static αβ coordinate system, and the grid voltage under the αβ coordinate system is as follows:
wherein,respectively at the time when t is equal to 0, and the positive sequence component U of the network voltageg1And a negative sequence component Ug2Initial angle to α axis (axis A);
according to the formula, after the time delay of T/4, the voltage of the power grid becomes
Combining the fourth expression and the fifth expression, the positive and negative sequence components of the grid voltage can be respectively expressed as follows under an alpha beta coordinate system:
to more simply represent the above relationship, the formula and the matrix form can be represented:
an included angle between the d axis and the α axis at the time when t is 0 can be extracted and obtained through a phase-locked loop (PLL), and then the positive sequence component and the negative sequence component of the grid voltage under an α β coordinate system can be respectively converted into a positive sequence dq coordinate system and a negative sequence dq coordinate system in the formula, as shown in the following formula:
in the same way, the real-time value U of the positive and negative sequence components of the stator voltage can be extracteds1dqAnd Us2dq；
3.2, designing a control method for switching the operation modes of the system according to the positive and negative sequence components of the grid voltage extracted in the step 3.1; the magnitude of the positive sequence component of the grid voltage can be obtained by the formula nine, namely
When the positive sequence component U of the network voltageg1When the voltage drops below 0.9p.u. or rises to above 1.1p.u., the energy storage type DFIG carries out fault ride-through transient reconstruction, the GSC controller is switched to a transient voltage compensation mode, and after the fault is removed, when the voltage is recovered to an interval (0.9p.u.,1.1p.u.), the energy storage type DFIG is recovered to a steady-state operation mode, so that a corresponding logic judgment module can be established to realize switching control between the GSC parallel steady-state operation mode and the transient series voltage compensation mode, namely the switching control is realized
And 3.3, under the transient reconstruction topological structure, designing the fault ride-through control method of the energy storage type DFIG, so that the fault ride-through control method can provide stator voltage compensation for the energy storage type DFIG through the serial connection interface circuit l2, and the fault ride-through control is realized.
6. The control method of the transient reconstruction system for improving fault ride-through capability of the DFIG according to claim 1, wherein the specific control method of step 3.3 is as follows: 3.3.1, according to the formula I, the compensation voltage required to be provided by the ESD-DVR comprises a positive sequence component and a negative sequence component; under the positive sequence synchronous rotation dq coordinate system, positive and negative sequence components of the compensation voltage are respectively direct current quantity and alternating current quantity with the frequency of 100Hz, and under the negative sequence synchronous rotation dq coordinate system, the positive sequence component of the compensation voltage is alternating current quantity, and the negative sequence component is direct current quantity; because the PI controller can only adjust the direct current, the PI controller cannot simultaneously control the positive sequence component and the negative sequence component of the compensation voltage under the positive sequence synchronous rotation dq coordinate system; therefore, the PI controller is respectively adopted to realize the independent control of the positive sequence component and the negative sequence component of the compensation voltage under the positive sequence synchronous rotating coordinate system and the negative sequence synchronous rotating coordinate system, and a direct voltage control strategy is adopted for the positive sequence voltage and the negative sequence voltage output by the ESD-DVR;
according to the positive and negative sequence voltage extraction method of the step 3.1, the real-time values of the positive and negative sequence components of the stator voltage which can be extracted are respectively Us1dqAnd Us2dqThen, under the double-sequence dq coordinate system, the instruction value and the real-time value of the positive and negative sequence components of the compensation voltage are respectively
In (dq)+Coordinate system sum (dq)-In coordinates, the positive and negative components (U) of the ESD-DVR output voltagecom1dq) And a negative sequence component (U)com2dq) Respectively corresponding to positive sequence voltage reference values (U)* com1dq) And a negative sequence voltage reference value (U)* com2dq) Comparing, and respectively obtaining positive and negative sequence modulation voltage (U) of ESD-DVR after regulation by PI controllerf1dq，Uf2dq) Then the space vector of the synthesized voltage is projected to the lower part of a three-phase static coordinate shaft system through coordinate transformation, and the space vector of the synthesized voltage is used as a control signal of GSC transmission voltage after amplitude limiting to generate a trigger pulse of the converter;
step 3.3.2, the energy storage device based on the double-layer capacitor (EDLC) is adopted, and is connected with the direct current capacitor of the DFIG in parallel through the bidirectional DC/DC converter; during a fault period, the ESD mainly aims at maintaining the voltage of a direct current bus to be constant, and controls the EDLC to absorb or output active power to maintain the power balance of a direct current side through the DC/DC converter so as to adjust the voltage of a direct current capacitor to be constant;
when the power of the RSC and the GSC to the direct current side is increased to cause the voltage of the direct current bus to rise, the DC/DC converter works in a voltage reduction mode, and the direct current side power is stored in the EDLC; when the direct current bus voltage is reduced due to the fact that the power output by the direct current side RSC and the direct current side GSC is increased, the DC/DC converter works in a boosting mode, and the EDLC releases energy to compensate the direct current bus voltage;
the control strategy of the DC/DC converter is specifically as follows: the DC/DC adopts a voltage and current double closed loop control structure, the outer loop is a DC bus voltage controller, and the DC bus voltage measured value U is obtaineddcAnd a DC bus voltage reference value UdcrefComparing, and generating an EDLC current reference value by the deviation of the two through a PI voltage regulator; the inner loop EDLC current controller compares the EDLC current measured value with the EDLC current measured value, the deviation of the two values passes through a PI current regulator, gate control signals are generated for IGBT switches of the DC/DC converter, and the gate control signals of the switching devices g1 and g2 are complementary; energy storage and energy release of the EDLC are achieved through conducting control of g1 and g2, namely when g1 is conducted and g2 is closed, the DC/DC converter works in a boosting operation state; when g1 is closed and g2 is conducted, the DC/DC converter works in a voltage reduction operation state; the DC/DC converter controls the energy stored and released by the EDLC by adjusting the duty cycle of the conduction of the two switches, thereby maintaining the DC bus voltage constant.
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| CN109256798A (en) * | 2018-07-23 | 2019-01-22 | 华中科技大学 | DFIG system passes through operation method under a kind of voltage symmetry failure |
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| CN110165705A (en) * | 2019-05-30 | 2019-08-23 | 湖南大学 | Marine double-fed fan motor unit high voltage crossing control method and system |
| CN110165705B (en) * | 2019-05-30 | 2020-10-27 | 湖南大学 | High-voltage ride through control method and system for offshore double-fed wind turbine generator |
| CN110797910B (en) * | 2019-10-28 | 2023-06-02 | 天津大学 | Control method for improving low voltage ride through capability of matrix converter system |
| CN110797910A (en) * | 2019-10-28 | 2020-02-14 | 天津大学 | Control method for improving low voltage ride through capability of matrix converter system |
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