CN106486385A - Packaging method of temperature measurement assembly, cover body structure and manufacturing method thereof - Google Patents
Packaging method of temperature measurement assembly, cover body structure and manufacturing method thereof Download PDFInfo
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- CN106486385A CN106486385A CN201510582194.5A CN201510582194A CN106486385A CN 106486385 A CN106486385 A CN 106486385A CN 201510582194 A CN201510582194 A CN 201510582194A CN 106486385 A CN106486385 A CN 106486385A
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- layer
- heat absorbing
- absorbing layer
- cover plate
- rotating fields
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- 238000000034 method Methods 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 238000004806 packaging method and process Methods 0.000 title abstract description 6
- 238000009529 body temperature measurement Methods 0.000 title abstract 2
- 229910052751 metal Inorganic materials 0.000 claims abstract description 59
- 239000002184 metal Substances 0.000 claims abstract description 59
- 238000005530 etching Methods 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000010521 absorption reaction Methods 0.000 claims abstract description 13
- 239000010410 layer Substances 0.000 claims description 237
- 230000005619 thermoelectricity Effects 0.000 claims description 47
- 239000011241 protective layer Substances 0.000 claims description 30
- 238000012856 packing Methods 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 20
- 238000005538 encapsulation Methods 0.000 claims description 16
- 239000011800 void material Substances 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 5
- 238000003466 welding Methods 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 230000000994 depressogenic effect Effects 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000000725 suspension Substances 0.000 description 26
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 238000007667 floating Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910001935 vanadium oxide Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910020776 SixNy Inorganic materials 0.000 description 1
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 1
- 230000002745 absorbent Effects 0.000 description 1
- 239000002250 absorbent Substances 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
Abstract
The application provides a packaging method of a temperature measurement component, which comprises the following steps: a cover plate is provided, and a plurality of packaging structure patterns are formed on the first surface of the cover plate. And forming a heat absorption layer structure and a thermal resistance layer on the packaging structure pattern. Forming an etch protection region, and etching the heat absorbing layer structure to create a trench to expose the thermal resistance layer. A metal layer is formed over the heat absorbing layer structure and the islands, which electrically contacts the thermal resistance layer through the slots. Through-grooves are formed on the packaging structure pattern to expose the cover plate. The cover plate is etched through the through grooves to form groove cavities below the heat absorption layer structure, and a plurality of supporting columns are formed in the etching protection area. A chip, electrical contacts, and bond pads are disposed on a substrate. The cover plate is soldered in vacuum toward the chip cover substrate.
Description
Technical field
Following narration relates to a kind of method for packing, surveys the encapsulation of assembly in particular to temperature
Method and the cover body structure being monolithically formed (monolithic).
Background technology
At present, infrared ray (IR) video cameras are applied to record and store continuously
Thermal imagery, comprises temperature in infrared ray (IR) video cameras and surveys chip, and it comprises temperature and passes
Sense assembly array (array), each temperature sensing component array can according to its receive infrared
Beta radiation energy and accordingly change its resistance value, the electricity of therefore each temperature sensing component array
Resistance changes the power that can correspond to thermal energy, and each temperature sensing component array just can produce hot shadow
Picture.
Temperature is surveyed chip and is arranged on pedestal, is then encapsulated with pedestal with lid, and in order to avoid
Produce thermal convection current in encapsulated space and affect the thermal energy that temperature sensing component array is sensed, envelope
Dress space maintains vacuum state, and the sensitivity of temperature sensing component array and encapsulated space
Level of vacuum is relevant.
For the process of evacuation, package cavity volume is more little more speed that be conducive to evacuation.
But in the prior art, temperature is surveyed chip and is needed to be placed in pedestal, and pedestal must have certain
Space, so, package cavity volume is difficult to reduce.
Content of the invention
In view of the problems referred to above, the purpose of the application is the encapsulation side providing a kind of temperature to survey assembly
Method, to effectively improve the encapsulation speed that temperature surveys assembly.
In view of the problems referred to above, the application another object is that the encapsulation providing a kind of temperature to survey assembly
Method, reduces, with effective, the vacuum that encapsulation volume carries high temperature side assembly.
Based on above-mentioned purpose, the application provides a kind of temperature to survey the method for packing of assembly, comprises following
Step.First, provide cover plate, its first surface has multiple encapsulating structure patterns, each
Individual encapsulating structure pattern can comprise multiple island and annular platform (bonding ring).?
Form multiple etching protection zones in cover plate.Heat absorption is formed on each encapsulating structure pattern
Rotating fields and thermoelectricity resistance layer.To produce multiple flutings, it exposes heat to etching heat absorbing layer structure
Resistive layer；The first metal layer, the first metal layer are formed on heat absorbing layer structure and island
By fluting electrical contact thermoelectricity resistance layer.Second metal layer is formed on annular platform.In encapsulation knot
Multiple wears grooves are formed on structure pattern to expose cover plate.By wears groove, cover plate is etched, with
Heat absorbing layer structure groove void formed below, and support column is formed by etching protection zone.Lining is provided
Bottom, and chip, multiple electrical pickoff, and at least one weld zone are formed on substrate.?
Afterwards, in a vacuum by the first surface of cover plate towards chip, cover substrate, by multiple island
On multiple the first metal layers weld with multiple electrical pickoff phases, and by annular platform
Two metal levels and at least one weld zone phase welding.
Preferably, heat absorbing layer structure comprises heat absorbing layer and protective layer, in thermoelectricity resistance layer shape
Become on heat absorbing layer, and protective layer is formed in thermoelectricity resistance layer, and method for packing further includes erosion
Carve protective layer to produce multiple flutings.
Preferably, heat absorbing layer structure comprises the first heat absorbing layer and the second heat absorbing layer, heat
Resistive layer is formed between the first heat absorbing layer and the second heat absorbing layer, and method for packing more wraps
The second heat absorbing layer containing etching is to produce multiple flutings.
Based on above-mentioned purpose, the application reoffers the method for packing that a kind of temperature surveys assembly, under comprising
Row step.There is provided cover plate, cover plate has groove, has multiple support column arrangement in groove.Recessed
Insert expendable material in groove and be etched, to form multiple encapsulating structure patterns, each envelope
Assembling structure pattern can comprise multiple island and annular platform.Encapsulating structure pattern is formed
Heat absorbing layer structure and thermoelectricity resistance layer.Etching heat absorbing layer structure is to produce multiple flutings with sudden and violent
Dew thermoelectricity resistance layer.The first metal layer, metal level are formed on heat absorbing layer structure and island
By fluting electrical contact thermoelectricity resistance layer.Second metal layer is formed on annular platform.In encapsulation knot
Multiple wears grooves are formed on structure pattern to expose expendable material.By multiple wears grooves, expendable material is entered
Row etching, with heat absorbing layer structure groove void formed below and the multiple support column arrangement of reservation.
Substrate is provided, and setting chip, multiple electrical pickoff, and at least one weld zone on substrate.
Finally, the surface of multiple encapsulating structure patterns will be had on cover plate towards chip in a vacuum, cover
Lid substrate, and the first metal layer in multiple island is welded with electrical pickoff phase, and will
Annular platform second metal layer and at least one weld zone phase welding.
Preferably, heat absorbing layer structure comprises heat absorbing layer and protective layer, in thermoelectricity resistance layer shape
Become on heat absorbing layer, and protective layer is formed in thermoelectricity resistance layer, and method for packing further includes erosion
Carve protective layer to produce multiple flutings.
Preferably, heat absorbing layer structure comprises the first heat absorbing layer and the second heat absorbing layer, heat
Resistive layer is formed between the first heat absorbing layer and the second heat absorbing layer, and method for packing more wraps
The second heat absorbing layer containing etching is to produce multiple flutings.
Based on above-mentioned purpose, the application reoffers a kind of system of the cover body structure for chip package
Make method, it comprises the steps of offer cover plate, its first surface has multiple encapsulating structures
Pattern, each encapsulating structure pattern can comprise multiple island and annular platform.In cover plate
Form multiple etching protection zones.Auxiliary Rotating fields and reaction are formed on encapsulating structure pattern
Active layer.Etching assists Rotating fields to produce multiple flutings, to expose reagentia layer.Auxiliary
Help formation the first metal layer in Rotating fields and island, the first metal layer passes through multiple fluting electricity
Haptoreaction active layer.Second metal layer is formed on annular platform.On encapsulating structure pattern
Form multiple wears grooves, to expose cover plate.Finally, by multiple wears grooves, cover plate is etched,
So that in auxiliary Rotating fields groove void formed below, and multiple etching protection zone forms multiple supports
Post, thus to form cover body structure.
Based on above-mentioned purpose, the application reoffers a kind of system of the cover body structure for chip package
Make method, it comprises the steps of offer cover plate, cover plate has groove, in groove, have multiple
Hinge structure.Insert expendable material in a groove and be etched, to form multiple encapsulating structures
Pattern, each encapsulating structure pattern can comprise multiple island and annular platform.In encapsulation knot
Auxiliary Rotating fields and reagentia layer are formed on structure pattern.Etching auxiliary Rotating fields are many to produce
Individual fluting, to expose reagentia layer.Auxiliary Rotating fields and island form the first gold medal
Belong to layer, the first metal layer is by multiple fluting electrical contact reagentia layers.Shape on annular platform
Become second metal layer.Encapsulating structure pattern forms multiple wears grooves, to expose expendable material.
Finally, by multiple wears grooves, expendable material is etched, with formed below in auxiliary Rotating fields
Groove void and the multiple support column arrangement of reservation, thus to form cover body structure.
Preferably, auxiliary Rotating fields comprise heat absorbing layer and protective layer, and reagentia layer can be
Thermoelectricity resistance layer, is formed between heat absorbing layer and protective layer in thermoelectricity resistance layer, and multiple fluting
Pierce through the protection layer.
Preferably, auxiliary Rotating fields comprise the first heat absorbing layer and the second heat absorbing layer, reaction
Active layer can be thermoelectricity resistance layer, and thermoelectricity resistance layer is formed at the first heat absorbing layer and the second heat absorption
Between layer, and multiple fluting penetrates the second heat absorbing layer.
Based on above-mentioned purpose, the application reoffers a kind of cover body structure for encapsulation, and it comprises
Cover plate, auxiliary Rotating fields, reagentia layer, the first metal layer and second metal layer.Cover plate
Tool groove, and there is in groove at least one support column and annular platform.Auxiliary Rotating fields
First surface may be connected to a few support column, so that reagentia Rotating fields is suspended and is arranged at groove
On, auxiliary Rotating fields the second surface with respect to first surface on have multiple island and
Depressed area, has multiple flutings in depressed area.Reagentia layer is arranged in auxiliary Rotating fields simultaneously
Exposed by multiple flutings.The first metal layer is formed on auxiliary Rotating fields and passes through multiple flutings
Electrical contact reagentia layer.Second metal layer is formed on annular platform.
Preferably, auxiliary Rotating fields comprise heat absorbing layer and protective layer, and reagentia layer can be
Thermoelectricity resistance layer, is formed between heat absorbing layer and protective layer in thermoelectricity resistance layer, and multiple fluting
Pierce through the protection layer.
Preferably, auxiliary Rotating fields comprise the first heat absorbing layer and the second heat absorbing layer, reaction
Active layer can be thermoelectricity resistance layer, and thermoelectricity resistance layer is formed at the first heat absorbing layer and the second heat absorption
Between layer, and multiple fluting penetrates the second heat absorbing layer.
Brief description
The above and other feature of the application and advantage will describe its example in detail by referring to accompanying drawing
The property shown embodiment and become more apparent from, wherein：
Fig. 1 is for the of the manufacture method of the cover body structure of chip package according to the application
The flow chart of one embodiment.
Fig. 2A to Fig. 2 J is the manufacturer according to the application for the cover body structure of chip package
The schematic diagram of each step of the first embodiment of method.
Fig. 3 is the part of the first embodiment of method for packing surveying assembly according to the temperature of the application
Flow chart.
Fig. 4 A to Fig. 4 B is the first embodiment of method for packing of the temperature survey assembly of the application
Partial schematic diagram.
Fig. 5 is for the of the manufacture method of the cover body structure of chip package according to the application
The flow chart of two embodiments.
Fig. 6 A to Fig. 6 J is the portion of the second embodiment of method for packing of temperature survey assembly of the application
Divide schematic diagram.
Fig. 7 is the top view of the first embodiment of cover body structure of the application.
Fig. 8 is the top view of the other embodiments of cover body structure of the application.
Fig. 9 is the top view of the other embodiments of cover body structure of the application.
Description of reference numerals
10、70：Cover plate
11：Encapsulating structure pattern
12、712：Island
13、713：Annular platform
131：Suspension structure
15：Etching protection zone
16：First surface
17：Groove
19：Expendable material
20：Heat absorbing layer structure
21：Fluting
22、23：Heat absorbing layer
30：Thermoelectricity resistance layer
40：The first metal layer
41：Second metal layer
42：Protective layer
50：Wears groove
51：Groove void
52、72：Support column
60：Substrate
61：Chip
62：Electrical pickoff
63：Weld zone
AA’：Hatching
S10～S16：Steps flow chart
Specific embodiment
In this use, vocabulary "and/or" comprises any or all of one or more related bar list of items
Combination.When the narration prefix of " at least one " is before bill of component, modify whole manifest component
And the individual elements in non-modified inventory.
Refering to Fig. 1 and Fig. 2A to Fig. 2 J, it is respectively and is sealed for chip according to the application
The flow chart of the first embodiment of the manufacture method of cover body structure of dress and the showing of each step
It is intended to.In figure, manufacture method comprises the steps of.Step S10 provides cover plate 10, and it the
Multiple encapsulating structure patterns 11 are had on one surface 16, each encapsulating structure pattern 11 can comprise
Multiple island 12 and annular platform (bonding ring) 13, as shown in Figure 2 A.
In step S11, cover plate 10 forms multiple etching protection zone 15 to limit island
Body support column and annular platform weld zone, as shown in Figure 2 B.In enforcement, can be in certain bits
Put implantation and ooze the material that miscellaneous (doping) can suppress etch-rate, be consequently formed etching protection zone
Domain 15.
In step S12, heat absorbing layer structure 20 is formed on encapsulating structure pattern 11 and (asks for an interview
Fig. 2) and reagentia layer.In enforcement, reagentia layer is arranged at heat absorbing layer structure 20
Between.And reagentia layer can comprise photoelectric conversion layer, burnt material layer or thermoelectricity resistance layer.
To illustrate using thermoelectricity resistance layer 30 as the citing of reagentia layer in this embodiment.
Heat absorbing layer structure 20 can be realized with multiple examples, and the first example such as Fig. 2 B is to figure
Shown in 2F, first the first heat absorbing layer 22 is formed on cover plate 10, then in the first heat absorbing layer
Form thermoelectricity resistance layer 30 on 22, then thermoelectricity resistance layer 30 is etched, is only retained in island
It is defined to the thermoelectricity resistance layer 30 in pixel region between body 12.Then, in the first heat absorbing layer
22 and thermoelectricity resistance layer 30 on form the second heat absorbing layer 23, the second heat absorbing layer 23 covers
Thermoelectricity resistance layer 30, thus to complete heat absorbing layer structure 20.
It is also possible to there be the protective layer of protected effect to replace the second heat absorbing layer in other examples
23, to buffer stress.Additionally, protective layer also can have the function of absorbing heat simultaneously.In other
In example, the first heat absorbing layer 22, the second heat absorbing layer 23 or protective layer can have monolayer
Structure or multiple structure, can collocation design according to need.
In enforcement, heat absorbing layer can be formed using silicon nitride (SixNy), and protective layer can make
To be formed with silicon dioxide (SiO2), thermoelectricity resistance layer can use vanadium oxide (VOx) or non-
Brilliant (a-Si).
In step S13, etch heat absorbing layer structure 20 to produce multiple flutings 21, each
Fluting 21 exposure thermoelectricity resistance layer 30, as shown in Figure 2 G.Then, in step S14, in heat
Form the first metal layer 40 on absorbent layer structure 20 and island 12, and in ring-shaped flat
Second metal layer 41 is formed on platform 13.The first metal layer 40 passes through the electrical contact of multiple fluting 21
Thermoelectricity resistance layer 30, as illustrated in figure 2h.In enforcement, the first metal layer 40 and second metal layer
41 can be same metal or different metal；Additionally, the first metal layer 40 or the second metal
Layer 41 can be single layer structure or multiple structure.Preferably, the first metal layer 40 and the second gold medal
Belong to and can form protective layer 42 further on layer 42, protective layer 42 only exposes the first metal layer 40
And second metal layer 42, as the follow-up part electrically connecting with chip with ring-type welding.
Additionally, also can have the first metal layer 40 on annular platform 13, but the first metal layer 40
Below second metal layer 41.In enforcement, the first metal layer 40 and second metal layer 41
On be further added by forming other protective layers, with avoid metal aoxidize.
In step S15, multiple wears grooves 50, multiple wears grooves are formed on encapsulating structure pattern 11
50 exposure cover plates 10.As shown in figure 2i, wears groove 50 passes through heat absorbing layer structure 20 and heat
Resistive layer 30.
By multiple wears grooves 50, cover plate 10 is etched in step s 16, with heat absorption
Rotating fields 20 groove void 51 formed below, and multiple etching protection zone 15 forms multiple supports
Post 52, as shown in fig. 2j, the cover body structure being completed is suspension structure.
Refer to Fig. 3 and Fig. 4 A to Fig. 4 B, it surveys the encapsulation of assembly according to the temperature of the application
The partial process view of the first embodiment of method.This flow process is connected in step S10 to step S17
Manufactured cover body structure.
In step S31, provide substrate 60, and substrate 60 comprises multiple chips 61, Duo Ge electricity
Contact point 62, and multiple weld zone 63, as shown in Figure 4 A.In enforcement, substrate 60
Chip 61 can read circuit design chips (Read act integrate circuit), chip for signal
Metallic reflector can be provided with it is preferable that can be thin metallic reflector on 61.
In step S32, in a vacuum by the first surface 16 of cover body structure towards chip 61 with
Cover substrate 60, and multiple island 12 corresponds to electrical pickoff 62, annular platform 13 is corresponding
At least one weld zone 63.Then, and by the first metal layer 40 in island 12 and electricity
Contact point 62 mutually welds, by the second metal layer 41 on annular platform 13 and at least one weldering
Meet area 63 mutually to weld, as shown in Figure 4 B, to form chip-packaging structure.In enforcement, thermoelectricity
The gap length that resistance layer 30 arrives the reflecting layer of upper surface of chip 61 is ultrared by being detected
1/4 wavelength.
Additionally, in the prior art, chip is formed together with suspension structure, cut again afterwards and
It is put in ceramic groove seat, so getter (getter) can be only placed at lid or ceramic groove seat.
But in the method for packing of the application, getter may be formed at the surface of chip 61, or
The medial surface of cover body structure, and then increase possible installation space.
So, thermoelectricity resistance layer 30, metal level 40 are overall formation of deposits on cover plate 10,
Without welding/gluing.
With respect to traditional method for packing, the method for packing of the application is by lid and suspension structure one
Rise and make wafer scale lid, more directly by the encapsulation lid of wafer scale, be welded in and be provided with chip
On substrate, so not needing carrier just can be packaged, can effectively reduce package area and body
Long-pending it is therefore desirable to the volume of evacuation is smaller, can be greatly improved evacuation efficiency and
Encapsulated vacuum degree.
Additionally, in prior art, chip and suspension structure are together formed on substrate, but
In the method for packing of the application, chip is formed separately with suspension structure, therefore can each carry out
Processing procedure optimizes, and can also reduce the impact between the material condition being used each other simultaneously.For example,
In the prior art, it is initially formed chip and then re-forms suspension structure, in order to avoid chip is outstanding
Damage because of high temperature in the processing procedure of floating structure, the process temperatures of therefore suspension structure are limited to core
Piece can bearing temperature, so the manufacturing method thereof that can select just is restricted.And in this application,
Chip is formed separately with suspension structure, can avoid impact each other, so may be selected more kinds of outstanding
The manufacturing method thereof of floating structure, improves the yield of suspension structure further.
Another advantage that chip and suspension structure are formed separately is to avoid chip and the knot that suspends
The yield of structure affects one another.In the prior art, in chip and suspension structure, one of them is broken
Then can not use all over；If separately manufactured it might even be possible to collocation pedestal chip and cover plate substrate
Pairing yield to improve the overall yield of chip package.
For example, when chip and suspension structure are with forming on substrate, due to suspension structure
Process temperatures be limited to chip can bearing temperature, so the processing procedure that can select is limited, add core
In piece and suspension structure, one of them is broken, and can not use all over, it is assumed that the yield of chip
For 90%, and suspension structure is only capable of the processing procedure using yield 60%, then overall possible yield is
54% (i.e. 90%*60%)；But, if be formed separately, suspension structure may be selected good
The processing procedure of rate 80%, then the yield of chip of arranging in pairs or groups is 90%, thus the yield of entirety have an opportunity can
To bring up to 72%, if selecting the higher processing procedure of yield respectively, overall yield is then expected to reach
More than 80%.
Refer to Fig. 5 and Fig. 6 A to Fig. 6 J, it illustrates sealing for chip of the application respectively
The flow chart of the second embodiment of the manufacture method of cover body structure of dress, and partial schematic diagram.
Second embodiment is with the Main Differences of first embodiment, step in second embodiment
S80 provides cover plate 70, and it has groove 77, has multiple support column arrangement 72 in groove 77,
As shown in Figure 6A.Then in step S81, groove 77 is inserted expendable material 19 and goes forward side by side
Row etching, to form multiple encapsulating structure patterns 71, each encapsulating structure pattern 71 can wrap
Containing multiple island 712 and annular platform 713, as shown in 6B figure.
Then, step S82 is to step S12 of step S84 and first embodiment to step S14
Similar, therefore will not be described here.And the explanation of Fig. 6 C to Fig. 6 H also refer to the first enforcement
The explanation of example.
In step S85, multiple wears grooves 50, multiple wears grooves are formed on encapsulating structure pattern 71
50 exposure expendable materials 19.Then in step S86, by multiple wears groove 50 to expendable material
19 are etched, and expendable material 19 etching is removed, and below heat absorbing layer structure 20
Form groove void 51 and retain multiple support column arrangement, thus heat absorbing layer structure 20 suspends
It is supported on cover plate 70, to form cover body structure.
As for second embodiment cover body structure be covered in follow-up encapsulation flow process on chip all with
First embodiment is identical, therefore will not be described here.
Refer to Fig. 7, it is the top view of the first embodiment of cover body structure of the application.Figure
Multiple suspension structures 131 can once be formed on middle display cover body structure, and each suspension structure
131 all by 13 cinctures of annular platform, and the position corresponding to each pixel of chip 61,
And no encapsulate wall between each suspension structure 131.And Fig. 2A to Fig. 2 J, and Fig. 6 A is to figure
6J is along Fig. 7 section line AA ' acquired.
Refer to the top view of the other embodiments of cover body structure that Fig. 8 is the application.In figure,
Multiple suspension structures 131 are also formed with the cover body structure of the application, and each suspension structure 131
Each pixel being designed for sensing chip 61 has corresponding suspension structure 131,
And between different pixels, share annular platform 13.So, the resolution of pixel can be lifted, and
Simplify the processing procedure making needed for indivedual annular platforms 13.
Fig. 9 example is the top view of the other embodiments of the cover body structure of the application.In figure, this Shen
Multiple suspension structures 131 are had on cover body structure please, each suspension structure 131 is designed for passing
Each group of pixel of sense chip 61 has corresponding suspension structure and annular platform 13, and
Each group of encapsulating structure can be formed by the array of multiple pixels.So, in each array of pixels,
Even if the vacuum having the sealing space of several pixels declines, do not interfere with other pixels, that is, yet
Make the pixel that vacuum declines have error to ultrared sensed values, still can use pixel about
Sensed values are estimated so that the overall sensed image data of temperature survey chip can present is not subject to shadow to compensate
Ring.Herein, respectively comprise four pixels in each group array of pixels, and each group pixel share encapsulation wall,
But it is not limited, in array of pixels, the quantity of pixel can design according to user demand.
Specific embodiment proposed in the detailed description of preferred embodiment is only said in order to convenient
The technology contents of bright the application, rather than the application is narrowly limited to above-described embodiment, not
Beyond the situation of spirit herein and the scope of the claims, the many variations done are real
Apply, come under scope of the present application.
Claims (13)
1. a kind of temperature surveys the method for packing of assembly it is characterised in that methods described comprises：
Cover plate is provided, the first surface of described cover plate has multiple encapsulating structure patterns, each
The plurality of encapsulating structure pattern comprises multiple island and annular platform (bonding ring)；
Form multiple etching protection zones in described cover plate；
Heat absorbing layer structure and thermal resistance are formed on each the plurality of encapsulating structure pattern
Layer；
Etch described heat absorbing layer structure and expose described to produce multiple flutings, the plurality of fluting
Thermoelectricity resistance layer；
The first metal layer formed on described heat absorbing layer structure and described island, described the
One metal level makes electrical contact with described thermoelectricity resistance layer by the plurality of fluting；
Second metal layer is formed on described annular platform；
Multiple wears grooves are formed on described encapsulating structure pattern, the plurality of wears groove exposes described lid
Plate；
By the plurality of wears groove, described cover plate is etched, with described heat absorbing layer structure
Groove void formed below, and multiple support columns are formed by the plurality of etching protection zone；
Substrate is provided, and forms chip, multiple electrical pickoff over the substrate, and at least
Weld zone；And
In a vacuum by the described first surface of described cover plate towards described chip, cover described lining
Bottom, the described the first metal layer in the plurality of island is welded with the plurality of electrical pickoff phase
Connect, and by the described second metal layer on described annular platform and at least one weld zone described
Mutually weld.
2. method for packing according to claim 1 is it is characterised in that described heat absorption
Rotating fields comprise heat absorbing layer and protective layer, are formed at described heat absorption in described thermoelectricity resistance layer
On layer, and described protective layer is formed in described thermoelectricity resistance layer, and described method for packing is further
Comprise to etch described protective layer to produce the plurality of fluting.
3. method for packing according to claim 1 is it is characterised in that described heat absorption
Rotating fields comprise the first heat absorbing layer and the second heat absorbing layer, and described thermoelectricity resistance layer is formed at institute
State between the first heat absorbing layer and described second heat absorbing layer, and described method for packing is further
Comprise to etch described second heat absorbing layer to produce the plurality of fluting.
4. a kind of temperature surveys the method for packing of assembly it is characterised in that methods described comprises：
There is provided cover plate, described cover plate has groove, has multiple support column arrangement in described groove；
Insert expendable material and be etched in described groove, to form multiple encapsulating structure figures
Case, each the plurality of encapsulating structure pattern comprises multiple island and annular platform；
Heat absorbing layer structure and thermoelectricity resistance layer are formed on described encapsulating structure pattern；
Etch described heat absorbing layer structure and expose described to produce multiple flutings, the plurality of fluting
Thermoelectricity resistance layer；
The first metal layer, described gold are formed on described heat absorbing layer structure and described island
Belong to layer and described thermoelectricity resistance layer is made electrical contact with by the plurality of fluting；
Second metal layer is formed on described annular platform；
Multiple wears grooves are formed on described encapsulating structure pattern, the plurality of wears groove exposes described sacrificial
Domestic animal material；
By the plurality of wears groove, described expendable material is etched, with described heat absorbing layer
Structure groove void formed below and the plurality of support column arrangement of reservation；
Substrate is provided, and setting chip, multiple electrical pickoff over the substrate, and at least
One weld zone；And
One surface of the plurality of encapsulating structure pattern will be had in a vacuum on described cover plate
Towards described chip, cover described substrate, and by described first gold medal in the plurality of island
Belong to layer to weld with described electrical pickoff phase, and by described second metal on described annular platform
Layer and at least one weld zone phase welding described.
5. method for packing according to claim 4 is it is characterised in that described heat absorption
Rotating fields comprise heat absorbing layer and protective layer, are formed at described heat absorption in described thermoelectricity resistance layer
On layer, and described protective layer is formed in described thermoelectricity resistance layer, and described method for packing is further
Comprise to etch described protective layer to produce the plurality of fluting.
6. method for packing according to claim 4 is it is characterised in that described heat absorption
Rotating fields comprise the first heat absorbing layer and the second heat absorbing layer, and described thermoelectricity resistance layer is formed at institute
State between the first heat absorbing layer and described second heat absorbing layer, and described method for packing is further
Comprise to etch described second heat absorbing layer to produce the plurality of fluting.
7. a kind of manufacture method of the cover body structure for chip package is it is characterised in that institute
The method of stating comprises：
Cover plate is provided, the first surface of described cover plate has multiple encapsulating structure patterns, each
The plurality of encapsulating structure pattern comprises multiple island and annular platform；
Form multiple etching protection zones in described cover plate；
Auxiliary Rotating fields and reagentia layer are formed on described encapsulating structure pattern；
To produce multiple flutings, the plurality of fluting exposes described anti-etching described auxiliary Rotating fields
Answer active layer；
Formation the first metal layer on described auxiliary Rotating fields and described island, described first
Metal level makes electrical contact with described reagentia layer by the plurality of fluting；
Second metal layer is formed on described annular platform；
Multiple wears grooves are formed on described encapsulating structure pattern, the plurality of wears groove exposes described lid
Plate；And
By the plurality of wears groove, described cover plate is etched, with described auxiliary Rotating fields
Groove void formed below, and the plurality of etching protection zone forms multiple support columns, thus with shape
Become described cover body structure.
8. a kind of manufacture method of the cover body structure for chip package is it is characterised in that institute
The method of stating comprises：
There is provided cover plate, described cover plate has groove, has multiple support column arrangement in described groove；
Insert expendable material and be etched in described groove, to form multiple encapsulating structure figures
Case, each the plurality of encapsulating structure pattern comprises multiple island and annular platform；
Auxiliary Rotating fields and reagentia layer are formed on described encapsulating structure pattern；
To produce multiple flutings, the plurality of fluting exposes described anti-etching described auxiliary Rotating fields
Answer active layer；
Formation the first metal layer on described auxiliary Rotating fields and described island, described first
Metal level makes electrical contact with described reagentia layer by the plurality of fluting；
Second metal layer is formed on described annular platform；
Multiple wears grooves are formed on described encapsulating structure pattern, the plurality of wears groove exposes described sacrificial
Domestic animal material；And
By the plurality of wears groove, described expendable material is etched, with described auxiliary layer knot
Structure groove void formed below and the plurality of support column arrangement of reservation, thus to form described lid
Structure.
9. the manufacture method according to claim 7 or 8 is it is characterised in that described auxiliary
Rotating fields are helped to comprise heat absorbing layer and protective layer, described reagentia layer is thermoelectricity resistance layer,
Described thermoelectricity resistance layer is formed between described heat absorbing layer and described protective layer, and the plurality of
Fluting penetrates described protective layer.
10. the manufacture method according to claim 7 or 8 is it is characterised in that described auxiliary
Rotating fields are helped to comprise the first heat absorbing layer and the second heat absorbing layer, described reagentia layer is heat
Resistive layer, described thermoelectricity resistance layer is formed at described first heat absorbing layer and described second heat absorption
Between layer, and the plurality of fluting penetrates described second heat absorbing layer.
A kind of 11. cover body structures for encapsulation are it is characterised in that described cover body structure comprises：
Cover plate, tool is by groove, and has at least one support column and ring-shaped flat in described groove
Platform；
Auxiliary Rotating fields, the first surface of described auxiliary Rotating fields connects at least one support described
Post, makes described reagentia Rotating fields suspend and is arranged on described groove, described auxiliary Rotating fields
The second surface with respect to described first surface on there is multiple island and depressed area,
Multiple flutings are had in described depressed area；
Reagentia layer, is arranged in described auxiliary Rotating fields and sudden and violent by the plurality of fluting institute
Dew；
The first metal layer, is formed on described auxiliary Rotating fields and is connect by the plurality of fluting electricity
Touch described reagentia layer；And
Second metal layer, is formed on described annular platform.
12. according to claim 11 for encapsulation cover body structures it is characterised in that
Described auxiliary Rotating fields comprise heat absorbing layer and protective layer, and described reagentia layer is thermal resistance
Layer, is formed between described heat absorbing layer and described protective layer in described thermoelectricity resistance layer, and institute
State multiple flutings and penetrate described protective layer.
13. according to claim 11 for encapsulation cover body structures it is characterised in that
Described auxiliary Rotating fields comprise the first heat absorbing layer and the second heat absorbing layer, described reagentia
Layer is thermoelectricity resistance layer, and described thermoelectricity resistance layer is formed at described first heat absorbing layer and described second
Between heat absorbing layer, and the plurality of fluting penetrates described second heat absorbing layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW104127576 | 2015-08-24 | ||
| TW104127576A TWI561799B (en) | 2015-08-24 | 2015-08-24 | Packaging method, cover structure of temperature sensing element and method for fabricating the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106486385A true CN106486385A (en) | 2017-03-08 |
Family
ID=58227288
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510582194.5A Pending CN106486385A (en) | 2015-08-24 | 2015-09-14 | Packaging method of temperature measurement assembly, cover body structure and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN106486385A (en) |
| TW (1) | TWI561799B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0964251A (en) * | 1995-08-25 | 1997-03-07 | Sony Corp | Semiconductor device |
| CN1391280A (en) * | 2001-06-11 | 2003-01-15 | 松下电器产业株式会社 | Electronic device and manufacture thereof |
| CN102077577A (en) * | 2008-10-28 | 2011-05-25 | 松下电器产业株式会社 | Image pickup unit |
| CN203967072U (en) * | 2014-07-16 | 2014-11-26 | 佳霖科技股份有限公司 | For temperature, survey the wafer level packaging structure of assembly |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW408495B (en) * | 1998-12-09 | 2000-10-11 | Shie Jeng Shiung | Vacuum package method of the infrared microsense device |
| US7180064B2 (en) * | 2003-07-24 | 2007-02-20 | Delphi Technologies, Inc. | Infrared sensor package |
| CN101691200B (en) * | 2009-09-29 | 2012-07-18 | 中国科学院上海微系统与信息技术研究所 | Low temperature vacuum encapsulation structure of non-refrigeration infrared detector and manufacturing method thereof |
-
2015
- 2015-08-24 TW TW104127576A patent/TWI561799B/en not_active IP Right Cessation
- 2015-09-14 CN CN201510582194.5A patent/CN106486385A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0964251A (en) * | 1995-08-25 | 1997-03-07 | Sony Corp | Semiconductor device |
| CN1391280A (en) * | 2001-06-11 | 2003-01-15 | 松下电器产业株式会社 | Electronic device and manufacture thereof |
| CN102077577A (en) * | 2008-10-28 | 2011-05-25 | 松下电器产业株式会社 | Image pickup unit |
| CN203967072U (en) * | 2014-07-16 | 2014-11-26 | 佳霖科技股份有限公司 | For temperature, survey the wafer level packaging structure of assembly |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201708798A (en) | 2017-03-01 |
| TWI561799B (en) | 2016-12-11 |
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