CN106484360B - Similarity detection apparatus - Google Patents
Similarity detection apparatus Download PDFInfo
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- CN106484360B CN106484360B CN201510542916.4A CN201510542916A CN106484360B CN 106484360 B CN106484360 B CN 106484360B CN 201510542916 A CN201510542916 A CN 201510542916A CN 106484360 B CN106484360 B CN 106484360B
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Abstract
The embodiment of the present invention provides a kind of similarity detection apparatus, time delay is carried out by the counter of detection unit, the clock cycle of the delay of different series of operations is different, when the count value of counter reaches the clock cycle of delay, detection unit exports high level by the corresponding output circuit of the series of operations, since the clock cycle of the delay of each series of operations is different, therefore the time of the input signal of each detection unit is also different, when each detection unit has an input to become high level, illustrate that the delay from initial detecting unit to the detection unit is minimum, the input terminal for becoming high level first of passage path module record is it can be concluded that the clock cycle that each detection unit postpones, to obtain the similarity of two sequences according to the clock period time of each detection unit delay.Described device indicates the similarity of two sequences by the clock cycle, causes weight is excessive to cause the problem of overflowing so as to avoid weight in the prior art is cumulative.
Description
Technical field
The present embodiments relate to the communication technology more particularly to a kind of similarity detection apparatus.
Background technique
Whether two sequences are similar usually to be measured with sequence similarity, and a sequence is turned by a series of " series of operations "
It is changed to another sequence, it is clear that required " operation cost " is smaller, and sequence similarity is higher.The process of sequence similarity is sought,
It is in fact exactly the process for asking minimum " operation cost ".The similarity of i.e. two sequences is a series of equal to one of sequence is passed through
" series of operations " is converted to the minimum " operation cost " of another sequence.Series of operations include " insertion ", " deletion ", " replacement ", "
With " etc. operation, operation cost be various series of operations quantitative criteria.
The relevant technologies use the similarity of the similarity detection apparatus sequence of calculation, which includes multiple inspections
Unit is surveyed, each detection unit at least needs three registers, three adders and a comparator.Wherein, comparator is used for
The accumulative weight of three inputs of detection unit is compared, the smallest accumulative weight is selected, adder is used for this most
The weight that " insertion ", " deletion ", " replacement " of small accumulative weight with the detection unit operate is added, and will add up result
It is sent respectively to three and is exported, register is used to save the accumulative weight of three output of the detection unit.
Since weight is added up by multiple detection unit level-one level-ones, may cause to overflow in the presence of cumulative weight is excessive,
So that result fails.
Summary of the invention
The embodiment of the present invention provides a kind of similarity detection apparatus, to overcome what similarity in the prior art overflowed to ask
Topic, it is ensured that the correctness of similarity detection structure.
First aspect present invention provides a kind of similarity detection apparatus, comprising:
M × N number of detection unit, the M × N number of detection unit form the array of M row N column, each detection unit packet
Include: the first OR circuit, counter, selecting module, three output circuits and path logging modle, N and M are to be greater than or equal to
2 positive integer；
Wherein, first OR circuit includes three input terminals and an output end, three input terminals are as follows: left defeated
Enter end, lower-left input terminal and lower input terminal, three output circuits are as follows: right output circuit, upper right output circuit and upper output
Circuit, the left input terminal of first OR circuit are connect with the right output circuit of left detection unit, first OR circuit
Lower-left input terminal connect with the upper right output circuit of lower-left detection unit, the lower input terminal of first OR circuit and lower inspection
The upper output circuit connection of unit is surveyed, three input terminals of first OR circuit also connect with the path logging modle respectively
It connects, the output end of first OR circuit is connect with the input terminal of the counter, and the path logging modle is for recording
The input terminal of input high level first in three input terminals of first OR circuit；
The output end of the counter is connect with the input terminal of the selecting module, and the maximum value of the counter is greater than three
The maximum value of the weight of kind series of operations, the weight of the series of operations is used to indicate the cost of corresponding series of operations, described
The weight of each series of operations is the value of the counter；
Three output ends of the selecting module respectively with the right output circuit, the upper right output circuit and it is described on
Output circuit connection, the selecting module further includes two control terminals, and the input signal of described two control terminals is compared
The character of two sequences, the right output circuit are connect with the left input terminal of right detection circuit, the upper right output circuit and the right side
The lower-left input circuit of upper detection circuit connects, and the upper output circuit is connect with the lower input terminal of upper detection circuit；
When the input of any one input terminal of three input terminals of first OR circuit is high level, described the
One OR circuit exports high level, and the path logging modle records defeated first in three input terminals of first OR circuit
Enter the input terminal of the high level, the counter starts counting, described when the output of the counter is the first count value
First output end of selecting module exports the high level, and the right output circuit exports and keeps the high level, when described
When the output of counter is the second count value, the second output terminal of the selecting module exports the high level, and the upper right is defeated
Circuit output and the high level is kept out, when the output of the counter is third count value, the of the selecting module
Three output ends are the high level, and the upper output circuit exports and keeps the high level.
With reference to first aspect, in the first possible implementation of the first aspect, the selecting module includes: decoding
Device, multiple selector；
The output end of the counter is connect with the input terminal of the decoder；
The decoder includes multiple output ends, and the first output end of the decoder is connect with the right output circuit,
Multiple second output terminals of the decoder are connect with multiple input terminals of the multiple selector respectively, the multiple selector
Output end connect with the upper right output circuit, the third output end of the decoder is connect with the upper output circuit；
When the output of the counter is first count value, first count value is translated as by the decoder
First one-hot encoding, the decoder export high level from the first output end of the decoder according to first one-hot encoding, when
When the output of the counter is second count value, second count value is translated as second only heat by the decoder
Code, the decoder are described high electric from the corresponding second output terminal output of second one-hot encoding according to second one-hot encoding
Flat, the character and second one-hot encoding corresponding second that the multiple selector is inputted according to described two control terminals export
The high level for holding output exports the high level from the output end of the multiple selector, when the output of the counter
When for the third count value, the third count value is translated as third one-hot encoding by the decoder, the decoder according to
The third one-hot encoding exports the high level from the third output end of the decoder；
The second output terminal of the selecting module exports the high level, and the upper right output circuit exports and keeps described
High level, when the output of the counter is third count value, the third output end of the selecting module is the high level,
The upper output circuit exports and keeps the high level.
With reference to first aspect, in the second possible implementation of the first aspect, the right output circuit includes:
Two OR circuits and the first AND gate circuit, second OR circuit include two input terminals and an output end, described first
AND gate circuit includes two input terminals and an output end, an input terminal and the selecting module of second OR circuit
The connection of the first output end, the output end of another input terminal of second OR circuit and first AND gate circuit connects
It connects, an input of the left input terminal, first AND gate circuit of the output end and left detection unit of second OR circuit
End connection, another input termination high level of first AND gate circuit；
The upper right output circuit includes: third OR circuit and the second AND gate circuit, and the third OR circuit includes
Two input terminals and an output end, second AND gate circuit include two input terminals and an output end, the third or
One input terminal of gate circuit is connect with the second output terminal of the selecting module, another input of the third OR circuit
End is connect with the output end of second AND gate circuit, the output end of the third OR circuit and the lower-left of lower-left detection unit
The input terminal connection of input terminal, second AND gate circuit, another high electricity of input termination of second AND gate circuit
It is flat；
The upper output circuit includes: the 4th OR circuit and third AND gate circuit, and the 4th OR circuit includes two
A input terminal and an output end, the third AND gate circuit include two input terminals and an output end, and the described 4th or door
One input terminal of circuit is connect with the third output end of the selecting module, another input terminal of the 4th OR circuit
It is connect with the output end of the third AND gate circuit, the output end of the 4th OR circuit and the lower input of lower detection unit
One input terminal connection at end, the third AND gate circuit, another input termination high level of the third AND gate circuit.
The possible implementation of with reference to first aspect the first, in the third possible implementation of first aspect
In, the right output circuit includes: the second OR circuit and the first AND gate circuit, and second OR circuit includes two inputs
End and an output end, first AND gate circuit include two input terminals and an output end, second OR circuit
One input terminal is connect with the first output end of the decoder, another input terminal of second OR circuit and described the
The output end of one AND gate circuit connects, the left input terminal of the output end of second OR circuit and left detection unit, described the
One input terminal of one AND gate circuit connects, another input termination high level of first AND gate circuit；
The upper right output circuit includes: third OR circuit and the second AND gate circuit, and the third OR circuit includes
Two input terminals and an output end, second AND gate circuit include two input terminals and an output end, the third or
One input terminal of gate circuit is connect with the output end of the multiple selector, another input terminal of the third OR circuit
It is connect with the output end of second AND gate circuit, the output end of the third OR circuit and the lower-left of lower-left detection unit are defeated
Enter the input terminal connection at end, second AND gate circuit, another input termination high level of second AND gate circuit；
The upper output circuit includes: the 4th OR circuit and third AND gate circuit, and the 4th OR circuit includes two
A input terminal and an output end, the third AND gate circuit include two input terminals and an output end, and the described 4th or door
One input terminal of circuit is connect with the third output end of the decoder, another input terminal of the 4th OR circuit with
The output end of the third AND gate circuit connects, the lower input terminal of the output end of the 4th OR circuit and lower detection unit,
One input terminal of the third AND gate circuit connects, another input termination high level of the third AND gate circuit.
With reference to first aspect, any one of the first of first aspect into the third possible implementation,
In 4th kind of possible implementation of one side, the similarity detection apparatus further include: similarity calculation module, the phase
It is connect respectively with the path logging modle of each detection unit like degree computing module；
The similarity calculation module, the road of all detection units for being passed through according to two compared sequences
Diameter logging modle records the minimum weight as a result, all detection units that determining two compared sequences are passed through, will
The minimum weight for all detection units that two compared sequences are passed through is added to obtain two compared sequences
Similarity.
With reference to first aspect, any one of the first of first aspect into the third possible implementation,
In 5th kind of possible implementation of one side, the similarity detection apparatus further include: path calculation module, the path
Computing module is connect with the path logging modle of each detection unit respectively；
The path calculation module, the path of all detection units for being passed through according to two compared sequences
For the record of logging modle as a result, determining propagation path, the propagation expression will be to be compared in two compared sequences
Sequence is converted into the series of operations that reference sequences are passed through.
With reference to first aspect, any one of the first of first aspect into the third possible implementation,
In 6th kind of possible implementation of one side, the similarity detection apparatus further include: common subsequence determining module, institute
Common subsequence determining module is stated to connect with the path logging modle of each detection unit respectively；
The common subsequence determining module, all detection units for being passed through according to two compared sequences
Path logging modle record as a result, determining the maximum number of continuous matching operation, the continuous matching operation is most
Maximum common subsequence of the big corresponding subsequence of number by two compared the sequence.
The similarity detection apparatus of the present embodiment carries out time delay, different sequence behaviour by the counter of detection unit
The clock cycle of the delay of work is different, and when the count value of counter reaches the clock cycle of delay, detection unit passes through the sequence
Column operate corresponding output circuit and export high level, and the signal of the output circuit of detection unit output is detected as next stage
The input signal of unit, since the clock cycle of the delay of each series of operations is different, the input letter of each detection unit
Number time it is also different, each detection unit has an input when become high level, illustrate from initial detecting unit to this
The delay of detection unit is minimum, and the input terminal for becoming high level first of passage path module record is it can be concluded that each detection is single
The clock cycle of member delay, to obtain the similarity of two sequences according to the clock period time that each detection unit postpones.
In the present embodiment, the similarity of two sequences is indicated by the clock cycle, is caused so as to avoid weight in the prior art is cumulative
Weight is excessive to cause the problem of overflowing.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Bright some embodiments for those of ordinary skill in the art without any creative labor, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the structural schematic diagram for the similarity detection apparatus that the embodiment of the present invention one provides；
Fig. 2 is a kind of structural schematic diagram for detection unit that the embodiment of the present invention one provides；
Fig. 3 is the connection schematic diagram of detection unit；
Fig. 4 is the schematic diagram of state machine；
Fig. 5 is a kind of structural schematic diagram of detection unit provided by Embodiment 2 of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
Fig. 1 is the structural schematic diagram for the similarity detection apparatus that the embodiment of the present invention one provides, as shown in Figure 1, this implementation
The similarity detection apparatus of the offer of example includes: M × N number of detection unit, and M × N number of detection unit forms the battle array of M row N column
Column, M and N are the positive integer more than or equal to 2, and M and N, which is equal to each rectangle frame in 16, Fig. 1, in Fig. 1 indicates a detection
Unit.
By taking example shown in FIG. 1 as an example, M and N are 16, and a M × N number of detection unit composition similarity is detected
Device at most can detecte the sequence that length is 15.As shown in Figure 1, the abscissa of similarity detection apparatus is reference sequences, indulge
Coordinate is sequence to be detected, and the length of reference sequences and sequence to be detected is all 15.The purpose of the present embodiment is by ordinate
Sequence is mapped on abscissa by sequence of operations, and intuitively indicated in figure be several from coordinate (0,0) to (15,
15) path, each path represent sequence of operations, and lateral arrows represent insertion operation in figure, and longitudinal arrow, which represents, deletes behaviour
Make, diagonal arrow represents matching or replacement operation.Obviously there is path as many items, therefore, using dynamic in the present embodiment
The method of state planning finds out shortest path.Dynamic programming algorithm is a kind of common algorithm solved the problems, such as, by asking complexity
Topic is gradually divided into a bit several simple subproblems, and level-one level-one solves backward, is finally completed entire problem.In Dynamic Programming
In algorithm, each subproblem can be only calculated only once, therefore reduce the number of calculating.In the present embodiment, by sequencing to be checked
Column and reference sequences are split according to character, and each detection unit is used to calculate the similarity of two characters, the two characters
One comes from sequence to be detected, another comes from reference sequences, may finally calculate the phase of sequence to be detected and reference sequences
Like degree.
Fig. 2 is a kind of structural schematic diagram for detection unit that the embodiment of the present invention one provides, as shown in Fig. 2, detection unit
Including 13, three the first OR circuit 11, counter 12, selecting module output circuits: right output circuit 14, upper right output circuit
15 and upper output circuit 16 and path logging modle 17.
Wherein, the first OR circuit 11 includes three input terminals and an output end, three input terminals are as follows: left input terminal,
Lower-left input terminal and lower input terminal, i.e., each detection unit include that there are three input terminal and three output ends.Fig. 3 is detection unit
Connection schematic diagram, as shown in figure 3, object detection unit shares eight adjacent detection units, according to eight detection units
Be known as eight detection units with the position of object detection unit: upper left detection unit, left detection unit, lower-left detection are single
First, lower detection unit, bottom right detection unit, right detection unit, upper right detection unit, upper detection unit.A left side for object element is defeated
Enter the input signal at end from left detection unit, the input signal of lower-left input terminal comes from lower-left detection unit, lower input terminal
Input signal comes from lower detection unit.Object detection unit is according to two characters compared, in the input of three input terminals
On the basis of add the corresponding weight of three kinds of series of operations, then respectively by the output of three output ends, object detection unit it is upper
The output signal of output circuit 16 has passed to upper output detection unit, and the output signal of upper right output circuit 15 has passed to the right side
Upper detection unit, the left input terminal for having outputed signal to right detection circuit of right output circuit 14.Here object detection unit is
Refer to the current detection unit for carrying out similarity-rough set.
Specifically, the right output circuit of the left input terminal of the first OR circuit 11 of object detection unit and left detection unit
14 connections, the lower-left input terminal of the first OR circuit 11 connect with the upper right output circuit 15 of lower-left detection unit, and first or door
The lower input terminal of circuit 11 is connect with the upper output circuit 16 of lower detection unit, and three input terminals of the first OR circuit 11 also divide
It is not connect with path logging modle 17, the output end of the first OR circuit 11 is connect with the input terminal of counter 12, path record
Module 17 is used to record in three input terminals of the first OR circuit 11 input terminal of input high level first.
The input terminal of counter 12 is connect with the output end of the first OR circuit 11, the output end and selection mould of counter 12
The input terminal of block 13 connects, and the purpose of counter 12 is to carry out time delay.In the present embodiment, there are three each detection unit tools
Input terminal and three output ends, therefore, each detection unit can calculate the weight of three kinds of series of operations, and series of operations can be with
Are as follows: output, insertion, replacement, matching etc. are merely illustrative here, and series of operations is not limited to above-mentioned cited.Every kind of sequence
Column operation has a weight, and the weight of series of operations is used to indicate the cost of series of operations, in various embodiments of the present invention, series of operations
Weight be counter 12 value, it is the time cycle that the value of counter 12 namely postpones, i.e., all by the time in the present embodiment
Phase indicates the cost of each series of operations.The maximum value of counter 12 is greater than the maximum value of the weight of three kinds of series of operations, for example, deleting
Except the weight of operation is 8, the weight of replacement operation is 4, the weight of insertion operation is 8, then the maximum value of counter 12 is greater than
8。
Selecting module 13 includes an input terminal, three output ends and two control terminal connections, the input of selecting module 13
For connecting with the output end of counter 12, three output ends of selecting module 13 are defeated with right output circuit 14, upper right respectively at end
Circuit 15 and upper output circuit 16 connect out, and the input signal of two control terminals is the character of two sequences compared.Target inspection
The right output circuit 14 for surveying unit is connect with the left input terminal of right detection circuit, upper right output circuit 15 and upper right detection circuit
The connection of lower-left input circuit, upper output circuit 16 are connect with the lower input terminal of upper detection circuit.Selecting module 13 is by based on
The count value of number device 12 exports high level by corresponding output circuit.In the present embodiment, each output circuit, which has, to be kept making
With once the input signal of i.e. output circuit becomes high level, the output signal of output circuit will be always maintained at high electricity
Flat, subsequent no matter the input signal of output circuit becomes high level or low level, and the output signal of output circuit all will not be again
It changes.This is because the count value of counter 12 is constantly in variation, and the input signal of output circuit can be with meter
The count value variation of number device 12, if output circuit is acted on without holding, the output signal of detection unit will change always, from
And cause path logging modle 17 that can not correctly record the minimum weight of each detection unit.
When the first OR circuit 11 exports high level, counter 12 is started counting.The purpose of counter 12 is to carry out
Time delay determines when three output circuits export high level by counter 12.When the output of counter 12 is the
When one count value, the first output end of selecting module 13 exports high level, and right output circuit 14 exports and keeps high level, works as meter
When the output of number device 12 is the second count value, the second output terminal of selecting module 13 exports high level, and upper right output circuit 15 is defeated
Out and high level is kept, when the output of counter 12 is third count value, the third output end of selecting module 13 is high level,
Upper output circuit 16 exports and keeps high level.If the corresponding insertion operation of right output circuit 14, upper output circuit 16 is corresponding to be deleted
Operation, the corresponding replacement operation of upper right output circuit 15, then the clock cycle of the first count value expression insertion operation delay, second
Count value indicates the clock cycle of delete operation delay, and third count value indicates the clock cycle of replacement operation delay.
Which output circuit first exports high level in three output circuits, then the output circuit for first exporting high level is corresponding
Series of operations be exactly the smallest operation of weight, i.e., operation the smallest operation of cost.Therefore, according to the output of each detection unit
The sequence of the output signal of circuit is assured that minimum weight, and the output signal of the output circuit of each detection unit is made
For the input signal of next stage detection unit, therefore, in the present embodiment, pass through the path logging modle 17 of every grade of detection unit
Record as a result, can be reversed release upper level detection unit output circuit output sequence.
For the example shown in Fig. 1, the lower-left input terminal of detection unit (0,0) is arrived to an input 1, and detection unit
Two characters that (0,0) is compared are respectively A and A, it is assumed that and the weight of replacement (matching) operation is 4, and insertion/deletion operation
Weight is 8, then the internal processing of unit (0,0) after testing, is passing through 4 clock cycle, upper right output becomes 1, and passes through
Spend 8 clock cycle, it is right output and it is upper output become 1, and so on level-one level-one calculate backward.And the calculation for passing through Dynamic Programming
Method seeks shortest path, need to be calculated forward by the last one detection unit (15,15), due to three inputs when each detection unit
When having one to become 1, " clock cycle " postponed from detection unit (0,0) to the detection unit must be all roads
It is least in diameter, and the signal of other two input terminals arrived a little later is by unimportant (or property of door).Therefore, final detection
First OR circuit 11 of unit (15,15) chooses minimum value for from the weight of adjacent three detection nodes, and similar at this time
The quantized value of the similarity for two sequences that total period of degree detection device delay, the as similarity detection apparatus are compared.
Meanwhile we can arrive the optimal of (15,15) from (0,0) to obtain one by the path logging modle 17 in element circuit
Path, output and input indicates that is output and input is high level for 1 here.
Optionally, path logging modle 17 can be realized with adoption status machine, and state machine is altogether there are four state: S0, S1, S2 and
S3, S0 indicate three input terminals of object detection unit without input high level, and S1 indicates that left input terminal inputs high electricity first
Flat, S2 indicates that lower-left input input high level first, S3 indicate lower input terminal input high level first.Fig. 4 is showing for state machine
It is intended to, as seen in Figure 4, the original state of state machine is S0, when left input terminal input high level first, state machine
State jumps to S1 from S0, and when upper left input terminal input high level first, the state of state machine jumps to S2 from S0, instantly defeated
When entering to hold input high level first, the state of state machine jumps to S3 from S0.When state machine state from S0 jump to S1, S2,
After S3, state machine receives any input, and state will not all jump again.Certainly, path logging modle 17 can also pass through it
He realizes mode, for example, being realized with register, which input terminal input high level first is stored by register, for example, with 00
Indicate left input terminal input high level first, use 01 indicates upper left input terminal input high level first, and use 10 respectively indicates down defeated
Enter end input high level first.
Optionally, right output circuit 14 includes: the second OR circuit and the first AND gate circuit, and the second OR circuit includes two
A input terminal and an output end, the first AND gate circuit include two input terminals and an output end, the one of the second OR circuit
A input terminal is connect with the first output end of selecting module 13, another input terminal and the first AND gate circuit of the second OR circuit
Output end connection, the left input terminal of the output end of the second OR circuit and left detection unit, one of the first AND gate circuit it is defeated
Enter end connection, another input termination high level of the first AND gate circuit.Upper right output circuit 15 include: third OR circuit and
Second AND gate circuit, third OR circuit include two input terminals and an output end, and the second AND gate circuit includes two inputs
End and an output end, an input terminal of third OR circuit are connect with the second output terminal of selecting module 13, third or door
Another input terminal of circuit is connect with the output end of the second AND gate circuit, and the output end of third OR circuit and lower-left detection are single
The input terminal connection of the lower-left input terminal, the second AND gate circuit of member, another high electricity of input termination of the second AND gate circuit
It is flat.Upper output circuit 16 includes: the 4th OR circuit and third AND gate circuit, and the 4th OR circuit includes two input terminals and one
A output end, third AND gate circuit include two input terminals and an output end, an input terminal and the choosing of the 4th OR circuit
The third output end connection of module 13 is selected, another input terminal of the 4th OR circuit and the output end of third AND gate circuit connect
It connecing, the output end of the 4th OR circuit is connect with an input terminal of the lower input terminal of lower detection unit, third AND gate circuit, the
Another input termination high level of three AND gate circuits.Certainly, output circuit can also be realized by other circuits, be here
It illustrates.
The similarity detection apparatus of the present embodiment carries out time delay, different sequence behaviour by the counter of detection unit
The clock cycle of the delay of work is different, and when the count value of counter reaches the clock cycle of delay, detection unit passes through the sequence
Column operate corresponding output circuit and export high level, and the signal of the output circuit of detection unit output is detected as next stage
The input signal of unit, since the clock cycle of the delay of each series of operations is different, the input letter of each detection unit
Number time it is also different, each detection unit has an input when become high level, illustrate from initial detecting unit to this
The delay of detection unit is minimum, and the input terminal for becoming high level first of passage path module record is it can be concluded that each detection is single
The clock cycle of member delay, to obtain the similarity of two sequences according to the clock period time that each detection unit postpones.
In the present embodiment, the similarity of two sequences is indicated by the clock cycle, is caused so as to avoid weight in the prior art is cumulative
Weight is excessive to cause the problem of overflowing.
Fig. 5 is a kind of structural schematic diagram of detection unit provided by Embodiment 2 of the present invention, the present embodiment and embodiment one
Difference be: selecting module 13 includes: decoder 131, multiple selector 132 in the present embodiment.
Correspondingly, the output end of counter 12 is connect with the input terminal of decoder 131, decoder 131 includes multiple outputs
End, the first output end of decoder 131 connect with right output circuit 14, multiple second output terminals of decoder 131 respectively with it is more
Multiple input terminals of road selector 132 connect, and the output end of multiple selector 132 is connect with upper right output circuit 15, decoder
131 third output end is connect with upper output circuit.
When the output of counter 12 is the first count value, the first count value is translated as the first one-hot encoding by decoder 131,
Decoder 131 exports high level from the first output end of decoder 131 according to the first one-hot encoding, when the output of counter 12 is the
When two count values, the second count value is translated as the second one-hot encoding by decoder 131, and decoder 131 is according to the second one-hot encoding from
The corresponding second output terminal of two one-hot encodings exports high level, character that multiple selector 132 is inputted according to two control terminals and
The high level of the corresponding second output terminal output of second one-hot encoding, exports high level from the output end of multiple selector 132, works as meter
When the output of number devices 12 is third count value, third count value is translated as third one-hot encoding by decoder 131, and 131, decoder
High level, the high electricity of second output terminal output of selecting module 13 are exported from the third output end of decoder 131 according to third one-hot encoding
Flat, upper right output circuit 15 exports and keeps high level, when the output of counter 12 is third count value, selecting module 13
Third output end is high level, and upper output circuit 16 exports and keeps high level.
Optionally, if right output circuit 14 includes: the second OR circuit 141 and the first AND gate circuit 142, second or door electricity
Road 141 includes two input terminals and an output end, and the first AND gate circuit 142 includes two input terminals and an output end, the
One input terminal of two OR circuits 141 is connect with the first output end of decoder 131, the second OR circuit 141 another
Input terminal is connect with the output end of the first AND gate circuit 142, and the output end of the second OR circuit 141 and a left side for left detection unit are defeated
Enter the input terminal connection at end, the first AND gate circuit 142, another input termination high level of the first AND gate circuit 142.It is right
Upper output circuit 15 includes: third OR circuit 151 and the second AND gate circuit 152, and third OR circuit 151 includes two inputs
End and an output end, the second AND gate circuit 152 include two input terminals and an output end, the one of third OR circuit 151
A input terminal is connect with the second output terminal of decoder 131, another input terminal of third OR circuit 151 and second with door electricity
The output end on road 152 connects, the lower-left input terminal of the output end of third OR circuit 151 and lower-left detection unit, second and door
One input terminal of circuit 152 connects, another input termination high level of the second AND gate circuit 152.Upper output circuit 16 wraps
Include: the 4th OR circuit 161 and third AND gate circuit 162, the 4th OR circuit 161 include two input terminals and an output
End, third AND gate circuit include two input terminals and an output end, the input terminal and decoder of the 4th OR circuit 161
131 third output end connection, another input terminal of the 4th OR circuit 161 and the output end of third AND gate circuit 162 connect
It connects, the output end of the 4th OR circuit 161 and the lower input terminal of lower detection unit, an input terminal of third AND gate circuit 162
Connection, another input termination high level of third AND gate circuit 162.
It is a kind of particular circuit configurations of selecting module 13 shown by the present embodiment, certainly, selecting module 13 may be used also
To be realized by other circuits, for example, using programmable logic device (programmable logic device, abbreviation PLD)
It realizes.
Various forms of results are selected for different concrete applications.For example, (1) is only relatively abstracted the similarity of sequence, I
Be only concerned total periodicity of propagation, if lower than it is anticipated that " threshold value ", to determine whether there is enough similarities.(2)
In fields such as speech recognitions, we will also be concerned about the sound sequence detected is what kind of series of operations to be mapped to ginseng by
Sequence is examined, we are concerned about specific propagation path at this time.(3) in bioinformatics or polymer chemistry, we are concerned about two sequences
The maximum common subsequence of column, to judge whether two DNA or molecular sequences have common portion help to analyze in two sequences
Connection.
Applicable cases, optionally, similarity detection apparatus further include: similarity calculation module, similarity are planted for (1)
Computing module connect with the path logging modle 17 of each detection unit respectively, and similarity calculation module is used for according to being compared
The record of the path logging modle 17 for all detection units that two sequences are passed through is as a result, determine that two compared sequences are passed through
All detection units minimum weight, the minimum weight of all detection units that compared two sequences are passed through is added
To the similarity of two sequences compared.Alternatively, similarity detection apparatus includes an additional counter 12, the counter
12 relatively start counting from the first character of two sequences compared, compare end in last character and stop counting,
The value of the counter 12 is the similarity of two compared sequences.
Applicable cases, optionally, similarity detection apparatus further include: path calculation module, path computing are planted for (2)
Module is connect with the path logging modle 17 of each detection unit respectively.Path calculation module is used for according to two sequences compared
The record of the path logging modle 17 for all detection units passed through is arranged as a result, determining propagation path, propagating indicates to be compared
Two sequences in sequence to be compared be converted into the series of operations that reference sequences are passed through.
Application request, optionally, similarity detection apparatus are planted for (3) further include: common subsequence determining module, it is public
Subsequence determining module is connect with the path logging modle 17 of each detection unit respectively altogether.Common subsequence determining module is used for
The record of the path logging modle 17 for all detection units passed through according to two sequences compared is as a result, determine continuous
Maximum number with operation, the corresponding subsequence of maximum number of the continuous matching operation is by two compared the sequence
The maximum common subsequence of column.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (7)
1. a kind of similarity detection apparatus characterized by comprising
M × N number of detection unit, the M × N number of detection unit form the array of M row N column, and each detection unit includes: the
One OR circuit, counter, selecting module, three output circuits and path logging modle, N and M are just more than or equal to 2
Integer；
Wherein, first OR circuit includes three input terminals and an output end, three input terminals are as follows: left input
End, lower-left input terminal and lower input terminal, three output circuits are as follows: right output circuit, upper right output circuit and upper output electricity
Road, the left input terminal of first OR circuit are connect with the right output circuit of left detection unit, first OR circuit
Lower-left input terminal is connect with the upper right output circuit of lower-left detection unit, the lower input terminal of first OR circuit and lower detection
The upper output circuit of unit connects, and three input terminals of first OR circuit also connect with the path logging modle respectively
It connects, the output end of first OR circuit is connect with the input terminal of the counter, and the path logging modle is for recording
The input terminal of input high level first in three input terminals of first OR circuit；
The output end of the counter is connect with the input terminal of the selecting module, and the maximum value of the counter is greater than three kinds of sequences
The maximum value of the weight of operation is arranged, the weight of the series of operations is used to indicate the cost of corresponding series of operations, each sequence
The weight of column operation is the value of the counter；
Three output ends of the selecting module respectively with the right output circuit, the upper right output circuit and the upper output
Circuit connection, the selecting module further include two control terminals, and the input signals of described two control terminals is compared two
The character of sequence, the right output circuit are connect with the left input terminal of right detection circuit, and the upper right output circuit and upper right are examined
The lower-left input circuit of slowdown monitoring circuit connects, and the upper output circuit is connect with the lower input terminal of upper detection circuit；
When the input of any one input terminal of three input terminals of first OR circuit be high level when, described first or
Gate circuit exports high level, and the path logging modle records in three input terminals of first OR circuit and inputs institute first
The input terminal of high level is stated, the counter starts counting, when the output of the counter is the first count value, the selection
First output end of module exports the high level, and the right output circuit exports and keep the high level, when the counting
When the output of device is the second count value, the second output terminal of the selecting module exports the high level, the upper right output electricity
Road exports and keeps the high level, and when the output of the counter is third count value, the third of the selecting module is defeated
Outlet is the high level, and the upper output circuit exports and keeps the high level.
2. similarity detection apparatus according to claim 1, which is characterized in that the selecting module includes: decoder, more
Road selector；
The output end of the counter is connect with the input terminal of the decoder；
The decoder includes multiple output ends, and the first output end of the decoder is connect with the right output circuit, described
Multiple second output terminals of decoder are connect with multiple input terminals of the multiple selector respectively, the multiple selector it is defeated
Outlet is connect with the upper right output circuit, and the third output end of the decoder is connect with the upper output circuit；
When the output of the counter is first count value, first count value is translated as first by the decoder
One-hot encoding, the decoder exports high level from the first output end of the decoder according to first one-hot encoding, when described
When the output of counter is second count value, second count value is translated as the second one-hot encoding, institute by the decoder
It states decoder and the high level is exported from the corresponding second output terminal of second one-hot encoding according to second one-hot encoding, it is described
The character and the corresponding second output terminal of second one-hot encoding that multiple selector is inputted according to described two control terminals export
The high level, the high level is exported from the output end of the multiple selector, when the output of the counter is described
When third count value, the third count value is translated as third one-hot encoding by the decoder, and the decoder is according to described
Three one-hot encodings export the high level from the third output end of the decoder；
The second output terminal of the selecting module exports the high level, and the upper right output circuit exports and keeps the high electricity
Flat, when the output of the counter is third count value, the third output end of the selecting module is the high level, described
Upper output circuit exports and keeps the high level.
3. similarity detection apparatus according to claim 1, which is characterized in that the right output circuit include: second or
Gate circuit and the first AND gate circuit, second OR circuit include two input terminals and an output end, and described first and door
Circuit includes two input terminals and an output end, and the of an input terminal of second OR circuit and the selecting module
The connection of one output end, another input terminal of second OR circuit are connect with the output end of first AND gate circuit, institute
An input terminal for stating the output end of the second OR circuit and the left input terminal of left detection unit, first AND gate circuit connects
It connects, another input termination high level of first AND gate circuit；
The upper right output circuit includes: third OR circuit and the second AND gate circuit, and the third OR circuit includes two
Input terminal and an output end, second AND gate circuit include two input terminals and an output end, and the third or door are electric
One input terminal on road is connect with the second output terminal of the selecting module, another input terminal of the third OR circuit with
The output end of second AND gate circuit connects, and the output end of the third OR circuit and the lower-left of lower-left detection unit input
One input terminal connection at end, second AND gate circuit, another input termination high level of second AND gate circuit；
The upper output circuit includes: the 4th OR circuit and third AND gate circuit, and the 4th OR circuit includes two defeated
Enter end and an output end, the third AND gate circuit includes two input terminals and an output end, the 4th OR circuit
An input terminal connect with the third output end of the selecting module, another input terminal of the 4th OR circuit and institute
State the output end connection of third AND gate circuit, the output end of the 4th OR circuit and lower input terminal, the institute of lower detection unit
State the input terminal connection of third AND gate circuit, another input termination high level of the third AND gate circuit.
4. similarity detection apparatus according to claim 2, which is characterized in that the right output circuit include: second or
Gate circuit and the first AND gate circuit, second OR circuit include two input terminals and an output end, and described first and door
Circuit includes two input terminals and an output end, an input terminal of second OR circuit and the first of the decoder
Output end connection, another input terminal of second OR circuit is connect with the output end of first AND gate circuit, described
The output end of second OR circuit is connect with an input terminal of the left input terminal of left detection unit, first AND gate circuit,
Another input termination high level of first AND gate circuit；
The upper right output circuit includes: third OR circuit and the second AND gate circuit, and the third OR circuit includes two
Input terminal and an output end, second AND gate circuit include two input terminals and an output end, and the third or door are electric
One input terminal on road is connect with the output end of the multiple selector, another input terminal of the third OR circuit and institute
The output end connection of the second AND gate circuit is stated, the output end of the third OR circuit and the lower-left of lower-left detection unit input
One input terminal connection at end, second AND gate circuit, another input termination high level of second AND gate circuit；
The upper output circuit includes: the 4th OR circuit and third AND gate circuit, and the 4th OR circuit includes two defeated
Enter end and an output end, the third AND gate circuit includes two input terminals and an output end, the 4th OR circuit
An input terminal connect with the third output end of the decoder, another input terminal of the 4th OR circuit with it is described
The output end of third AND gate circuit connects, the lower input terminal of the output end of the 4th OR circuit and lower detection unit, described
One input terminal of third AND gate circuit connects, another input termination high level of the third AND gate circuit.
5. similarity detection apparatus described in any one of -4 according to claim 1, which is characterized in that the similarity detection dress
It sets further include: similarity calculation module, the similarity calculation module record mould with the path of each detection unit respectively
Block connection；
Remember in the path of the similarity calculation module, all detection units for being passed through according to two compared sequences
That records module records the minimum weight as a result, all detection units that determining two compared sequences are passed through, will be described
The minimum weight for all detection units that two sequences compared are passed through is added to obtain the phase of two compared sequences
Like degree.
6. similarity detection apparatus described in any one of -4 according to claim 1, which is characterized in that the similarity detection dress
It sets further include: path calculation module, the path calculation module connect with the path logging modle of each detection unit respectively
It connects；
The path of the path calculation module, all detection units for being passed through according to two compared sequences records
As a result, determining propagation path, the propagation is indicated the sequence to be compared in two compared sequences the record of module
It is converted into the series of operations that reference sequences are passed through.
7. similarity detection apparatus described in any one of -4 according to claim 1, which is characterized in that the similarity detection dress
It sets further include: common subsequence determining module, the common subsequence determining module road with each detection unit respectively
The connection of diameter logging modle；
The common subsequence determining module, the road of all detection units for being passed through according to two compared sequences
For the record of diameter logging modle as a result, determining the maximum number of continuous matching operation, the maximum of the continuous matching operation is a
Maximum common subsequence of the corresponding subsequence of number by two compared the sequence.
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| CN201510542916.4A CN106484360B (en) | 2015-08-28 | 2015-08-28 | Similarity detection apparatus |
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|---|---|---|---|
| CN201510542916.4A CN106484360B (en) | 2015-08-28 | 2015-08-28 | Similarity detection apparatus |
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| JPS57137977A (en) * | 1981-02-18 | 1982-08-25 | Nec Corp | Similarity degree comparing circuit of character recognizing device |
| US8965935B2 (en) * | 2007-11-08 | 2015-02-24 | Oracle America, Inc. | Sequence matching algorithm |
| CN102254296B (en) * | 2011-07-13 | 2012-10-24 | 南京师范大学 | Method for calculating similarity of Geographic Information System (GIS) vector data image watermarks |
| CN103020174B (en) * | 2012-11-28 | 2016-01-06 | 华为技术有限公司 | Similarity analysis method, Apparatus and system |
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