CN106470428A - A kind of precise synchronization of parallel multi-channel channel test equipment and triggering method - Google Patents
A kind of precise synchronization of parallel multi-channel channel test equipment and triggering method Download PDFInfo
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Abstract
The present invention provides a kind of precise synchronization of parallel multi-channel channel test equipment and triggering method, selects a main channel, first rising edge of the described lock-out pulse being sent by main channel to be received such as each passage, till receiving in multiple passages；Time difference in a cycle after the first rising edge of lock-out pulse, between first rising edge of each Air conduct measurement public lock-out pulse clock and first rising edge of public triggering reference clock；According to time difference, by the phase place automatic aligning of the sampling clock of all passages and public triggering reference clock；With the trailing edge of public triggering reference clock, when the trigger sending from main channel is sent to all passages and is detected, in the rising edge of the described public triggering reference clock of the next one, all passages execute signal simultaneously and occur or signal acquisition.The present invention passes through modularity instrument and modular instrument bus architecture can reach the synchronization accuracy of ps level.
Description
Technical field
The present invention relates to the technical field of radio communication, more particularly to a kind of precise synchronization of parallel multi-channel channel test equipment
With triggering method.
Background technology
Multiple-input and multiple-output (Multiple-Input Multiple-Output MIMO) technology refers to make respectively in transmitting terminal and receiving terminal
With multiple transmitting antennas and reception antenna, signal is made to be transmitted by multiple antennas of transmitting terminal and receiving terminal and receive, thus
Improve communication quality.MIMO technology can make full use of space resources, realizes MIMO by multiple antennas, is not increasing frequency
In the case of spectrum resource and antenna transmission power, system channel capacity can be increased exponentially, there is obvious advantage, thus quilt
It is considered as the core technology of next generation mobile communication.The test equipment corresponding with MIMO technology is parallel multi-channel channel test
Equipment.
3GPP is descending from LTER8/R9 version to introduce 8 kinds of MIMO transmission patterns, the MIMO that wherein LTE-FDD commonly uses
Transmission mode is that pattern 1 arrives pattern 6 (TM1～TM6), and mode 7 (TM7) and pattern 8 (TM8) are mainly used in
In TD-LTE system.
With the fast development of wireless mobile telecommunication technology, compared to MIMO technology, corresponding test Solution is very
Relatively lag behind in long a period of time, the total solution of the user's request that do not fit like a glove.Therefore, in the early stage in the face of MIMO
During technology, often using mimo system as multiple single-input single-output systems (Single Input Single Output, SISO)
System to be tested respectively.
The MIMO test equipment of early stage is substantially a MIMO test system of separate unit instrument stacked group synthesis.This mode
Because equipment does not share local oscillator, the holding wire of time-base signal and trigger to every instrument is not uniformly controlled and length guarantee,
Performance cannot ensure convergence and high accuracy.Therefore, such MIMO test system substantially can only be relatively single for completing some
The checking of one algorithm.
Therefore, MIMO method of testing of the prior art has the following disadvantages：
(1) it is not fully appropriate for the synchronization between multichannel；
(2) more emphasis is to start simultaneously at, and does not strictly consider that the phase place of synchronizing channel is consistent；
(3) based on the integrated mode of conventional instrument due to the restriction of openness and discreteness, precision typically in ms rank, reaches not
To required precision.
So how the synchronous complicated point of multiple radio-frequency channels is that each radio-frequency channel can be operated under different sampling clocks,
All of sampling clock is made to start to become a challenge in same point；The difficult point of next is synchronization accuracy, how so that
The precision that inter-channel synchronization precision will reach ps level also becomes a hot subject.
Content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of parallel multi-channel channel test equipment
Precise synchronization and triggering method, are applied to the aspects such as MIMO wireless channel measurement, velocity of wave excipient, space angle positioning, pass through
The mechanism that trigger is lived again, real time calibration, signal of knocking at the door are triggered with this four step two-stages of determination triggering to reach leads to parallel
The purpose of the precise synchronization of road channel test equipment.
For achieving the above object and other related purposes, the present invention provides a kind of precise synchronization of parallel multi-channel channel test equipment
With triggering method, comprise the following steps：Step S1, the sampling clock of each passage is set；Step S2, according to each passage
Sample clock frequency and port number calculate unified frequency shared signal, be defined as public triggering reference clock；Step S3, general
The reference clock of parallel multi-channel channel test equipment bus is assigned to all of passage, for use as the lock of all channel sample clocks
Phase；Step S4, the public lock-out pulse clock of setting, and described public lock-out pulse clock is deployed on all passages；Step
S5, in multiple passages select one as main channel, patrol when described public lock-out pulse clock is in by the firing line of bus
When collecting high level, main channel produces a lock-out pulse；Step S6, initialization parallel multi-channel channel test equipment each
Passage, first rising edge of the described lock-out pulse being sent by main channel to be received such as each passage, till receiving；
In step S7, a cycle after the first rising edge of described lock-out pulse, public lock-out pulse described in each Air conduct measurement
Time difference between first rising edge of first rising edge of clock and described public triggering reference clock；Step S8, comparison are every
Individual time difference detected by from passage and the time difference detected by main channel, by the sampling clock of all passages and described public
The phase place automatic aligning of triggering reference clock；Step S9, the trailing edge with described public triggering reference clock, send out from main channel
When the trigger going out is sent to all passages and is detected, in the rising edge of the described public triggering reference clock of the next one, institute
There is passage to execute signal to occur or signal acquisition simultaneously.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：In described step S1, often
The frequency of the sampling clock of individual passage is identical.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：In described step S2, institute
The least common multiple having the sample clock frequency of passage is the frequency of public triggering reference clock.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：In described step S4, institute
The frequency stating public lock-out pulse clock is identical with the frequency of the reference clock of bus architecture.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：In described step S5, choosing
The arbitrary passage determined in multichannel is main channel, and other passages then become from passage.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：In described step S8, institute
The phase place having the sampling clock of passage is passed through to adjust the phase place automatically with described public triggering reference clock for the DAC/ADC phase output
Alignment.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：At least fixed in described bus
Justice has line synchro, firing line, three kinds of clock line to be used for the holding wire of multi-channel synchronous.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：Described bus designs
Isometric PCB circuit, makes the synchronizing signal, trigger, clock signal that each channel reception arrives through isometric path.
Precise synchronization according to above-mentioned parallel multi-channel channel test equipment and triggering method, wherein：Using during 10MHz reference
Clock is as the frequency of described public triggering reference clock.
As described above, the precise synchronization of parallel multi-channel channel test equipment of the present invention and triggering method, there is following beneficial effect
Really：
(1) be applied between multiple passages of same equipment, lived again by trigger, real time calibration, knock at the door signal and determination
Trigger the mechanism of this four step two-stages triggering precise synchronization to realize parallel multi-channel channel test equipment；
(2) it is applied to the technical fields such as space orientation, wave beam forming, high accuracy channel data angle domain analysiss；
(3) pass through modularity instrument and modular instrument bus architecture can reach the synchronization accuracy of ps level.
Brief description
Fig. 1 is shown as the precise synchronization of parallel multi-channel channel test equipment of the present invention and the flow chart of triggering method；
Fig. 2 is shown as the schematic diagram of the sampling clock of each passage that aligns in the present invention by time difference；
Fig. 3 is shown as the synchronous schematic diagram of multichannel triggering in the present invention after calibration.
Specific embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art can be disclosed by this specification
Content understand other advantages and effect of the present invention easily.The present invention can also be added by addition different specific embodiments
To implement or to apply, the every details in this specification can also be based on different viewpoints and application, in the essence without departing from the present invention
Carry out various modifications and changes under god.
It should be noted that the diagram provided in the present embodiment only illustrates the basic conception of the present invention, schema then in a schematic way
In only display draw with relevant assembly in the present invention rather than according to component count during actual enforcement, shape and size, it is actual
During enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its assembly layout kenel be likely to increasingly complex.
The precise synchronization of parallel multi-channel channel test equipment of the present invention is based on modularity instrument and PXI-E bus with triggering method
Modular instrument bus architecture, devises the synchronous mechanism with triggering, improves the synchronous performance with triggering, therefore completely permissible
The directly testing equipment to MIMO, and can be applied in the high-grade application of phase sensitive between multichannel, such as：
The angle domain of signal is estimated and analysis, wave beam forming etc..
It should be noted that the precise synchronization of parallel multi-channel channel test equipment of the present invention and triggering method are directed to passage
Between synchronization, that is, in transmitting terminal, all transmitters of multichannel transmitter start simultaneously at transmitting, or according to trigger at certain
Under the conditions of start simultaneously at transmitting；In receiving terminal, all receivers of multichannel receiver start simultaneously at reception, or according to triggering letter
Number start simultaneously at reception under the conditions of certain.
Wherein, the present invention adopts modular instrument bus architecture, and in bus signals, at least definition has line synchro, firing line, clock
Three kinds of line is used for the holding wire of multi-channel synchronous.Specifically, bus architecture designs isometric PCB circuit, make each passage
The synchronizing signal that receives, trigger, clock signal are through isometric path.
With reference to Fig. 1, the precise synchronization of parallel multi-channel channel test equipment and the triggering method of the present invention comprise the following steps：
Step S1, the sampling clock of each passage is set.
Specifically, each passage can by programming set different frequency sampling clock it is also possible to set same frequency sampling when
Clock.Meanwhile, each passage has the function of receiving trigger.Preferably, the frequency of the sampling clock of each passage is set
Identical, so that follow-up test is more simple.
Step S2, the sample clock frequency according to each passage and port number calculate the shared signal of unified frequency, are defined as public
Triggering reference clock (Share Trigger Reference Clock, STRC).
Wherein, primary control program calculates the shared letter of a unified frequency according to the respective sample clock frequency of each passage and port number
Number, it is defined as STRC.
The least common multiple of the sample clock frequency of all passages is the frequency of STRC.
Step S3, the 10MHz reference clock of parallel multi-channel channel test equipment bus is assigned to all of passage, with
Make the lock phase of all channel sample clocks.
Wherein, the sampling clock of these passages is only phase-locked on the reference clock of bus architecture, does not realize phase place pair
Together.
Step S4, the public lock-out pulse clock of setting (Share Sync Plus Clock, SSPC), and SSPC is deployed to institute
Have on passage.
Specifically, the frequency of SSPC can be set by mastery routine, and is deployed to all of passage by the firing line of bus
On.Preferably, if the application of parallel multi-channel channel test takes 10MHz as the frequency of SSPC, bus can be used
The reference clock of 10MHz takes on SSPC simultaneously.
Step S5, select one in multiple passages as main channel, to be in logic high electric when SSPC passes through the firing line of bus
At ordinary times, main channel produces a lock-out pulse.
Specifically, program certain passage setting in multichannel by primary control program as main channel, and other passages then become from logical
Road.
Step S6, each passage of initialization parallel multi-channel channel test equipment, each passage etc. is to be received to be sent out by main channel
First rising edge of the lock-out pulse going out, till receiving.
In step S7, a cycle after the first rising edge of lock-out pulse, on first of each Air conduct measurement SSPC
Rise the time difference between edge and first rising edge of STRC.
Specifically, in a cycle after the first rising edge of lock-out pulse, when first of each Air conduct measurement to SSPC
During rising edge, primary control program controls each passage to detect first rising edge and first of STRC in this cycle of SSPC respectively
Time difference between individual rising edge.
Step S8, compare each time difference detected by from passage and the time difference detected by main channel, by all passages
The phase place automatic aligning of sampling clock and STRC.
Specifically carry out it is also possible to the time difference detected by any one passage and other passages are set with detected time difference
Relatively.The phase place of the sampling clock of all passages is passed through to adjust DAC/ADC (digital to analog converter/analog-digital converter) phase output
Automatically and STRC phase alignment.
Step S9, the trailing edge with STRC, when the trigger sending from main channel is sent to all passages and is detected,
In the rising edge of next STRC, all passages execute signal simultaneously and occur or signal acquisition.
Specifically, with the alignment of the sampling clock of each passage, trigger from agreement main channel STRC trailing edge
Moment is deployed on all of passage.In the rising edge of the next STRC of main channel, all being programmed from passage executes letter
Number occur or signal acquisition.This final real trigger can be entered by the trigger of bus architecture or aerial lug
Row deployment.
To elaborate precise synchronization and the triggering of the parallel multi-channel channel test equipment of the present invention below by specific embodiment
Method.
In this embodiment, using the modularity instrument based on vector signal transceiver (Vector Signal Transceiver, VTS)
Device and PXI-E bus architecture are integrated with the parallel channel test equipment of 8 passages.PXI-E bus provides 10MHz public triggering ginseng
Examine clock signal, 100MHz differential clocks and Trigger Bus etc., the same local vibration source of all channels share.Channel test equipment
To make a start be 8 channel transmitters, send orthogonal pseudo noise sequence (Pseudo-noise Sequence, PN)；Channel test
The receiving end of equipment is 8 channel receivers, receives the data flow sending.When the data of channel test will be carried out-frequently-empty various dimensions
Analysis, requires to Phase synchronization very high, specifically includes following steps：
(1) by being programmed for the sampling clock of 8 path setting same frequencys and the function of receiving trigger.
(2) primary control program sets the frequency of the STRC sample clock frequency as 2 times.
(3) the 10MHz reference clock of bus architecture is assigned to all of passage, for use as all radio-frequency channels sampling clock
Lock phase.Wherein, the sampling clock of each passage is phase-locked in the 10MHz reference signal of bus, but the adopting of these passages
Sample clock does not have by phase alignment.
(4) adopt 10MHz reference clock as the frequency of SSPC.
(5) set first passage as main channel, a trigger is sent to main channel by integrated GPS in cabinet, main
Passage produce after receiving this trigger one for triggering lock-out pulse, and by PXI-E bus be distributed to from passage with
Oneself.
(6) after the initialization of all passages etc. first lock-out pulse to be received rising edge, till receiving.
(7) when first lock-out pulse rising edge is detected, each passage is programmed into first rising of SSPC during the trade
The time difference test of first rising edge of edge and at that time STRC.Each passage detects the time difference of oneself.
As shown in Fig. 2 for passage 1 and passage N, although sampling clock locks phase with 10MHz reference clock, phase place is not
And it is unjustified.There is the time difference of △ T2 between time difference between passage 1 and passage N.
(8) time difference of each passage and the time difference of main channel are compared, and the sampling clock of all passages and STRC pass through
Adjust DAC/ADC phase output automatic aligning.
As shown in figure 3, after calibration, it is synchronous that all passages realize triggering.
(9) after all channel sample clocks and STRC phase alignment, by main channel produce for synchronous trigger pulse with
Main channel STRC trailing edge, this trigger is sent on all passages, and is detected.Upper in next STRC
Rise edge, all radio-frequency channels of 8 channel transmitters are launched, and all radio-frequency channels of 8 channel receivers are received.This
Final real trigger is disposed also by the firing line of PXI-E bus.
After realizing above-mentioned steps on the FPGA board of each radio-frequency channel, actual measurement obtains the synchronization accuracy of 43ps.
In sum, the precise synchronization of parallel multi-channel channel test equipment of the present invention and triggering method are applied to same equipment
Between multiple passages, lived again by trigger, real time calibration, signal of knocking at the door trigger this four step two-stages triggerings with determination
Mechanism is realizing the precise synchronization of parallel multi-channel channel test equipment；It is applied to space orientation, wave beam forming, high accuracy channel
The technical fields such as data Angle domain analysiss；The synchronous essence of ps level can be reached by modularity instrument and modular instrument bus architecture
Degree.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
Above-described embodiment only principle of the illustrative present invention and its effect, not for the restriction present invention.Any it is familiar with this skill
The personage of art all can carry out modifications and changes without prejudice under the spirit and the scope of the present invention to above-described embodiment.Therefore, such as
Those of ordinary skill in the art completed under without departing from disclosed spirit and technological thought all etc.
Effect modifications and changes, must be covered by the claim of the present invention.
Claims (9)
1. a kind of precise synchronization of parallel multi-channel channel test equipment and triggering method it is characterised in that：Comprise the following steps：
Step S1, the sampling clock of each passage is set；
Step S2, the sample clock frequency according to each passage and port number calculate the shared signal of unified frequency, are defined as
Public triggering reference clock；
Step S3, the reference clock of parallel multi-channel channel test equipment bus is assigned to all of passage, for use as institute
There is the lock phase of channel sample clock；
Step S4, the public lock-out pulse clock of setting, and described public lock-out pulse clock is deployed on all passages；
Step S5, select one in multiple passages as main channel, when described public lock-out pulse clock passes through bus
When firing line is in logic high, main channel produces a lock-out pulse；
Step S6, each passage of initialization parallel multi-channel channel test equipment, each passage etc. is to be received to be led to by main
First rising edge of the described lock-out pulse that road sends, till receiving；
In step S7, a cycle after the first rising edge of described lock-out pulse, public described in each Air conduct measurement
Time difference between first rising edge of first rising edge of lock-out pulse clock and described public triggering reference clock；
Step S8, compare each time difference detected by from passage and the time difference detected by main channel, will be all logical
The sampling clock in road and the phase place automatic aligning of described public triggering reference clock；
Step S9, the trailing edge with described public triggering reference clock, the trigger sending from main channel is sent to institute
When having passage and being detected, in the rising edge of the described public triggering reference clock of the next one, all passages execute signal simultaneously
Occur or signal acquisition.
2. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
State in step S1, the frequency of the sampling clock of each passage is identical.
3. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
State in step S2, the least common multiple of the sample clock frequency of all passages is the frequency of public triggering reference clock.
4. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
State in step S4, the frequency of described public lock-out pulse clock is identical with the frequency of the reference clock of bus architecture.
5. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
State in step S5, the arbitrary passage in selected multichannel is main channel, and other passages then become from passage.
6. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
State in step S8, the phase place of the sampling clock of all passages is automatically public with described by adjusting DAC/ADC phase output
The phase alignment of triggering reference clock.
7. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Institute
Stating at least definition in bus has line synchro, firing line, three kinds of clock line to be used for the holding wire of multi-channel synchronous.
8. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：?
Design isometric PCB circuit in described bus, make synchronizing signal, trigger, clock signal that each channel reception arrives
Through isometric path.
9. the precise synchronization of parallel multi-channel channel test equipment according to claim 1 and triggering method it is characterised in that：Adopt
With 10MHz reference clock as the described public frequency triggering reference clock.
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| CN111181711A (en) * | 2020-01-03 | 2020-05-19 | 小狗电器互联网科技（北京）股份有限公司 | Method and system for synchronously sampling signals, storage medium and application equipment |
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| CN112540642A (en) * | 2020-11-27 | 2021-03-23 | 山东云海国创云计算装备产业创新中心有限公司 | Multi-clock domain processing method, device, equipment and medium |
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